Cree CRD-5FF0912P User manual

CPWR-AN17, Rev -, 06-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
CRD-5FF0912P
SiC MOSFET High-Frequency Evaluation Board
for 7L D2PAK
User’s Manual
CPWR-AN17, Rev –
CREE Power Applications
This document is prepared as a user reference guide to install and operate CREE evaluation hardware.
All parts of this document are provided in English, and the Cautions are provided in English, Mandarin,
and Japanese. If the end user of this board is not fluent in any of these languages, it is your
responsibility to ensure that they understand the terms and conditions described in this document,
including without limitation the hazards of and safe operating conditions for this board.
本文件中的所有内容均以英文书写，“注意”部分的内容以英文、中文和日语书写。若本板子的
终端用户不熟悉上述任何一种语言，则您应当确保该终端客户能够理解本文件中的条款与条件，
包括且不限于本板子的危险以及安全操作条件。
当書類のすべての内容は英語で書きます。「注意点」の内容は英語、中国語、また日本語で書きま
す。当ボードの端末使用者は上記の言語が一つでもわからないなら、当端末使用者は当書類の条約
と条件が理解できるのを確保すべきです。そして、当ボードの危険や安全に使用する条件を含み、
また限りません。

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
Note: This Cree-designed evaluation hardware for Cree components is meant to be used as an
evaluation tool in a lab setting and to be handled and operated by highly qualified technicians or
engineers. The hardware is not designed to meet any particular safety standards and the tool is not a
production qualified assembly.
CAUTION
PLEASE CAREFULLY REVIEW THE FOLLOWING PAGE, AS IT CONTAINS
IMPORTANT INFORMATION REGARDING THE HAZARDS AND SAFE
OPERATING REQUIREMENTS RELATED TO THE HANDLING AND USE OF
THIS BOARD.
警告
请认真阅读以下内容，因为其中包含了处理和使用本板子有关的危险和安全操作要求方
面的重要信息。
警告
ボードの使用、危険の対応、そして安全に操作する要求などの大切な情報を含むの
で、以下の内容をよく読んでください。

3
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
CAUTION
DO NOT TOUCH THE BOARD WHEN IT IS ENERGIZED AND ALLOW THE BULK
CAPACITORS TO COMPLETELY DISCHARGE PRIOR TO HANDLING THE
BOARD. THERE CAN BE VERY HIGH VOLTAGES PRESENT ON THIS
EVALUATION BOARD WHEN CONNECTED TO AN ELECTRICAL SOURCE, AND
SOME COMPONENTS ON THIS BOARD CAN REACH TEMPERATURES ABOVE
50˚ CELSIUS. FURTHER, THESE CONDITIONS WILL CONTINUE FOR A SHORT
TIME AFTER THE ELECTRICAL SOURCE IS DISCONNECTED UNTIL THE BULK
CAPACITORS ARE FULLY DISCHARGED.
Please ensure that appropriate safety procedures are followed when operating
this board, as any of the following can occur if you handle or use this board
without following proper safety precautions:
●Death
●Serious injury
●Electrocution
●Electrical shock
●Electrical burns
●Severe heat burns
You must read this document in its entirety before operating this board. It is not
necessary for you to touch the board while it is energized. All test and measurement
probes or attachments must be attached before the board is energized. You must
never leave this board unattended or handle it when energized, and you must always
ensure that all bulk capacitors have completely discharged prior to handling the
board. Do not change the devices to be tested until the board is disconnected from
the electrical source and the bulk capacitors have fully discharged.
警告
请勿在通电情况下接触板子，在处理板子前应使大容量电容器完全释放电力。
接通电源后，该评估板上可能存在非常高的电压，板子上一些组件的温度可能超过50
摄氏度。此外，移除电源后，上述情况可能会短暂持续，直至大容量电容器完全释放
电量。
操作板子时应确保遵守正确的安全规程，否则可能会出现下列危险：

4
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
●死亡
●严重伤害
●触电
●电击
●电灼伤
●严重的热烧伤
请在操作本板子前完整阅读本文件。通电时不必接触板子。在为板子通电前必须连接
所有测试与测量探针或附件。通电时，禁止使板子处于无人看护状态，或操作板子。
必须确保在操作板子前，大容量电容器释放了所有电量。只有在切断板子电源，且大
容量电容器完全放电后，才可更换待测试器件。
警告
通電している時、ボードに接触するのは禁止です。ボードを処分する前に、大容量
のコンデンサーで電力を完全に釈放すべきです。通電してから、ボードにひどく高
い電圧が存在している可能性があります。ボードのモジュールの温度は50度以上に
なるかもしれません。また、電源を切った後、上記の状況がしばらく持続する可能
性がありますので、大容量のコンデンサーで電力を完全に釈放するまで待ってくだ
さい。
ボードを操作するとき、正確な安全ルールを守るのを確保すべきです。さもないと
、以下の危険がある可能性があります:
●死亡
●重症
●感電
●電撃
●電気の火傷
●厳しい火傷
当ボードを操作する前に、完全に当書類をよく読んでください。通電している時に
ボードに接触する必要がありません。通電する前に必ずすべての試験用のプローブ
あるいはアクセサリーをつないでください。通電している時に無人監視やボードを
操作するのは禁止です。ボードを操作する前に、大容量のコンデンサーで電力を完
全に釈放するのを必ず確保してください。ボードの電源を切った後、また大容量の
コンデンサーで電力を完全に釈放した後、試験設備を取り換えることができます。

5
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
1. Introduction
The purpose of this evaluation board is to demonstrate the high-switching performance of Cree 3rd
Generation Silicon Carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) in a
7L D2PAK package. The new surface-mount device (SMD), specifically designed for high voltage
MOSFETs, has a small footprint with a wide creepage distance of 7mm between drain and source.
The new package also includes a separate driver source connection, which reduces gate ringing and
provides clean gate signals. This evaluation board (Figure 1) comes configured as a basic half bridge
circuit with two C3M0120090J SiC MOSFETs installed. The board can easily be configured into
common power conversion topologies such as synchronous boost, synchronous buck, Inverter, and
other topologies. This board was designed to make it easy for the user to:
Evaluate SiC MOSFET switching performance in a 7L D2PAK package to characterize EON and
EOFF losses.
Evaluate thermal performance. The integrated heatsink is predrilled with a blind hole on
the backside for thermocouples so the heatsink surface temperature can be accurately
estimated.
Serve as a PC board layout example for driving Gen 3 SiC MOSFETs in the newly developed
7L D2PAK package.
Easily evaluate the effects of different Rg values, Miller clamps, uni-polar versus bipolar gate
drive, fault detection circuit, various thermal interface materials, and cooling methods.
Figure 1. Evaluation Board (top and side view)
2. Features
The evaluation board’s physical dimensions are 127mm x 98mm x 58mm. The board comes
preassembled with an isolated heatsink, cooling fan, and 2 SiC MOSFETS. The heatsink is attached
to the board with five nonconductive screws (RENY hexagon socket low head cap bolt M5 6mm).

6
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
A block diagram of the evaluation board is shown in Figure 2. Besides the two Cree 900V, 120mΩ
(C3M0120090) SiC MOSFETs (Q1 and Q2), there are two onboard isolated gate driver circuits to
drive both Q1 and Q2. There are four power connectors (CON1, CON2, CON3, and CON4) for
connecting to the +DC link, -DC link, and midpoint. There is a 20 pin signal/supply voltage ribbon
cable connector (J10) onboard which carries the logic power, status signals, fault signals, and gate
drive control signals.
Gate
Drive
J10
Q1
Q2
CON1
CON2
CON3,
CON4
Figure 2. Block Diagram
Each gate drive circuit consists of a 2A isolated gate driver chip and a generous 2W isolated DC/DC
converter that can comfortably switch the SiC MOSFETs at up to 3MHz. The driver chip provides
1200V of isolation between the low voltage control side and the high voltage drive side. The
DC/DC converters are sourced with +12V on their inputs. Through a series of jumpers, JM1-JM6
(Figure 4), the gate drivers can each be configured as a low cost uni-polar (+15V/0V) gate drive or as
a high performance bi-polar gate drive (+15V/-3V). The DC/DC converters provide a maximum of
5.2kV of isolation for 60 seconds. The complete board assembly will withstand a 1.5kVAC.rms Hi-pot
test for 60 seconds.

7
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
8
8
1nf
5.1K
CLAMP
OUT
100
DESAT 3.3V
J6
12V 18V 3.3V COM
-3.3V
+15V
+15V
VCC
VEE
GND
COM
J2
-3.3V
J1
+12V
8
8
1nf
5.1K
CLAMP
OUT
100
DESAT 3.3V
J5
12V 18V 3.3V COM
-3.3V
+15V
+15V
VCC
VEE
GND
COM
J4
-3.3V
J3
+12V
Figure 3. Gate Drive Circuit
Table 1 shows how the jumpers should be configured depending on the desired gate drive output
levels.
+15V/-3V +15V/0V
JM1, JM3 SHORT OPEN
JM2, JM4 OPEN SHORT
JM5, JM6 OPEN SHORT
Gate Drive Output
Table 1. Jumper Table
There is a short circuit protection function for each gate drive circuit by means of Vds voltage
monitoring. The drain of each MOSFET is monitored (Figure 4). When either of the MOSFETs is in
the ON state, and the drain voltage exceeds approximately 5.7V, the gate driver reverts to the OFF
state and the fault signal for the channel is toggled.

8
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
8
8
1nf
5.1K
CLAMP
OUT
GATE DRIVER
100
DESAT 3.3V
J5/J6
Figure 4. Gate Drive shown with Miller Clamp and short circuit protection.
In a half bridge configuration, turning on one device tends to induce a voltage on the opposing
device gate node. If this voltage exceeds the threshold voltage it is possible to get an unintended
shoot through event in certain devices. A negative gate bias (Bi-polar drive) is one common way to
mitigate this issue. When using a uni-polar drive sometimes it is common to use a Miller clamp to
ensure that the gate voltage of the opposing device is clamped below the threshold voltage. To
activate the Miller clamp, a jumper (JM5=upper channel, JM6=lower channel) needs to be shorted.
The Miller clamp should only be enabled when the gate driver is configured for +15V/0V output
voltage.
Although we provide this feature on the board for the user to evaluate the effects of the Miller
clamp, it is not necessary to have a Miller clamp. The SiC MOSFET channel is not fully turned ON
when the gate voltage exceeds the device threshold voltage. For Cree SiC MOSFETs, the gate voltage
would have to exceed 9V to have a significant shoot through event.
2.1 Cooling
CAUTION
IT IS NOT NECESSARY FOR YOU TO TOUCH THE BOARD WHILE IT IS ENERGIZED. WHEN DEVICES
ARE BEING ATTACHED FOR TESTING, THE BOARD MUST BE DISCONNECTED FROM THE
ELECTRICAL SOURCE AND ALL BULK CAPACITORS MUST BE FULLY DISCHARGED.
SOME COMPONENTS ON THE BOARD REACH TEMPERATURES ABOVE 50˚ CELSIUS. THESE

9
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
警告
通电时不必接触板子。连接器件进行测试时，必须切断板子电源，且大容量电容器必须释
放完所有电量。
板子上一些组件的温度可能超过50摄氏度。移除电源后，上述情况可能会短暂持续，直至
大容量电容器完全释放电量。通电时禁止触摸板子，应在大容量电容器完全释放电量后，
再操作板子。
请确保在操作板子时已经遵守了正确的安全规程，否则可能会造成严重伤害，包括触电死
亡、电击伤害、或电灼伤。
警告
通電している時にボードに接触する必要がありません。設備をつないで試験する時、必
ずボードの電源を切ってください。また、大容量のコンデンサーで電力を完全に釈放し
てください。
ボードのモジュールの温度は50度以上になるかもしれません。電源を切った後、上記の
状況がしばらく持続する可能性がありますので、大容量のコンデンサーで電力を完全に
釈放するまで待ってください。通電している時にボードに接触するのは禁止です。大容
量のコンデンサーで電力をまだ完全に釈放していない時、ボードを操作しないでくださ
い。
ボードを操作している時、正確な安全ルールを守っているのを確保してください。さも
なければ、感電、電撃、厳しい火傷などの死傷が出る可能性があります。
The evaluation board has several integrated features designed for effective thermal management.
The top and bottom side of the board uses heavy 8oz. copper to help dissipate heat better. It also
has a 3mm diameter solid copper inlay directly under the SiC MOSEFTs (Q1 and Q2) to effectively
transfer the heat to the bottom side of the board. The board is mechanically attached via 5
nonconductive screws to an extruded aluminum heatsink with an integrated 30mm fan. Since the
CONDITIONS WILL CONTINUE AFTER THE ELECTRICAL SOURCE IS DISCONNECTED UNTIL THE
BULK CAPACITORS ARE FULLY DISCHARGED. DO NOT TOUCH THE BOARD WHEN IT IS
ENERGIZED AND ALLOW THE BULK CAPACITORS TO COMPLETELY DISCHARGE PRIOR TO
HANDLING THE BOARD.
PLEASE ENSURE THAT APPROPRIATE SAFETY PROCEDURES ARE FOLLOWED WHEN OPERATING
THIS BOARD AS SERIOUS INJURY, INCLUDING DEATH BY ELECTROCUTION OR SERIOUS INJURY
BY ELECTRICAL SHOCK OR ELECTRICAL BURNS, CAN OCCUR IF YOU DO NOT FOLLOW PROPER
SAFETY PRECAUTIONS.

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
heatsink is common to both MOSFETs it needs to be isolated from the bottom copper on the board
yet be thermally conductive. This is achieved via a high performance 0.01 inch thermal interface
material, Sil-Pad 2000 manufactured by Bergquist (Mfg. P/N SP2000-0.010-00-1212). A thermal
stack up of the assembly is shown below in Figure 5.
Figure 5. Thermal management and assembly stack up.
The measured values for the thermal resistance from the device junction (C3M0120090J) to the case
(Rth.j-c), from the device case to the surface of the heatsink (Rth.c-s), and from the heatsink to
ambient with the fan turned ON with a 12VDC source (Rth.s-a),is listed in Table 2 below.
Table 2. Measured thermal resistance values
3. Example Topologies
The half bridge circuit topology was chosen for its flexibility, as it forms the common switch
node in many common topologies. Two example configurations are listed below, with the

11
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
components shown outside the dotted box to be provided by the user. There are other
topologies that can be configured, like non-synchronous buck or boost topologies, with minor
modifications to the board. In addition, the user could quickly prototype an H-bridge or 6-pak
based topology with the addition of multiple evaluation boards.
A. Synchronous Buck Converter
Gate
Drive
J10
Q1
Q2
CON1
CON2
CON3,
CON4
HV
DC
COUT
L
VOUT
Step down voltage
MOSFET is used instead of
flyback diode
Connect inductor to CON2 as
output
CON1 is input
CON2 is output
CON3,CON4 is ground
Figure 6a. Evaluation Board setup as Synchronous Buck Converter
B. Synchronous Boost Converter
Gate
Drive
J10
Q1
Q2
CON1
CON2
CON3,
CON4
CIN
L
VIN
COUT RL
Step up voltage
MOSFET is used instead of
flyback diode
Connect inductor L to CON2
CON1 is output
CON2 is input
CON3,CON4 is ground
Figure 6b. Evaluation Board setup as Synchronous Boost Converter

12
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
4. Connectors
CAUTION
***HIGH VOLTAGE RISK***
THERE CAN BE VERY HIGH VOLTAGES PRESENT ON THIS BOARD WHEN CONNECTED TO AN
ELECTRICAL SOURCE, AND SOME COMPONENTS ON THIS BOARD CAN REACH TEMPERATURES
ABOVE 50° CELSIUS. FURTHER, THESE CONDITIONS WILL CONTINUE AFTER THE ELECTRCIAL
SOURCE IS DISCONNECTED UNTIL THE BULK CAPACITORS ARE FULLY DISCHARGED. DO NOT
TOUCH THE BOARD WHEN IT IS ENERGIZED AND ALLOW THE BULK CAPACITORS TO
COMPLETELY DISCHARGE PRIOR TO HANDLING THE BOARD.
The connectors on the board have very high voltage levels present when the board is connected
to an electrical source, and thereafter until the bulk capacitors are fully discharged. Please
ensure that appropriate safety procedures are followed when working with these connectors as
serious injury, including death by electrocution or serious injury by electrical shock or electrical
burns, can occur if you do not follow proper safety precautions. When devices are being
attached for testing, the board must be disconnected from the electrical source and all bulk
capacitors must be fully discharged. After use the board should immediately be disconnected
from the electrical source. After disconnection any stored up charge in the bulk capacitors will
continue to charge the connectors. Therefore, you must always ensure that all bulk capacitors
have completely discharged prior to handling the board.
警告
***高压危险***
接通电源后，该评估板上可能存在非常高的电压，板子上一些组件的温度可能超过50摄氏
度。此外，移除电源后，上述情况可能会短暂持续，直至大容量电容器完全释放电量。通
电时禁止触摸板子，应在大容量电容器完全释放电量后，再触摸板子。
板子上的连接器在充电时以及充电后都具有非常高的电压，直至大容量电容器完全释放电
量。请确保在操作板子时已经遵守了正确的安全流程，否则可能会造成严重伤害，包括触
电死亡、电击伤害或电灼伤。连接器件进行测试时，必须切断板子电源，且大容量电容器
必须释放了所有电量。使用后应立即切断板子电源。切断电源后，大容量电容器中存储的
电量会继续输入至连接器中。因此，必须始终在操作板子前，确保大容量电容器已完全释
放电量。

13
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
警告
***高圧危険***
通電してから、ボードにひどく高い電圧が存在している可能性があります。ボードのモ
ジュールの温度は50度以上になるかもしれません。また、電源を切った後、上記の状況
がしばらく持続する可能性がありますので、大容量のコンデンサーで電力を完全に釈放
するまで待ってください。通電している時にボードに接触するのは禁止です。大容量の
コンデンサーで電力をまだ完全に釈放していない時、ボードに接触しないでください。
ボードのコネクターは充電中また充電した後、ひどく高い電圧が存在しているので、大
容量のコンデンサーで電力を完全に釈放するまで待ってください。ボードを操作してい
る時、正確な安全ルールを守っているのを確保してください。さもなければ、感電、電
撃、厳しい火傷などの死傷が出る可能性があります。設備をつないで試験する時、必ず
ボードの電源を切ってください。また、大容量のコンデンサーで電力を完全に釈放して
ください。使用後、すぐにボードの電源を切ってください。電源を切った後、大容量の
コンデンサーに貯蓄している電量はコネクターに持続的に入るので、ボードを操作する
前に、必ず大容量のコンデンサーの電力を完全に釈放するのを確保してください。
Figure 7. Board Top View with Main Features labeled
1ED020I12
CON1
CON2
CON4
CON3
C3M0120090J

14
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
4.1 Test Pad Locations
Figure 8. Board Top View with test points labeled
The test pads highlighted in Figure 8 allow various types of pin headers and solderable
posts to be soldered on all the major nodes so oscilloscope probes can be attached.
Figure 9 shows a pair of pin headers soldered onto test points 6&7 allowing an
oscilloscope probe to monitor VDS for the lower MOSFET (Figure 10).
Figure 9. Pin headers on test points Figure 10. Scope probe on pin headers
Terminals CON1, CON2, CON3 and CON4 are the power terminals, and their definitions
vary based on topology. The terminals are vertical through-hole connectors with a 10-
32 threaded hole and a screw provided. The terminals can accommodate a cable with a

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
ring or spade style connector with 1/4” width and a 10-32 screw. The control signals are
all contained on connector J10. The definition of J10 for each pin is shown in Table 3.
1 2 PWR IN (+12V)
3 4 COMMON
5 6 HIGH SIDE POWER GOOD, 5V=POWER GOOD, OV=POWER BAD
7 8 HIGH SIDE FAULT, 5V=NO FAULT, 0V=DESAT FAULT
910 HIGH SIDE RESET, PULL DOWN TO COMMON TO RESET FAULT
11 12 HIGH SIDE PWM INPUT, 5V=SWITCH ON, 0V=SWITCH OFF
13 14 LOW SIDE POWER GOOD, 5V=POWER GOOD, OV=POWER BAD
15 16 LOW SIDE FAULT, 5V=NO FAULT, 0V=DESAT FAULT
17 18 LOW SIDE RESET, PULL DOWN TO COMMON TO RESET FAULT
19 20 LOW SIDE PWM INPUT, 5V=SWITCH ON, 0V=SWITCH OFF
COMMON
Table 3. Pin definitions for connector J10
The heatsink fan is powered by 12VDC. The 12V fan can be powered from the same 12V
power supply that is powering the evaluation board.
5. Switching loss measurement
This board is ideal for making double pulsed clamped inductive load switching measurements.
Figure 11 shows how the board should be connected to make the switching measurements.
Gate
Drive
J10
Q1
Q2
CON1
CON2
CON3,
CON4
HV
DC
L
CBULK
J9
Current viewing
resistor
Figure 11. Clamped Inductive Switching Measurement Circuit
A precision current viewing resistor will be needed so that the current though Q1 can be measured.
There are provisions (J9) on the board for installing a through-hole current viewing resistor. The
board comes with a jumper in place. This jumper must be removed when adding a current viewing
resistor. T&M Research makes a viewing resistor (part #SDN-414-01) (Figure 12) that can be used
with this board. The resistor has a resistance of 10milliohms and therefore works with most

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
oscilloscopes with the probe attenuation set to x100. If the user selects a different resistor, the user
should ensure that the resistor has minimal insertion inductance.
Figure 12. SDN-414-01 (sold separately)
Due to the fast switching speeds associated with Cree SiC MOSFETs, the following steps must be
followed closely to yield the most accurate results possible:
Scope probes measuring VDS and VGS must have minimal loop area between the signal and
ground.
The oscilloscope probes measuring VDS and IDS must be properly deskewed.
Bulk capacitance may need to be added to the board to minimize DC link voltage sag during
two-pulse measurements. The amount will vary based on desired current level and pulse
width.
Figure 14 shows a two-pulse setup. Figure 15 shows the waveforms measured with this two-
pulse setup.

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
Figure 14. Probes connected to evaluation board
Figure 15. Waveforms measured with evaluation board

18
CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
6. Appendix
WARNING: HIGH
VOLTAGE / SOME
COMPONENTS WILL GET
HOT.

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
7. PCB Layout Drawings
Top Traces

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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
Top Silkscreen
Inner Layer 1 Traces