Altima AC101 Series User manual

PRELIMINARY DATA SHEET
■AC101
AC101-DS01-405-R¥¥¥¥¥
16215 Alton Parkway • P.O. Box 57013 • Irvine, CA 92619-7013 • Phone: [phone] • Fax: [phone]/01
AC101QF/TF Ultra Low Power 10/100
Ethernet Transceiver
Figure 1: Functional Block Diagram
GENERAL DESCRIPTION FEATURES
The AC101QF/TF is a highly integrated, 3.3V, low power,
10BASE-T/100BASE-TX/FX, Ethernet transceiver implement-
ed in 0.35 µm CMOS technology. Multiple modes of operation,
including normal operation, test mode and power saving mode,
are available through either hardware or software control.
Features include MAC interfaces, encoder/decoders (EN-
DECs), Scrambler/Descrambler, and Auto-Negotiation (ANeg)
with support for parallel detection. The transmitter includes a
dual-speed clock synthesizer that only needs one external clock
source (crystal or clock oscillator). The chip has built-in wave
shaping driver circuit for both 10 Mbps and 100 Mbps, eliminat-
ing the need for an external hybrid filter. The receiver has an
adaptive equalizer/DC restoration circuit for accurate clock and
data recovery for the 100BASE-TX signal. It also provides an
on-chip low pass filer/Squelch circuit for the 10BASE-T signal.
MAC interfaces to support 10/100 MII, 100M only Symbol
Mode, 10M only Symbol Mode and 10M only 7 wire interface
are included.
The AC101TF and the AC101QF are the same product in differ-
ent packages.
•MII MAC connection
- 5 Volt tolerant and 2.5 Volt capable
•10/100 TX/FX
- Full-duplex or half-duplex
- FEFI on 100FX
•Two packages: 80TQFP and 100PQFP
•Industrial temperature: -40°C to +85°C
•Very low power – TYP < 280 mW (Total)
- Cable Detect mode – TYP < 40 mW (Total)
- Power Down mode – TYP < 3.3 mW (Total)
- Selectable TX drivers for 1:1 or 1.25:1 transformers for
additional power reduction
•3.3 Volt .35 micron CMOS
•Fully compliant with
- IEEE 802.3/802.3u
-MII
•Baseline Wander Compensation
•Multi-Function LED outputs
•Legacy 10BASE-T 7 wire interface
•100M Symbol Mode/10M Symbol Mode
•Cable length indicator
•Reverse polarity detection and correction with register bit
indication – automatic or forced
•8 programmable interrupts
•Diagnostic registers
10TX
10RX
100RX
100TX
20 MHzControl/Status
25 MHz
XTLP/N CKIN TEST[3:0] LED Drivers
RX FLP
Mux
Auto-
Negotiation
10BASE-T
PLL Clk Gen
Test/LED Control
MII Serial Management
Interface and Registers
MII Data
Interface
PHYAD[4:0]
PMA
o Clk Recov
o Link Mon
o Signal Det
TP_PMD
o MLT-3
o BLW
o Stream
MAC
or
RIC
Interface
PCS
o Framer
o Carrier
Cipher
Detect
o 4B/5B
MII Serial
Mgmt
Interface
TXOP/TXON
RXIP/RXIN
FXTP/FXTN
FXRP/FXRN

Altima Communications, Inc.
A Wholly Owned Subsidiary of
Broadcom Corporation
P.O. Box 57013
16215 Alton Parkway
Irvine, CA 92619-7013
© 2001 by Altima Communications, Inc.
All rights reserved
Printed in the U.S.A.
Broadcom®, the pulse logo, and QAMLink are registered trademarks of Broadcom Corporation and/or its subsidiaries in the
United States and certain other countries. All other trademarks are the property of their respective owners.
This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed, intended, or
certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous
substances management, or other high risk application. BROADCOM PROVIDES THIS DATA SHEET "AS-IS", WITHOUT
WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING,
WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PUR-
POSE, AND NON-INFRINGEMENT.
Revision History
Revision Date Change Description
AC101-DS00-R 5/22/01 Initial release.
AC101-DS01-R Changed signal names: FX_DIS, FXRP/FXRN, FXTP/FXTN, RXIP/RX-
IN, and TXOP/TXON.

Preliminary Data Sheet ■AC101
06/04/01
Broadcom
Document AC101-DS01-405-R¥¥¥¥¥ Page iii
TABLE OF CONTENTS
Section 1: Functional Description......................................................................................1
Overview ....................................................................................................................................................... 1
MAC Interface............................................................................................................................................... 1
Media Independent Interface (MII).......................................................................................................... 1
Serial Management Interface (SMI)................................................................................................. 1
Interrupts.......................................................................................................................................... 2
Carrier Sense/RX_DV...................................................................................................................... 2
7-Wire Serial Interface............................................................................................................................ 2
PCS Bypass............................................................................................................................................ 3
100 Mbps PCS Bypass.................................................................................................................... 3
10 Mbps PCS Bypass...................................................................................................................... 3
Media Interface............................................................................................................................................. 3
10BASE-T Interface................................................................................................................................ 3
Transmit Function............................................................................................................................ 3
Receive Function............................................................................................................................. 3
Link Monitor ..................................................................................................................................... 3
100BASE-TX Interface............................................................................................................................ 3
Transmit Function............................................................................................................................ 4
Parallel to Serial, NRZ to NRZI, and MLT3 Conversion................................................................... 4
Receive Function............................................................................................................................. 4
Baseline Wander Compensation ..................................................................................................... 5
Clock/Data Recovery....................................................................................................................... 5
Decoder/De-scrambler..................................................................................................................... 5
Link Monitor ..................................................................................................................................... 5
100BASE-FX Interface............................................................................................................................ 6
Transmit Function............................................................................................................................ 6
Receive Function............................................................................................................................. 6
Link Monitor ..................................................................................................................................... 6
Far-End-Fault-Insertion (FEFI)......................................................................................................... 6
10BASE-T/100BASE-TX/FX Interface.................................................................................................... 6
Multi-Mode Transmit Driver.............................................................................................................. 6
Adaptive Equalizer.......................................................................................................................... 7

■AC101 Preliminary Data Sheet
TABLE OF CONTENTS 06/04/01
Broadcom
Page iv Document AC101-DS01-405-R¥¥¥¥¥
PLL Clock Synthesizer.....................................................................................................................7
Jabber and SQE (Heartbeat)............................................................................................................7
Reverse Polarity Detection and Correction ......................................................................................7
Hardware Configuration...........................................................................................................................7
Software Configuration............................................................................................................................7
LED Outputs.....................................................................................................................................7
Auto-Negotiation......................................................................................................................................8
Parallel Detection ....................................................................................................................................9
Diagnostics..............................................................................................................................................9
Loopback Operation.........................................................................................................................9
Cable Length Indicator.....................................................................................................................9
Reset and Power.........................................................................................................................................10
Clock Input..................................................................................................................................................10
Section 2: Signal Definitions and Pin Assignments...................................................... 11
Pin Descriptions .........................................................................................................................................11
PHY Address Pins.................................................................................................................................11
MDI (Media Dependent Interface) Pins.................................................................................................11
MII (Media Independent Interface) 100 PCS Bypass Pins....................................................................12
10 Mbps PCS Bypass Pins....................................................................................................................13
10 Mbps 7-Wire Interface Pins..............................................................................................................13
Special/Test Pins...................................................................................................................................14
Control and Status Pins.........................................................................................................................14
LED Indicators Pins...............................................................................................................................16
Power and Ground Pins ........................................................................................................................17
No Connect Pins....................................................................................................................................18
Technology Selections...............................................................................................................................18
Advanced LED Selections .........................................................................................................................19
Section 3: Pinout Diagrams.............................................................................................. 21
AC101QF Pinout Diagram..........................................................................................................................21
AC101TF Pinout Diagram...........................................................................................................................22
Section 4: Register Descriptions..................................................................................... 23
Register Summary......................................................................................................................................23
MII-Specified Registers..............................................................................................................................24

Preliminary Data Sheet ■AC101
06/04/01 TABLE OF CONTENTS
Broadcom
Document AC101-DS01-405-R¥¥¥¥¥ Page v
Register 0: Control Register.................................................................................................................. 24
Register 1: Status Register................................................................................................................... 25
Register 2: PHY Identifier 1 Register.................................................................................................... 26
Register 3: PHY Identifier 2 Register.................................................................................................... 26
Register 4: Auto-Negotiation Advertisement Register........................................................................... 26
Register 5: Auto-Negotiation Link Partner Ability Register.................................................................... 27
Register 6: Auto-Negotiation Expansion Register.................................................................................28
Register 7: Auto-Negotiation Next Page Transmit Register.................................................................. 28
Altima-Specified Registers........................................................................................................................ 29
Register 16: Polarity and Interrupt Level Register ................................................................................ 29
Register 17: Interrupt Control/Status Register...................................................................................... 30
Register 18: Diagnostic Register .......................................................................................................... 30
Register 19: Power/Loopback Register ................................................................................................ 31
Register 20: Cable Measurement Register........................................................................................... 31
Register 21: Mode Control Register...................................................................................................... 32
Register 24: Receive Error Counter Register........................................................................................ 33
4B/5B Code-Group Table........................................................................................................................... 33
SMI Read/Write Sequence ......................................................................................................................... 34
Section 5: Electrical Characteristics................................................................................35
Operating Range................................................................................................................................... 35
Total Power Consumption..................................................................................................................... 35
TTL I/O Characteristics......................................................................................................................... 35
REFCLK and XTAL Pin Characteristics................................................................................................ 36
I/O Characteristics – LED/CFG Pin Characteristics.............................................................................. 36
100BASE-TX Transceiver Characteristics............................................................................................ 36
10BASE-T Transceiver Characteristics................................................................................................. 37
100BASE-FX Transceiver Characteristics............................................................................................ 37
10BASE-T Link Integrity Timing Characteristics................................................................................... 38
Section 6: Timing and AC Characteristics ......................................................................39
Digital Timing Characteristics .................................................................................................................. 39
Power on Reset Timing......................................................................................................................... 39
Management Data Interface Timing...................................................................................................... 39
100BASE-TX/FX MII Transmit System Timing ..................................................................................... 40
100BASE-TX/FX MII Receive System Timing ...................................................................................... 41

■AC101 Preliminary Data Sheet
TABLE OF CONTENTS 06/04/01
Broadcom
Page vi Document AC101-DS01-405-R¥¥¥¥¥
10BASE-T MII Transmit System Timing................................................................................................42
10BASE-T MII Receive System Timing.................................................................................................44
10BASE-T 7-Wire Transmit System Timing..........................................................................................45
10BASE-T 7-Wire Receive System Timing...........................................................................................46
10BASE-T 7-Wire Collision Timing........................................................................................................46
Recommended Board Circuitry.................................................................................................................47
TX Application Termination ...................................................................................................................47
FX Application Termination ...................................................................................................................48
Power and Ground Filtering for AC101QF ............................................................................................49
Power and Ground Filtering for AC101TF.............................................................................................50
Section 7: Mechanical Information.................................................................................. 51
Package Dimensions for AC101QF (100 pin PQFP) ................................................................................51
Package Dimensions for AC101TF (80 pin TQFP)...................................................................................52

Preliminary Data Sheet ■AC101
06/04/01
Broadcom
Document AC101-DS01-405-R¥¥¥¥¥ Page vii
LIST OF FIGURES
Figure 1: Functional Block Diagram.................................................................................................................i
Figure 2: Multifunction LED Pin Connection................................................................................................. 19
Figure 3: Dual-color LED Indicator for Link, Duplex, and Activity Status ..................................................... 20
Figure 4: AC101QF Pinout Diagram ............................................................................................................ 21
Figure 5: AC101TF Pinout Diagram............................................................................................................. 22
Figure 6: Power-on Reset Timing................................................................................................................. 39
Figure 7: Management Data Interface Timing.............................................................................................. 40
Figure 8: 100BASE-TX/FX MII Transmit Timing .......................................................................................... 41
Figure 9: 100BASE-TX/FX MII Receive Timing ........................................................................................... 42
Figure 10: 10BASE-T MII Transmit Timing .................................................................................................... 43
Figure 11: 10BASE-T MII Receive Timing ..................................................................................................... 44
Figure 12: 10BASE-T 7-WireTransmit Timing................................................................................................ 45
Figure 13: 10BASE-T 7-Wire Receive Timing................................................................................................ 46
Figure 14: 10BASE-T 7-Wire Collision Timing ............................................................................................... 47
Figure 15: TX Application Termination Circuit................................................................................................ 47
Figure 16: FX Application Termination Circuit................................................................................................ 48
Figure 17: Power and Ground Filtering for the AC101QF.............................................................................. 49
Figure 18: Power and Ground Filtering for the AC101TF............................................................................... 50
Figure 19: Package Dimensions for AC101QF (100 pin PQFP).................................................................... 51
Figure 20: Package Dimensions for AC101TF (80 pin TQFP)....................................................................... 52

■AC101 Preliminary Data Sheet
LIST OF FIGURES 06/04/01
Broadcom
Page viii Document AC101-DS01-405-R¥¥¥¥¥

Preliminary Data Sheet ■AC101
06/04/01
Broadcom
Document AC101-DS01-405-R¥¥¥¥¥ Page ix
LIST OF TABLES
Table 1: PHY Address Pins......................................................................................................................... 11
Table 2: MDI (Media Dependent) Pins........................................................................................................ 11
Table 3: MII (Media Independent Interface) 100 PCS Bypass Pins............................................................ 12
Table 4: 10 Mbps PCS Bypass Pins........................................................................................................... 13
Table 5: 10 Mbps 7-Wire Interface Pins...................................................................................................... 13
Table 6: Special/Test Pins .......................................................................................................................... 14
Table 7: Control and Status Pins ................................................................................................................ 14
Table 8: LED Indicator Pins ........................................................................................................................ 16
Table 9: Power and Ground Pins................................................................................................................ 17
Table 10: No Connect Pins........................................................................................................................... 18
Table 11: Technology Solutions.................................................................................................................... 18
Table 12: Advanced LED Selections............................................................................................................. 19
Table 13: Register Summary ........................................................................................................................ 23
Table 14: Register 0: Control Register.......................................................................................................... 24
Table 15: Register 1: Status Register ........................................................................................................... 25
Table 16: Register 2: PHY Identifier 1 Register ............................................................................................ 26
Table 17: Register 3: PHY Identifier 2 Register ............................................................................................ 26
Table 18: Register 4: Auto-Negotiation Advertisement Register................................................................... 26
Table 19: Register 5: Auto-Negotiation Link Partner Ability Register............................................................ 27
Table 20: Register 6: Auto-Negotiation Expansion Register......................................................................... 28
Table 21: Register 7: Auto-Negotiation Next Page Transmit Register.......................................................... 28
Table 22: Register 16: Polarity and Interrupt Level Register ........................................................................ 29
Table 23: Register 17: Interrupt Control/Status Register.............................................................................. 30
Table 24: Register 18: Diagnostic Register................................................................................................... 30
Table 25: Register 19: Power/Loopback Register......................................................................................... 31
Table 26: Register 20: Cable Measurement Register................................................................................... 31
Table 27: Register 21: Mode Control Register.............................................................................................. 32
Table 28: Register 24: Receive Error Counter Register................................................................................ 33
Table 29: 4B/5B Code-Group Table.............................................................................................................. 33
Table 30: SMI Read/Write Sequence............................................................................................................ 34
Table 31: Total Power Consumption............................................................................................................. 35
Table 32: TTL I/O Characteristics................................................................................................................. 35

■AC101 Preliminary Data Sheet
LIST OF TABLES 06/04/01
Broadcom
Page x Document AC101-DS01-405-R¥¥¥¥¥
Table 33: REFCLK and XTAL Pin Characteristics ........................................................................................36
Table 34: I/O Characteristics – LED/CFG Pin Characteristics ......................................................................36
Table 35: 100BASE-TX Transceiver Characteristics.....................................................................................36
Table 36: 10BASE-T Transceiver Characteristics.........................................................................................37
Table 37: 100BASE-FX Transceiver Characteristics.....................................................................................37
Table 39: Power On Reset Timing ................................................................................................................39
Table 40: Management Data Interface Timing ..............................................................................................39
Table 41: 100BASE-TX/FX MII Transmit System Timing..............................................................................40
Table 42: 100BASE-TX/FX MII Receive System Timing...............................................................................41
Table 43: 10BASE-T MII Transmit System Timing........................................................................................42
Table 44: 10BASE-T MII Receive System Timing.........................................................................................44
Table 45: 10BASE-T 7-Wire Transmit System Timing ..................................................................................45
Table 46: 10BASE-T 7-Wire Receive System Timing ...................................................................................46
Table 47: 10BASE-T 7-Wire Collision Timing................................................................................................46
Table 48: Quad Flat Pack Outline: 20 x 14 mm.............................................................................................51
Table 49: Quad Flat Pack Outline: 12 x 12 mm.............................................................................................52