Hyundai HPT-4205 User manual

42 PLASMA TV
(Built-inTuner)
SERVICEMANUAL

i
PlasmaTVServiceManual 14/03/2005
TABLEOFCONTENTS
1. INTRODUCTION......................................................................................................................................1
2. TUNER......................................................................................................................................................1
3. IFPART(TDA9886).................................................................................................................................1
4. MULTI STANDARD SOUND PROCESSOR............................................................................................2
5. VIDEOSWITCH TEA6415.......................................................................................................................2
6. AUDIOAMPLIFIERSTAGEWITHTDA8928...........................................................................................2
7. POWERSUPPLY(SMPS).......................................................................................................................3
8. MICROCONTROLLER.............................................................................................................................3
9. SERIALACCESSCMOS4Kx8(32Kbit)EEPROM24C32A.................................................................3
10.CLASS AB STEREOHEADPHONEDRIVERTDA1308.........................................................................3
11.SAWFILTERS..........................................................................................................................................3
12.ICDESCRIPTIONS..................................................................................................................................4
12.1.MC44608...........................................................................................................................................5
12.2.TCET1102G......................................................................................................................................6
12.3.TDA9886...........................................................................................................................................6
12.4.TEA6415C.........................................................................................................................................7
12.5.SAA3010T.........................................................................................................................................8
12.6.24C32A..............................................................................................................................................9
12.7.SAA5264.........................................................................................................................................10
12.8.LM317..............................................................................................................................................12
12.9.LM393..............................................................................................................................................12
12.10.ST24LC21.......................................................................................................................................13
12.11.TLC7733..........................................................................................................................................13
12.12.74LVC14A.......................................................................................................................................14
12.13.LM1086............................................................................................................................................15
12.14.LM1117............................................................................................................................................16
12.15.DS90C385.......................................................................................................................................16
12.16.TL431..............................................................................................................................................18
12.17.MSP34X0G(MSP3410G)...............................................................................................................18
12.18.TDA8928.........................................................................................................................................21
12.19.TDA1308.........................................................................................................................................22
12.20.PI5V330...........................................................................................................................................22
12.21.AD9883A.........................................................................................................................................22
12.22.SAA7118E.......................................................................................................................................26
12.23.TPS72501........................................................................................................................................31
12.24.TSOP1836.......................................................................................................................................32
12.25.PCF8591.........................................................................................................................................33
12.26.PW1231...........................................................................................................................................33
12.27.PW181.............................................................................................................................................34
12.28.SIL151B...........................................................................................................................................35
12.29.SDRAM 4Mx16 (MT48LC4M16A2TG-75).....................................................................................36
12.30.FLASH8MBit...................................................................................................................................38
13.SERVICEMENU SETTINGS.................................................................................................................39
13.1.displaymenu...................................................................................................................................39
13.2.calibration menu..............................................................................................................................41
13.3.deinterlacermenu............................................................................................................................43
13.4.factory settingsmenu......................................................................................................................45
14.BLOCKDIAGRAMS...............................................................................................................................46
15.CIRCUITDIAGRAMS.............................................................................................................................54

1
PlasmaTVServiceManual 14/03/2005
1.INTRODUCTION
42 PlasmaTVisaprogressiveTVcontrol systemwithbuilt-in de-interlacer and scaler.Itusesa
852*480 panelwith16:9aspect ratio.TheTViscapableof operationin PAL, SECAM,NTSC(playback)
colourstandardsandmultipletransmissionstandardsasB/G,D/K,I/I!,and L/L´including German and
NICAM stereo.Sound systemoutputissupplying 2x10W(10%THD)forstereo 8 speakers.The
chassisisequipped withmanyinputsand outputsallowingittobe usedasacenterofamedia system.
Itsupportsfollowing peripherals:
2SCART sockets
1AVinput(CVBS+Stereo Audio)
1SVHSinput
1StereoHeadphoneoutput
1D-Sub 15PCinput
1DVIinput
1Stereoaudio inputforPC/DVI
1Stereoaudio output
2.TUNER
The tuners used in the design arecombined VHF,UHFtuners suitable forCCIRsystems B/G,H, L,L!,
I/I!,andD/K.Thetuningisavailable through the digitallycontrolledI2 Cbus(PLL).Below you willfind
infoon one oftheTunersin use.
GeneraldescriptionofUV1316:
The UV1316 tunerbelongstothe UV1300 familyof tuners,whicharedesignedtomeetawide range of
applications. It isacombined VHF, UHF tunersuitable forCCIRsystemsB/G,H, L, L!,I and I!.The low
IFoutputimpedancehasbeendesigned fordirectdriveofawide varietyofSAWfilters withsufficient
suppressionoftripletransient.
Features ofUV1316:
1.MemberoftheUV1300 familysmall sized UHF/VHFtuners
2.Systems CCIR:B/G,H,L, L!,Iand I!;OIRT: D/K
3.Digitallycontrolled (PLL)tuningvia I2C-bus
4.Off-airchannels,S-cablechannelsand Hyperband
5.Worldstandardised mechanical dimensionsand world standardpinning
6.Compactsize
7.Compliesto "CENELECEN55020 and "EN55013
Pinning:
1.Gain controlvoltage (AGC):4.0V,Max:4.5V
2.Tuningvoltage
3.I²C-busaddressselect:Max:5.5V
4.I²C-busserial clock :Min:-0.3V,Max:5.5V
5.I²C-busserial data:Min:-0.3V,Max:5.5V
6.Not connected
7.PLL supplyvoltage :5.0V,Min:4.75V,Max:5.5V
8.ADC input
9.Tunersupplyvoltage :33V,Min:30V, Max:35V
10.Symmetrical IFoutput1
11.Symmetrical IFoutput2
3.IFPART(TDA9886)
The TDA9886 isan alignment-free multistandard(PAL,SECAMandNTSC)vision and sound IF signal PLL.
The following figureshowsthe simplified blockdiagramof the integrated circuit.
The integrated circuit comprisesthe following functional blocks:
VIF amplifier,Tunerand VIF-AGC,VIF-AGCdetector,FrequencyPhase-Locked Loop (FPLL)detector,VCO
and divider,Digital acquisition helpand AFC,Video demodulatorand amplifier,Sound carriertrap,SIF
amplifier,SIF-AGCdetector,SinglereferenceQSS mixer,AMdemodulator,FMdemodulatorand acquisition
help,Audio amplifierand mutetimeconstant, I²C-bustransceiversand MAD(module address),Internal
voltage stabilizer.

2
PlasmaTVServiceManual 14/03/2005
4.MULTISTANDARD SOUND PROCESSOR
The MSP34x0Gfamilyofsingle-chipMultistandardSound Processorscovers the sound processingof
allanalogue TV-Standardsworldwide, aswellasthe NICAM digitalsound standards. The full TVsound
processing,startingwithanaloguesound IFsignal-in,down toprocessed analogue AF-out, is
performed on asingle chip.
TheseTVsoundprocessingICsinclude versionsforprocessing the multichannel television sound
(MTS) signalconforming tothestandardrecommended bytheBroadcastTelevision Systems
Committee(BTSC).TheDBX noisereduction,oralternatively,MicronasNoiseReduction (MNR)is
performed alignmentfree.OtherprocessedstandardsaretheJapaneseFM-FMmultiplexstandard
(EIA-J) and the FMStereo Radiostandard.
CurrentICshavetoperform adjustmentproceduresin ordertoachievegoodstereo separation for
BTSCand EIA-J.The MSP 34x1Ghasoptimumstereo performancewithoutanyadjustments.
5.VIDEO SWITCH TEA6415
Incaseofthreeormoreexternalsourcesareused,the video switchICTEA6415 isused.The main
function ofthisdeviceistoswitch8video-inputsourcesonthe 6outputs.
Eachoutputcanbe switched on onlyone ofeachinput.Oneachinputan alignmentofthe lowestlevel
ofthe signalismade (bottomofsync. topforCVBS orblacklevelforRGBsignals).
Eachnominal gain between anyinputandoutputis6.5dB.ForD2MACorChromasignalthe alignment
isswitched off byforcing,withan externalresistorbridge,5VDC on the input.Eachinputcan beused
asanormal inputorasaMACorChromainput(withexternalResistorBridge).Allthe switching
possibilitiesarechanged through the BUS. Driving75ohmload needsan externalresistor.It ispossible
tohavethe sameinputconnected toseveral outputs.
6.AUDIO AMPLIFIERSTAGEWITHTDA8928
The TDA8928 isaswitchingpowerstage forahighefficiency class-Daudiopoweramplifiersystem.
Withthispowerstageacompact 2x10 Wselfoscillatingdigital amplifiersystemcan be built,operating
withhighefficiency and very low dissipation.No heatsinkisrequired.The systemoperatesoverawide
supplyvoltagerangefrom+-7.5Vupto+-30Vand consumesaverylowquiescentcurrent.

3
PlasmaTVServiceManual 14/03/2005
7.POWERSUPPLY(SMPS)
The DC voltagesrequired atvariouspartsofthe chassisareprovidedbyan SMPS transformer
controlled bythe ICMC44608,whichisdesignedfordriving,controlling and protecting switching
transistorofSMPS.Thetransformergenerates145VforFBTinput,+/-14Vforaudio amplifier,5Vand
3.3Vstand byvoltageand8V,12Vand5Vsuppliesforotherdifferentpartsofthe chassis.
Anoptocouplerisusedtocontrolthe regulationofline voltage and stand-bypowerconsumption.There
isaregulation circuitin secondary side.Thiscircuitproducesacontrolvoltageaccording tothe
changesin 145VDC voltage,via an optocoupler(TCET1102G)topin3 oftheIC.
Duringthe switchon period ofthe transistor,energyisstored in the transformer.Duringthe switchoff
period energyisfedtothe loadvia secondarywinding.By varying switch-on timeofthe power
transistor,itcontrolseachportion ofenergytransferred tothe second side suchthattheoutputvoltage
remainsnearlyindependentofload variations.
8.MICROCONTROLLER
The microprocessorisembeddedinside PW181 chip whichalsohandlesscaling, framerateconversion
andOSDgeneration. Theon-chip 16-bit microprocessorisaTurbo x86-compatible processorcorewith
on-chipperipherals(timers,interruptcontroller,2-wireserial master/slaveinterface,UART,I/Oports,
andmore).SpecialperipheralssuchasInfrared (IR)pulsedecoders andadigital pulsewidthmodulator
(PWM) arealsoincluded.Therearetwo independent2-wireserial master/slaveinterfacemodulesthat
can bemultiplexedtocontrolup tofive2-wireserial ports.The slave2-wireinterfaceisdesignedfor
HDCPuseonly(andrequiresthe useofHDCPImage Processors).On-chipRAM ofup to64 Kbytesis
available.Acompletemicroprocessorsystemcan be implemented simplybyaddingexternal ROM.The
on-chipprocessorcan be disabledtoallow external processorcontrolof all internalfunctions.
9.SERIALACCESS CMOS4Kx8(32Kbit) EEPROM24C32A
The Microchip TechnologyInc.24C32Aisa4Kx8(32Kbit)Serial ElectricallyErasable PROM.Ithas
beendevelopedforadvanced,low powerapplicationssuchaspersonal communicationsordata
acquisition.The 24C32Aalsohasapage-writecapabilityofupto32 bytesofdata.The 24C32Ais
capable ofbothrandomand sequential readsuptothe 32Kboundary.Functional address linesallow
up toeight24C32Adeviceson the samebus,forup to256Kbitsaddressspace.AdvancedCMOS
technologyand broadvoltagerange makethisdeviceideal forlow-power/low-voltage, non-volatile code
anddataapplications.
10.CLASS AB STEREO HEADPHONEDRIVERTDA1308
The TDA1308 isan integrated class AB stereo headphone drivercontained inaDIP8plasticpackage.
The deviceisfabricated in a1mmCMOSprocessand hasbeenprimarilydevelopedforportable digital
audio applications.
11.SAWFILTERS
K9656M:
Standard:
$B/G
$D/K
$I
$L/L!
Features
$TVIFaudiofilterwithtwo channels
$Channel 1(L!)withone pass band forsound carriers at40.40MHz(L!)and 39.75 MHz(L!-NICAM)
$Channel 2(B/G,D/K,L, I)withone passband forsoundcarriers between 32.35 MHzand 33.40 MHz
Terminals
$TinnedCuFealloy
Pinconfiguration
1Input
2Switching input
3Chipcarrier-ground
4Output
5Output

4
PlasmaTVServiceManual 14/03/2005
K3953M:
Standard:
$B/G
$D/K
$I
$L/L!
Features
TVIF video filterwithNyquist slopesat 33.90 MHzand 38.90 MHz
Constant groupdelay
Suitable forCENELECEN55020
Terminals
Tinned CuFealloy
Pin configuration
1Input
2Input -ground
3Chipcarrier-ground
4Output
5Output
12.ICDESCRIPTIONS
MC44608
TCET1102G
TDA9886
TEA6415C
SAA3010T
24C32
SAA5264
LM317T
LM393
ST24LC21
TLC7733
74LVC257A
74LVC14A
LM1086
LM1117
DS90C385
TL431
MSP3410G
TDA8928
TDA1308
PI5V330
AD9883A
SAA7118E
TPS72501
TSOP1836
PCF8591
PW1231
PW181
SIL151B
SDRAM 4Mx16 (MT48LC4M16A2TG-75)
FLASH

5
PlasmaTVServiceManual 14/03/2005
12.1.MC44608
12.1.1.Description
The MC44608 isahigh performancevoltage modecontrollerdesignedforoff%lineconverters. Thishigh
voltagecircuitthatintegratesthe start%up currentsourceand the oscillatorcapacitor,requiresfew
external componentswhile offering ahigh flexibilityand reliability.The devicealsofeaturesavery high
efficiency stand%bymanagementconsistingofan effectivePulsed Mode operation.Thistechnique
enablesthe reductionofthe stand%bypowerconsumptiontoapproximately1Wwhiledelivering 300mW
in a150WSMPS.
$Integrated Start%Up CurrentSource
$FastStart%Up
$Lossless Off%Line Start%Up
$DirectOff%Line Operation
12.1.2.GeneralFeatures
$Flexibility
$DutyCycleControl
$UndervoltageLockout withHysteresis
$OnChip OscillatorSwitchingFrequency 40,or75kHz
$SecondaryControl withFew ExternalComponents
Protections
$MaximumDutyCycleLimitation
$Cycle byCycleCurrentLimitation
$Demagnetization(ZeroCurrentDetection)Protection
$"OverVCC Protection AgainstOpenLoop
$Programmable Low Inertia OverVoltage Protection AgainstOpen Loop
$Internal ThermalProtection
GreenLineTM Controller
$PulsedMode TechniquesforaVery HighEfficiency LowPowerMode
$LosslessStartup
$LowdV/dTforLow EMIRadiations
12.1.3.PinConnections
PinNameDescription
1DemagTheDemagpinoffers3differentfunctions: Zerovoltage crossingdetection(50mV),24mAcurrent
detectionand120mAcurrentdetection.The24mAlevelisusedtodetectthesecondary
reconfigurationstatusand the120mAleveltodetectanOverVoltagestatuscalledQuick OVP.
2ISENSETheCurrentSensepinsensesthevoltagedevelopedontheseriesresistorinsertedinthesource
ofthepowerMOSFET.WhenIsensereaches1V,theDriveroutput(pin 5)isdisabled.Thisis
knownastheOverCurrentProtectionfunction.A200mAcurrent sourceisflowingout of thepin3
duringthestart%upphaseandduringthe switchingphaseincaseof thePulsedMode of operation.
Aresistorcanbeinsertedbetweenthesenseresistorandthepin3;thusaprogrammable peak
currentdetectioncanbeperformedduringtheSMPS stand%bymode.
3ControlInputAfeedbackcurrent fromthesecondarysideoftheSMPS via theopto%couplerisinjectedintothis
pin. Aresistorcanbeconnectedbetweenthispin andGND toallowtheprogrammingoftheBurst
dutycycleduringtheStand%bymode.
4GroundThispinisthegroundoftheprimarysideof the SMPS.
5DriverThecurrentandslewratecapabilityofthispinaresuitedtodrivePowerMOSFETs.
6VCC ThispinisthepositivesupplyoftheIC.Thedriveroutputgetsdisabledwhenthevoltagebecomes
higherthan15Vandtheoperatingrangeisbetween6.6Vand13V.Anintermediatevoltagelevel
of 10Vcreatesadisablingcondition calledLatchedOff phase.
7Thispinistoprovideisolationbetween theVipin8andtheVCC pin6.
8ViThispincan bedirectlyconnected toa500Vvoltagesourceforstart%upfunctionoftheIC. During
theStart%upphasea9mAcurrent sourceisinternallydeliveredtotheVCC pin6allowingarapid
chargeof theVCC capacitor. Assoon astheICstarts%up,thiscurrent sourceisdisabled.

6
PlasmaTVServiceManual 14/03/2005
12.2.TCET1102G
12.2.1.Description
The TCET110/TCET2100/TCET4100 consistsofaphototransistoropticallycoupledtoagallium
arsenide infrared-emitting diodeina4-lead upto16-leadplasticdual inlinepackage.The elementsare
mounted on one leadframeusing a coplanartechnique, providing afixed distancebetweeninput and
output forhighestsafetyrequirements.
12.2.2.Applications
Circuitsforsafeprotectiveseparation againstelectricalshockaccordingtosafetyclass II(reinforced
isolation):
Forappl.class I %IVatmainsvoltage 300 V
Forappl.class I %IIIatmainsvoltage 600 V
According toVDE0884,table2,suitable for: Switch-modepower supplies,linereceiver,computer
peripheralinterface,microprocessorsysteminterface.
12.2.3.13.12.3.Features
VDE0884 relatedfeatures:
Rated impulsevoltage (transientovervoltage)V IOTM =8kV peak
Isolation testvoltage (partialdischargetestvoltage)V pd =1.6kV
Rated isolationvoltage(RMS includesDC)V IOWM =600V RMS (848Vpeak)
Rated recurring peakvoltage(repetitive)V IORM =600V RMS
Generalfeatures:
CTRoffered in 9groups
Isolationmaterialsaccording toUL94-VO
Pollution degree 2(DIN/VDE0110/resp.IEC664)
Climaticclassification 55/100/21 (IEC68 part1)
Specialconstruction:Therefore,extralow coupling capacityoftypical0.2pF, high Common Mode
Rejection
LowtemperaturecoefficientofCTR
G=Leadform10.16 mm;providescreepagedistance>8mm,forTCET2100/TCET4100optional;
suffixletter &G!isnot markedon theoptocoupler
Coupling SystemU
12.3.TDA9886
12.3.1.GeneralDescription
The TDA9886isan alignment-free single standard(withoutpositivemodulation)vision and sound IF signal
PLL.
12.3.2.Features
$5Vsupplyvoltage
$Gain controlled wide-band Vision IntermediateFrequency (VIF)amplifier(AC-coupled)
$Multistandardtrue synchronousdemodulation withactivecarrierregeneration(verylineardemodulation,
good intermodulation figures, reduced harmonics, excellent pulseresponse)
$Gated phasedetectorforL/Laccent standard
$Fullyintegrated VIF Voltage Controlled Oscillator(VCO),alignment-free;frequenciesswitchable forall
negativeand positivemodulated standardsvia I2C-bus
$Digital acquisition help, VIF frequenciesof 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz
$4MHzreferencefrequency input[signal fromPhase-Locked Loop (PLL)tuning system]oroperating as
crystal oscillator
$VIFAutomaticGain Control (AGC)detectorforgain control,operating aspeaksyncdetectorfornegative
modulated signalsand asapeakwhitedetectorforpositivemodulated signals
$PrecisefullydigitalAutomaticFrequencyControl (AFC)detectorwith4-bitdigital-to-analogue converter;
AFCbitsvia I2C-busreadable

7
PlasmaTVServiceManual 14/03/2005
$TakeOverPoint (TOP) adjustable viaI2C-busoralternativelywithpotentiometer
$Fullyintegrated soundcarriertrap for4.5, 5.5, 6.0and 6.5MHz, controlled byFM-PLL oscillator
$Sound IF (SIF)input forsingle referenceQuasiSplit Sound (QSS)mode (PLL controlled)
$SIF AGCforgain controlled SIF amplifier;single referenceQSSmixerabletooperatein high performance
singlereferenceQSSmode and in intercarriermode, switchable via I2C-bus
$AMdemodulatorwithout extrareferencecircuit
$Alignment-free selectiveFM-PLL demodulatorwithhigh linearityandlownoise
$I2C-buscontrol forallfunctions
$I2C-bustransceiverwithpin programmableModule Address(MAD).
12.3.3.Pinning
SYMBOLPINDESCRIPTION
VIF11 VIFdifferential input 1
VIF2 2VIFdifferential input 2
OP1 3output 1(open-collector)
FMPLL 4FM-PLL forloop filter
DEEM 5de-emphasisoutput forcapacitor
AFD 6AFdecoupling input forcapacitor
DGND 7digitalground
AUD 8audio output
TOP 9tunerAGCTakeOverPoint (TOP)
SDA 10 I2C-busdatainput/output
SCL 11 I2C-busclock input
SIOMA 12 sound intercarrieroutput and MADselect
n.c. 13 not connected
TAGC 14 tunerAGCoutput
REF 15 4MHzcrystal orreferenceinput
VAGC 16 VIF-AGCforcapacitor; note1
CVBS 17 video output
AGND 18 analog ground
VPLL 19 VIF-PLL forloop filter
VP20 supplyvoltage (+5V)
AFC 21 AFCoutput
OP2 22 output 2(open-collector)
SIF1 23 SIFdifferential input 1
SIF2 24 SIFdifferential input 2
12.4.TEA6415C
12.4.1.GeneralDescription
The mainfunction ofthe ICistoswitch8video inputsourceson6outputs.Eachoutputcan be
switched on onlyoneof eachinput. Oneachinputan alignmentof thelowestlevel ofthe signalismade
(bottomofsynch.topforCVBS orblack level forRGBsignals).Eachnominalgain between anyinput
andoutputis6.5dB.ForD2MACorChromasignal the alignmentisswitched offbyforcing,withan
external resistorbridge,5VDC on the input.Eachinputcan beused asanormalinputorasaMACor
Chromainput(withexternalresistorbridge).Alltheswitching possibilitiesarechanged through the
BUS.Driving75 load needsan external transistor.Itispossibletohavethe sameinputconnectedto
severaloutputs. The startingconfiguration uponpoweron (powersupply:0to10V)isundetermined. In
thiscase,6wordsof16 bitsarenecessary todetermineone configuration.Inothercase,1wordof16
bitsisnecessary todetermine one configuration.
12.4.2.Features
$20MHzBandwidth
$Cascadable withanotherTEA6415C(Internaladdresscan be changed bypin7voltage)
$8Inputs(CVBS,RGB,MAC,CHROMA,...)
$6Outputs

8
PlasmaTVServiceManual 14/03/2005
$PossibilityofMACorchromasignal foreachinputbyswitching-offtheclampwithan external resistor
bridge
$Buscontrolled
$6.5dBgainbetweenanyinputand output
$55dBcrosstalkat5mHz
$FullyESDprotected
12.4.3.Pinning
1.Input:Max:2Vpp,InputCurrent: 1mA,Max:3mA
2.Data:Low level :-0.3VMax:1.5V,
Highlevel:3.0VMax:Vcc+0.5V
3.Input:Max:2Vpp,InputCurrent:1mA, Max: 3mA
4.Clock :Low level :-0.3VMax:1.5V,
Highlevel:3.0VMax:Vcc+0.5V
5.Input:Max:2Vpp,InputCurrent: 1mA,Max:3mA
6.Input:Max:2Vpp,InputCurrent: 1mA,Max:3mA
7.Prog
8.Input:Max:2Vpp,InputCurrent:1mA,Max:3mA
9.Vcc:12V
10.Input:Max:2Vpp,InputCurrent:1mA,Max:3mA
11.Input:Max:2Vpp,InputCurrent:1mA,Max:3mA
12.Ground
13.Output:5.5Vpp,Min :4.5Vpp
14.Output:5.5Vpp,Min :4.5Vpp
15.Output:5.5Vpp,Min :4.5Vpp
16.Output:5.5Vpp,Min :4.5Vpp
17.Output:5.5Vpp,Min :4.5Vpp
18.Output:5.5Vpp,Min :4.5Vpp
19.Ground
20.Input:Max:2Vpp,InputCurrent:1mA,Max: 3mA
12.5.SAA3010T
12.5.1.Description
The SAA3010isintended asageneral purpose(RC-5)infrared remotecontrol systemforusewherealow
voltage supplyand alarge debouncetimeareexpected.The devicecangenerate2048 differentcommands
and utilizesakeyboardwithasingle pole switchforeachkey.Thecommandsarearranged sothat32
systems can be addressed,eachsystemcontaining 64differentcommands.The circuitresponsetolegal
(one keypressed atatime)and illegal (morethan one keypressed atatime)keyboardoperation isspecified
in the section "Keyboardoperation .
12.5.2.Features
Lowvoltage requirement
Biphasetransmission technique
Single pin oscillator
Test mode facility
12.5.3.Pinning
PinMnemonicFunction
1X7(IPU)senseinput fromkeymatrix
2SSM(I) sense modeselection input
3Z0-Z3(IPU)sense inputsfromkeymatrix
7MDATA (OP3)generated outputdatamodulated with1/12theoscillator frequencyata25%dutyfactor
8DATA(OP3)generatedoutputinformation
9-13DR7-DR3(ODN)Scandrivers
14VSS Ground(0V)
15-17 DR-2-DR0(ODN)Scandrivers
18OSC (I) Oscillator input
19TP2(I) test point2

9
PlasmaTVServiceManual 14/03/2005
20TP1(I) Test point1
21-27 X0-X6(IPU)Senseinputsfromkeymatrix
28VDD(I)Voltagesupply
Note:
(I):Input,
(IPU): inputwithp-channelpull-uptransistor,
(ODN):outputwithopen drainn-channel transistor
(OD3): output3-state
12.6.24C32A
12.6.1.Features
$Voltage operatingrange:4.5Vto5.5V
-Maximumwritecurrent3mA at5.5V
-Standbycurrent1mAtypical at5.0V
$2-wireserial interfacebus,I2CTM compatible
$100kHzand 400 kHzcompatibility
$Self-timedERASE andWRITEcycles
$Poweron/offdataprotection circuitry
$Hardwarewriteprotect
$1,000,000Erase/Writecyclesguaranteed
$32-bytepageorbytewritemodesavailable
$Schmitttriggerfiltered inputsfornoisesuppression
$Outputslope control toeliminateground bounce
$2mstypical writecycletime,byteorpage
$Up toeightdevicesmaybeconnected tothe samebusforup to256Kbitstotal memory
$Electrostaticdischarge protection>4000V
$Dataretention >200 years
$8-pinPDIPand SOICpackages
$Temperatureranges
-Commercial(C):0°Cto70°C
-Industrial(I):-40°Cto+85°C
-Automotive(E):-40°Cto+125°C
12.6.2.Description
The Microchip TechnologyInc.24C32Aisa4Kx8(32Kbit)Serial ElectricallyErasable PROM.Ithas
beendevelopedforadvanced,low powerapplicationssuchaspersonal communicationsordata
acquisition.The 24C32Aalsohasapage-writecapabilityofupto32 bytesofdata.The 24C32Ais
capable ofbothrandomand sequential readsuptothe 32Kboundary.Functional address linesallow
up toeight24C32Adeviceson the samebus,forup to256Kbitsaddressspace.AdvancedCMOS
technologyand broadvoltagerange makethisdeviceideal forlow-power/low-voltage, non-volatile code
anddataapplications.The24C32Aisavailable inthe standard8-pinplasticDIPandboth150 mil and
200mil SOICpackaging.
12.6.3.PinFunction table
NameFunction
A0,A1,A2UserConfigurableChip Selects
Vss Ground
SDASerial Address/DataI/O
SCL SerialClock
WPWriteProtectInput
Vcc +4.5Vto5.5VPowerSupply

10
PlasmaTVServiceManual 14/03/2005
12.6.4.FunctionalDescriptions
The 24C32AsupportsaBi-directional2-wirebusand datatransmission protocol.Adevicethatsends
dataontothebusisdefined astransmitter,andadevicereceiving dataasreceiver.The busmustbe
controlled byamasterdevicewhichgeneratestheSerialClock (SCL),controlsthebusaccess,and
generatestheSTARTand STOPconditions,whilethe 24C32Aworksasslave.Bothmasterand slave
can operateastransmitterorreceiverbutthemasterdevicedetermineswhichmodeisactivated.
12.7.SAA5264
12.7.1.Features
The following featuresapplytobothSAA5264 and SAA5265:
$Complete625 line teletext decoderinone chip reducesprinted circuit boardarea and cost
$Automaticdetection of transmitted fastext linksorserviceinformation (packet 8/30)
$On-Screen Display(OSD)foruserinterfacemenususing teletext anddedicated menu icons
$Video Programming System(VPS) decoding
$Wide Screen Signalling (WSS)decoding
$Pan-European, Cyrillic, Greek/Turkishand French/Arabiccharactersetsin eachchip
$High-level command interfacevia I2C-busgiveseasy controlwithalowsoftwareoverhead
$High-level command interfaceisbackwardcompatible toStand-Alone FastextAnd RemoteInterface
(SAFARI)
$625 and 525 line display
$RGBinterfacetostandardcolourdecoderICs, current source
$Versatile 8-bit open-drain Input/Output (I/O)expander, 5Vtolerant
$Single 12 MHzcrystal oscillator
$3.3Vsupplyvoltage.
SAA5264 features
$Automaticdetection of transmitted pagestobe selected bypage up and page down
$8Page fastext decoder
$Table Of Pages(TOP)decoderwithBasicTop Table (BTT)and Additional Information Tables(AITs)
$4Page user-defined list mode.
12.7.2.GeneralDescription
The SAA5264 isasingle-chipten page625-lineWorldSystemTeletextdecoderwithahigh-level
commandinterface,andisSAFARIcompatible.
The deviceisdesignedtominimizethe overallsystemcost,duetothehigh-levelcommand interface
offering thebenefitofalow softwareoverhead in the TVmicrocontroller.
TheSAA5264hasthefollowing functionality:
$10pageteletextdecoderwithOSD, Fastext,TOP,defaultandlist acquisition modes
$Automaticchannel installationsupport
$Closed captionacquisition and display
$ViolenceChip (VChip)support.
12.7.3.PinConnectionsandShortDescriptions
SYMBOL PINTYPE DESCRIPTION
Port2:8-bitprogrammablebidirectional portwith alternative functions
P2.0/PWM1I/O output for14-bit high precision PulseWidthModulator(PWM)
P2.1/PWM02I/O outputsfor6-bit PWMs0to6
P2.2/PWM13I/O
P2.3/PWM24I/O
P2.4/PWM35I/O
P2.5/PWM46I/O
P2.6/PWM57I/O
P2.7/PWM68I/O
Port3:8-bitprogrammablebidirectional portwith alternative functions
P3.0/ADC0 9I/O inputsforthe softwareAnalog-to-Digital-Converter(ADC)facility
P3.1/ADC1 10 I/O

11
PlasmaTVServiceManual 14/03/2005
P3.2/ADC2 11 I/O
P3.3/ADC3 12 I/O
P3.4/PWM7 30 I/O output for6-bit PWM7
VSSC 13 I/O coreground
Port0:8-bitprogrammablebidirectional port
SCL(NVRAM) 14 I I2C-busSerialClock input toNon-Volatile RAM
SDA(NVRAM) 15 I/O I2C-busSerial Datainput/output (Non-Volatile RAM)
P0.2 16 I/O input/output forgeneral use
P0.3 17 I/O input/output forgeneral use
P0.4 18 I/O input/output forgeneral use
P0.5 19 I/O 8mAcurrentsinking capabilityfordirectdriveofLightEmitting
Diodes(LEDs)
P0.6 20 I/O
P0.7 21 I/O input/output forgeneral use
VSSA 22- analog ground
CVBS0 23 I CompositeVideo Baseband Signal(CVBS)input; apositive-going
1V
CVBS1 24 I (peak-to-peak)input isrequired; connected via a100 nF capacitor
SYNC_FILTER 25 I sync-pulse-filterinput forCVBS; thispin should be connected to VSSA
via a100 nF capacitor
IREF 26 I referencecurrentinputforanalog circuits;forcorrectoperation a24
resistorshould be connected to VSSA
FRAME 27 O Framede-interlaceoutputsynchronized withthe VSYNCpulseto
produceanon-interlaced displaybyadjustmentofthe vertical
deflection circuits
TEST 28 I not available; connect thispin to VSSA
COR 29 O contrastreduction:open-drain,activeLOWoutputwhichallows
selectivecontrastreductionofthe TVpicturetoenhanceamixed
mode display
30 I/O P3.4/PWM7(described above)
VDDA 31- analog supplyvoltage (3.3V)
B32 O Blue colourinformation pixel rateoutput
G33 O Green colourinformation pixelrateoutput
R34 O Red colourinformation pixel rateoutput
VDS 35 O video/dataswitchpush-pull output forpixelratefast blanking
HSYNC 36 I horizontalsyncpulseinput: Schmitt triggered foraTransistor
TransistorLevel (TTL)version;the polarityofthispulseis
programmable byregisterbit TXT1.HPOLARITY
VSYNC 37 I verticalsyncpulseinput; Schmitt triggered foraTTLversion;the
polarityofthispulseisprogrammable byregisterbitTXT1.V
POLARITY
VSSP 38- peripheryground
VDDC 39- coresupplyvoltage (+3.3V)
OSCGND 40 -* crystal oscillatorground
XTALIN 41 I 12 MHzcrystal oscillatorinput
XTALOUT 42 O 12 MHzcrystal oscillatoroutput
RESET 43 I resetinput; ifthispin isHIGHforatleast2machine cycles(24
oscillatorperiods)while theoscillatorisrunning,the deviceresets;
thispinshould be connectedto VDDP via acapacitor
VDDP 44- peripherysupplyvoltage (+3.3V)
Port1:8-bitprogrammablebidirectional port
P1.0 45 I/O input/output forgeneral use
P1.1 46 I/O input/output forgeneral use
P1.2 47 I/O input/output forgeneral use
P1.3 48 I/O input/output forgeneral use
SCL 49 I I2C-busSerialClock input fromapplication

12
PlasmaTVServiceManual 14/03/2005
SDA 50 I/O I2C-busSerial Datainput from(application)
P1.4 51 I/O input/output forgeneral use
P1.5 52 I/O input/output forgeneral use
12.8.LM317
12.8.1.GeneralDescription
The LM117/LM217/LM317aremonolithicintegrated circuitin TO-220,ISOWATT220,TO-3and D 2
PAKpackagesintended foruseaspositiveadjustable voltage regulators.
Theyaredesigned tosupplymorethan 1.5Aofload currentwithanoutputvoltage adjustableovera
1.2to37Vrange.
The nominal outputvoltageisselected bymeansofonlyaresistivedivider,making thedevice
exceptionallyeasy touseand eliminating the stocking ofmanyfixedregulators.
12.8.2.Features
$Outputvoltage range :1.2To37V
$OutputcurrentInexcess of1.5A
$0.1% LineandLoad Regulation
$FloatingOperation forHigh Voltages
$CompleteSeriesofProtections:CurrentLimiting,ThermalShutdownAnd Soa Control
12.9.LM393
12.9.1.Description
The LM393 seriesaredual independentprecisionvoltagecomparators capable of single orsplitsupply
operation.Thesedevicesaredesigned topermitacommonmode range-to-ground levelwithsingle
supplyoperation.Inputoffsetvoltage specificationsaslow as2.0mV makethisdevicean excellent
selectionformanyapplicationsin consumer,automotive,andindustrial electronics.
12.9.2.Features
$Wide Single-SupplyRange:2.0Vdcto36 Vdc
$Split-SupplyRange:±1.0Vdcto±18 Vdc
$Very Low CurrentDrainIndependentofSupplyVoltage:0.4mA
$LowInputBiasCurrent:25 nA
$LowInputOffsetCurrent:5.0nA
$LowInputOffsetVoltage:5.0mV(max)LM293/393
$InputCommonMode Range toGround Level
$Differential InputVoltageRangeEqualtoPowerSupplyVoltage
$OutputVoltage CompatiblewithDTL,ECL,TTL,MOS,andCMOSLogicLevels
$ESDClampsonthe InputsIncreasethe Ruggedness oftheDevicewithoutAffecting Performance
$NCVPrefixforAutomotiveandOtherApplicationsRequiring Siteand Control Changes
$Pb-FreePackagesareAvailable
12.9.3.PinConnections

13
PlasmaTVServiceManual 14/03/2005
12.10.ST24LC21
12.10.1.Description
TheST24LC21isa1Kbit electricallyerasable programmable memory (EEPROM),organizedby8bits.
Thisdevicecan operatein twomodes:Transmit OnlymodeandI2Cbidirectional mode.When powered,
the deviceisinTransmitOnlymode withEEPROMdataclockedoutfromthe rising edge ofthe signal
appliedon VCLK.The devicewillswitchtothe I2Cbidirectionalmode upon the fallingedgeofthesignal
applied on SCL pin. The ST24LC21 cannot switchfromthe I2Cbidirectionalmode totheTransmit Only
mode (exceptwhen thepowersupplyisremoved).The deviceoperateswithapowersupplyvalueas
lowas2.5V.BothPlasticDual-in-LineandPlasticSmallOutlinepackagesareavailable.
12.10.2.Features
$1million Erase/Writecycles
$40years dataretention
$2.5VTo5.5Vsinglesupplyvoltage
$400kHzcompatibilityoverthefull range ofsupplyvoltage
$Two wireserial interfaceI2Cbuscompatible
$PageWrite(Up To8Bytes)
$Byte,randomand sequentialread modes
$Selftimed programmingcycle
$Automaticaddressincrementing
$Enhanced ESD/Latchup
$Performances
12.10.3.Pinconnections
DIPPin connectionsCOPinconnections
NC:Notconnected
Signalnames
SDASerialdataAddressInput/Output
SCL SerialClock (I2Cmode)
Vcc Supplyvoltage
Vss Ground
VCLKClock transmitonlymode
12.11.TLC7733
12.11.1.Description
TheTLC77xx familyofmicropowersupplyvoltagesupervisors aredesigned forresetcontrol,primarily
in microcomputerand microprocessorsystems.
Duringpower-on,RESETisassertedwhenVDD reaches1V.AfterminimumVDD 2V) isestablished,
the circuitmonitors SENSE voltageand keepstheresetoutputsactiveaslong asSENSE voltage
(VI(SENSE) )
remainsbelow thethresholdvoltage.Aninternal timerdelays returnofthe outputtotheinactivestateto
ensurepropersystemreset.Thedelaytime,td,isdetermined byanexternalcapacitor:
td=2.1x10 4xCT
where
CTisin farads

14
PlasmaTVServiceManual 14/03/2005
tdisinseconds
TheTLC77xx hasafixedSENSE threshold voltage setbyan internal voltage divider.When SENSE
voltagedropsbelow the threshold voltage,theoutputsbecomeactiveandstayinthatstateuntil
SENSEvoltage returnsabovethreshold voltage and thedelaytime,td,hasexpired.
Inadditiontothe power-on-resetandundervoltage-supervisorfunction,the TLC77xx addspower-down
control supportforstaticRAM.When CONTROListiedtoGND,RESETwillactasactivehigh.The
voltagemonitorcontainsadditional logicintendedforcontrol ofstaticmemorieswithbatterybackup
duringpowerfailure.Bydrivingthe chip select (CS) ofthe memorycircuit withthe RESET output ofthe
TLC77xx and withthe CONTROLdriven bythe memory bankselectsignal (CSH1)ofthe
microprocessor(see Figure10),thememorycircuitisautomaticallydisabled during apowerloss.(In
thisapplicationthe TLC77xxpowerhastobe suppliedbythebattery.)
The TLC77xxQischaracterizedforoperation overatemperaturerangeof %4Cto125 C,andthe
TLC77xxIischaracterizedforoperation overatemperaturerange of %40 C to85 C.
12.11.2.74LVC257A
12.11.3.Features
Wide supplyvoltagerangeof1.2to3.6V
InaccordancewithJEDECstandardno.8-1A
CMOSlowerpowerconsumption
DirectinterfacewithTTLlevels
Outputdrivecapability50 _transmission linesat85°C
5Volttolerant inputs/outputs,forinterfacing with5Voltlogic
12.11.4.Description
The 74LVC257Aisahigh-performance,low-power,low-voltage,Si-gateCMOSdeviceand superiorto
mostadvancedCMOScompatibleTTLfamilies.
Inputscanbe driven fromeither3.3Vor5.0Vdevices.In3-Stateoperation, outputscanhandle 5V.This
featureallowsthe useofthesedevicesastranslatorsin amixed3.3V/5Venvironment.
The 74LVC257Aisaquad2-inputmultiplexerwith3-stateoutputs,whichselect4bitsofdatafromtwo
sourcesand arecontrolled byacommon dataselectinput(S). The datainputsfromsource0(1l 0to4l
0)areselected wheninputSisLOWand the datainputsfromsource1(1l1to4l1)areselected when
Sin HIGH.Dataappears at the outputs(1Yto4Y) in true (non-inverting)form fromtheselectedinputs.
The 74LVC257Aisthe logicimplementation ofa4-pole,2-position switch,wherethe positionofthe
switchisdetermined bythe logiclevelsapplied toS.The outputsareforced toahighimpedanceOFF-
statewhenOEisHIGH.
12.11.5.PinDescription
PINNUMBERSYMBOLDESCRIPTION
1SCommon dataselect input
2,5, 11,14 1|0to4|0Datainputsfromsource0
3,6, 10,13 1|1to4|1Dataoutputsfromsource1
4,7,9,121Yto4Y3-Statemultiplexeroutputs
8GND Ground (0V)
15 OE3-Stateoutputenableinput(activeLOW)
16 V
cc Positivesupplyvoltage
12.12.74LVC14A
12.12.1.Features
$Wide supplyvoltagerange of1.2to3.6V
$InaccordancewithJEDECstandardno.8-1A
$Inputsacceptvoltagesup to5.5V
$CMOSlow powerconsumption
$DirectinterfacewithTTLlevels

15
PlasmaTVServiceManual 14/03/2005
12.12.2.Applications
$Waveand pulseshapers forhighlynoisy environments
$Astable multivibrators
$Monostable multivibrators
12.12.3.Description
The 74LVC14Aisahigh-performance,low power,low-voltage Si-gateCMOSdeviceand superiorto
mostadvancedCMOScompatibleTTLfamilies.
Inputscan be driven fromeither3.3Vor5Vdevices.Thisfeatureallowsthe useofthesedevicesas
translators in amixed3.3V/5Venvironment.
The74LVC14Aprovidessixinverting buffers withSchmitt-triggeraction.Itiscapable oftransforming
slowlychanging input signalsintosharplydefined,jitter-free outputsignals.
12.12.4.PinDescription
PINNUMBERSYMBOLDESCRIPTION
1,3, 5,9,11, 13 1A %6ADatainputs
2,4, 6,8,10, 12 1Y %6YDataoutputs
7GNDGround(0V)
14 V
cc Positivesupplyvoltage
12.13.LM1086
12.13.1.Description
The LM1086 isaseriesoflow dropoutpositivevoltage regulatorswithamaximumdropoutof1.5Vat
1.5Aofload current.Ithasthesamepin-outasNationalSemiconductor!sindustry standardLM317.
TheLM1086isavailable inan adjustableversion,whichcan settheoutputvoltagewithonlytwo
external resistors.Itisalsoavailableinfivefixed voltages:2.5V,2.85V,3.3V,3.45Vand 5.0V.The fixed
versionsintegratethe adjustresistors.The LM1086circuitincludesazenertrimmed band-gap
reference,currentlimiting and thermalshutdown.
12.13.2.Features
$Available in 2.5V,2.85V, 3.3V,3.45V, 5VandAdjustableVersions
$CurrentLimiting and Thermal Protection
$OutputCurrent1.5A
$Line Regulation0.015% (typical)
$Load Regulation0.1% (typical)
12.13.3.Applications
$SCSI-2ActiveTerminator
$High Efficiency LinearRegulators
$BatteryCharger
$PostRegulation forSwitching Supplies
$ConstantCurrentRegulator
$MicroprocessorSupply
12.13.4.ConnectionDiagrams

16
PlasmaTVServiceManual 14/03/2005
12.14.LM1117
12.14.1.GeneralDescription
The LM1117 isaseriesoflowdropoutvoltage regulators withadropoutof1.2Vat800mA ofload
current.Ithasthe samepin-outasNationalSemiconductor!sindustrystandardLM317.The LM1117 is
availableinan adjustableversion,whichcansetthe outputvoltagefrom1.25Vto13.8Vwithonlytwo
external resistors.Inaddition,itisalsoavailablein fivefixed voltages,1.8V,2.5V,2.85V,3.3V,and5V.
The LM1117 offers currentlimitingand thermal shutdown.Itscircuitincludesazenertrimmed bandgap
referencetoas-sureoutputvoltage accuracy towithin ±1%.The LM1117 seriesisavailableinSOT-
223,TO-220,andTO-252 D-PAKpackages.Aminimumof10µFtantalumcapacitorisrequiredatthe
outputtoimprovethetransientresponseandstability.
12.14.2.Features
$Available in 1.8V, 2.5V,2.85V,3.3V,5V,and AdjustableVersions
$SpaceSaving SOT-223 Package
$CurrentLimiting and Thermal Protection
$OutputCurrent800mA
$Line Regulation0.2% (Max)
$Load Regulation 0.4% (Max)
$TemperatureRange
'LM1117 0°Cto125°C
'LM1117I-40°Cto125°C
12.14.3.Applications
$2.85VModel forSCSI-2ActiveTermination
$PostRegulatorforSwitchingDC/DCConverter
$High Efficiency LinearRegulators
$BatteryCharger
$BatteryPowered Instrumentation
12.14.4.ConnectionDiagrams
12.15.DS90C385
12.15.1.GeneralDescription
The DS90C385transmitterconverts28bitsofLVCMOS/LVTTLdataintofourLVDS(LowVoltage
DifferentialSignaling)datastreams.Aphase-locked transmitclockistransmitted in parallel withthe
datastreams overafifthLVDSlink.
Every cycle ofthe transmitclock 28bitsofinputdataaresampledand transmitted.Atatransmitclock
frequency of85 MHz,24 bitsofRGBdataand3bitsofLCD timing and control data(FPLINE,
FPFRAME,DRDY) aretransmittedatarateof595 MbpsperLVDSdatachannel.Using an 85MHz
clock, the datathroughput is297.5Mbytes/sec. Alsoavailableisthe DS90C365that converts21 bitsof
LVCMOS/LVTTLdataintothreeLVDS(Low VoltageDifferential Signaling)datastreams.Both
transmitters canbeprogrammedforRising edgestrobeorfallingedge strobe through adedicatedpin.
ARising edgeorFallingedge strobetransmitterwill interoperatewithaFallingedge strobeReceiver
(DS90CF386/DS90CF366)withoutanytranslationlogic.
The DS90C385 isalsoofferedina64 ball,0.8mmfinepitchball gridarray(FBGA) package which
providesa44%reductionin PCBfootprintcompared tothe TSSOPpackage.Thischipsetisanideal
meanstosolveEMIand cable sizeproblems associated withwide,high-speed TTLinterfaces.

17
PlasmaTVServiceManual 14/03/2005
12.15.2.Features
$20to85MHzshiftclocksupport
$Best%in%ClassSet&Hold Timeson TxINPUTs
$Txpowerconsumption <130 mW(typ)@85MHzGrayscale
$TxPower-downmode <200µW(max)
$SupportsVGA,SVGA,XGAand Dual Pixel SXGA.
$Narrowbusreducescable sizeand cost
$Up to2.38 Gbpsthroughput
$Up to297.5Megabytes/secbandwidth
$345mV (typ)swing LVDSdevicesforlow EMI
$PLL requiresno external components
$Compatible withTIA/EIA-644 LVDSstandard
$Lowprofile56-lead or48-lead TSSOPpackage
$DS90C385 alsoavailableina64 ball,0.8mm fine pitchball grid array(FBGA) package
12.15.3.PinDescription
DS90C385 MTD56(TSSOP) PackagePinDescription-FPDLinkTransmitter
PinName I/ONo.Description
TxIN I28 TTLlevelinput. Thisincludes: 8Red, 8Green, 8Blue,and4control lines 'FPLINE,
FPFRAMEandDRDY(also referredtoas HSYNC,VSYNC, DataEnable).
TxOUT+ O4 Positive LVDSdifferentiaIdataoutput.
TxOUT- O4 Negative LVDSdifferentialdataoutput.
TxCLKIN I1 TTLIevelclockinput. PinnameTxCLKIN.
R_FB I1 Programmablestrobe select
TxCLKOUT+ O1 PositiveLVDSdifferentialclockoutput.
TxCLKOUT- O1 Negative LVDSdifferentialclock output.
PWRDOWN I1 TTLlevelinput. Assertion (lowinput) TRI-STATESthe outputs, ensuringlowcurrent at
power down.
Vcc I3 Power supplypinsfor TTLinputs.
GND I4 Groundpinsfor TTLinputs.
PLLVcc I1 Power supplypinforPLL.
PLLGND I2 Groundpinsfor PLL.
LVDS Vcc I1 Power supplypinforLVDSoutputs.
LVDS GND I3 Groundpinsfor LVDSoutputs.
DS90C385SLCSLC64APackagePin Description-FPDLinkTransmitter
PinName I/ONo.Description
TxIN I28 TTLlevelinput.
TxOUT+ O4 Positive LVDSdifferentiaIdataoutput.
TxOUT- O4 Negative LVDSdifferentialdataoutput.
TxCLKIN I1 TTLIevelclockinput. The risingedgeactsas datastrobe. PinnameTxCLKIN.
R_FB I1 Programmablestrobe select. HIGH=risingedge,LOW=fallingedge.
TxCLKOUT+ O1 PositiveLVDSdifferentialclockoutput.
TxCLKOUT- O1 Negative LVDSdifferentialclock output.
PWRDOWN I1 TTLlevelinput. Assertion (lowinput) TRI-STATEStheoutputs,ensuringlow
current atpowerdown.
Vcc I3 Power supplypinsfor TTLinputs.
GND I5 Groundpinsfor TTLinputs.
PLLVcc I1 Power supplypinforPLL.
PLLGND I2 Groundpinsfor PLL.
LVDS Vcc I2 Power supplypinforLVDSoutputs.
LVDS GND I4 Groundpinsfor LVDSoutputs.
NC 6 Pinsnot connected.

18
PlasmaTVServiceManual 14/03/2005
12.16.TL431
12.16.1.Description
TheTL431 isa3-terminaladjustableshuntvoltage regulatorproviding ahighlyaccurate1%band gap
reference. TL431 actsasan open-loop erroramplifierwitha2.5Vtemperaturecompensation reference.
The TL431 thermalstability,wide operatingcurrent(150mA) andtemperaturerange (0.to105.makesit
suitableforall varietyofapplication thatarelooking foralow costsolutionwithhigh performance.The
outputvoltage maybeadjusted toanyvalue between VREFand 36voltswithtwo external resistors.
The TL431isoperatinginfullindustrial temperaturerangeof0°Cto105°C.The TL431 isavailablein
TO-92,SO-8, SOT-89andSOT23-5packages.
12.16.2.Features
$TrimmedBand gap to1%
$Wide Operating Current1mAto150mA
$Extended TemperatureRange0.°Cto105.°C
$LowTemperatureCoefficient30 ppm/°C
$Offered in TO-92,SOIC,SOT-89, SOT-23-5
$Improved Replacementin PerformanceforTL431
$LowCostSolution
12.16.3.PinConfigurations
12.17.MSP34X0G(MSP3410G)
MultistandardSoundProcessorFamily
12.17.1.Introduction
The MSP 34x0Gfamilyofsingle-chipMultistandardSound Processors covers the sound processing of
allanalog TV-Standardsworldwide,aswell astheNICAM digitalsoundstandards.The fullTVsound
processing,starting withanalog soundIFsignal-in,downtoprocessedanalog AF-out, isperformedon
asinglechip.Figureshowsasimplifiedfunctional block diagramoftheMSP 34x0G.
Thisnew generation of TVsoundprocessingICsnow includesversionsforprocessingthemultichannel
television sound(MTS) signalconforming tothe standardrecommended bythe BroadcastTelevision
Systems Committee (BTSC).The DBXnoisereduction,oralternatively,MICRONAS NoiseReduction
(MNR)isperformedalignmentfree.Otherprocessed standardsarethe JapaneseFM-FMmultiplex
standard(EIA-J) andthe FMStereoRadiostandard.CurrentICshavetoperformadjustment
proceduresinordertoachievegood stereo separationforBTSCand EIA-J.The MSP34x0Ghas
optimumstereo performancewithoutanyadjustments.
All MSP 34x0Gversionsarepinand softwaredownwardcompatibletotheMSP 34x0D.TheMSP
34x0Gfurthersimplifiescontrolling software.Standardselectionrequiresasingle I²Ctransmissiononly.
The MSP 34x0Ghasbuilt-in automaticfunctions:The ICisable todetecttheactualsound standard
automatically(AutomaticStandardDetection).Furthermore,pilotlevelsand identificationsignalscanbe
evaluated internallywithsubsequentswitchingbetweenmono/stereo/bilingual;no I²Cinteractionis
necessary (AutomaticSoundSelection).