IDT DAC1627D Operating and maintenance instructions

1
DAC1627D Demo boards – Quick Start
v2

2
CGAP2 board:
Storage and Generation of
complex patterns up to
32M (I,Q)- words DAC1627D board
DAC1627D demoboard+ CGAP2
Board presentation

3
DAC1627D SPI
USB control
CGAP2 USB
Power 5 Vdc
SMA100A clock generator : DAC clock
Power 5 Vdc
PXA spectrum
analyzer
DAC1627D demoboard+ CGAP2
Board connections
PXA spectrum
analyzer

DAC1627 Board overview
Block Diagram
FT2232D
USB<-> SPI
DAC1627
Iout
SPI
DAC clk
USB
con
Data0-13 DAC
6V DC in external Power Generator
Qout
DAC
CGAP2 QSH connector
SPI
LVDS clk
Divider
/2 /4 /8
splitter
global clk
Iout
Qout
One Global clock is used for both DAC board and CGAP2 board.
This Global Clock is split on two signals:
- one is feeding the DAC1627D
- one is divided and send trough the Samtec connector to the CGAP board to feed the FPGA

5
CGAP2 board:
Storage and Generation of
complex patterns up to
32M (I,Q)- words DAC1627D + BGX7100 board
DAC1627D + BGX7100 IQMod demoboard+ CGAP2
Board presentation

6
DAC1627D SPI
USB control
CGAP2 USB
Power 5 Vdc
SMB100A clock generator, DAC clock
737.28MHz, 5dBm
Power 6 Vdc
SMA100A clockgen
IQMod clock 2GHz,
0dBm
PXA spectrum
analyzer
DAC1627D + BGX7100 IQMod demoboard+ CGAP2
Board connections

DAC1627/ BGX7100 Board overview
Block Diagram
Low pass Filter
(BW=300Mhz)
FT2232D
USB<-> SPI
DAC1627
Iout RFout
SPI
DAC clk
USB
con
Data0-13 DAC
6V DC in external Power Generator
Qout
DAC
External generator
LO Synthe
clock
CGAP2 QSH connector
SPI
LVDS clk
Divider
/2 /4 /8
splitter
BGX7100
AQM
global clock
One Global clock is used for both DAC board and CGAP board.
This Global Clock is split on two signals:
- one is feeding the DAC1627D
- one is divided and send trough the Samtec connector to the CGAP board to feed the FPGA

S0/S1/S2 jumpers position
8
S0: ON
S1: ON
S2: OFF
S0/S1/S2 jumpers are used to configure the divider ratio for the clock feeding the CGAP board..
For the current software revision, the ratio value needs to be set to 2.
Please, make sure that the jumpers have the following configuration on the board:

CLOCKS generation
(Global Clock and LO)
9
Spectrum measurement
Bench overview

10
IDT DAC1627 SPI Software

Software Folders
11
Documentations: Datasheets and QuickStart
LabVIEW Runtime version 8.6
FTDI USB drivers for CGAP and DAC1627 controls
Main Application
3
1
2
To use the IDT_DAC1627D software, the LabVIEW Runtime 8.6 needs to be installed first.
This Runtime could be found on the folder named 1_LabVIEW Runtime 8.6.
The driver required to access the USB controller on the board could be found in the folder 2_USB driver

CGAP board control panel overview
12

Warning: Exiting the Program
13
When using the IDT DAC1627D SPI Software, some USB connexion are opened
between your laptop/desktop and the boards (CGAP2 and DAC board).
To prevent any hardware issue when closing the program, please use the EXIT
button to close properly the USB connexion.
Do not use the [X] button, otherwise, the USB connexion will still
be alive, and the program won’t be closed properly.
If this happens, the program will be displayed in the Windows taskbar, but could not be
accessed anymore.
Please use the Task Manager to End the process:

CGAP board start up sequence
14
(1) Initialize the CGAP board USB controller
(2) Specify the Global Clock frequency provided to the DAC board.
(3) Specify the interpolation factor programmed in the DAC1627D.
(4) Specify the clock phase realtionship between the LVDS clock and the
DATAcoming from the FPGA.
(5) Press the ‘DATA CLOCK’ button to configure the CGAP board.

Create Patterns and program CGAP memories
1/3
15
Select the ‘Create Patterns’ tab

16
Create Patterns and program CGAP memories
2/3
(a) Select the number N of samples
(b) The Data Frequency is automatically preset from the Global clock
value and the interpolation factor
(c) Specify the Frequency of the first tone (Hz)
(d) Specify the Amplitude of the first tone (dBFS)
(e) Click ‘Two Tones’ if needed
(f) Specify the Frequency of the second tone (Hz)
(g) Specify the Amplitude of the second tone (dBFS)
Press ‘Create Patterns’ button to generate the signal (I and Q patterns are
generated at the same time)
Press ‘Load in Memory’ button to load the pattern files to the CGAP board
memories.

17
Create Patterns and program CGAP memories
3/3
The complex spectrum of the generated signal is displayed.
The size of the pattern indicator is refreshed.
The LED indicators diplays the status of the CGAP board (Programmed
and Generation)
The generation of the signal is automatically enabled after the « Load in
Memory » action.

LED Status of the CGAP board
18
When Generation is in progress, the
GEN LED is ON (green)
When the clock configuration is correctly
set, the ALIVE LED is blinking (green).
When the ERROR LED is blinking (red),
the clock configuration need to be resent.

Load Patterns Files
19
Some patterns are already available with the software.
You need to specify the DATA rate (w) and the type (x) of signals (Radio or Sines waves).
Then, I-file and Q-file need to be selected (y).
Press Load in Memory (z) to store the pattern in the FPGA memory
X
Y
W Z
Y

20
Load Patterns and program CGAP memories
In the « patterns » folder, several subfolders are provided containing various
pattern types regarding the expected frequency of the DATAsignal.
Each subfolder is splitted in two subfolders names Radio and Sinewaves.
The Radio subfolder contains the Radio complex patterns (WCDMA, GSM, etc).
The Sinewaves subfolder contains the basic single or dual tones signals.
Any patterns could be added to this subset, please contact your local AE to know
more about this process.
This structure is represented in the same way in the GUI.