LG 55EA9800 Assembly instructions

OLED TV Repair Guide
`13 years New Models
< Applicable Model >
55EA9800
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

Main PCB for Broadband
55EA9800 CAM USB
To PSU
Module 1
3
4
1 Main processor_Digital(LG1152D),
DDR Memory
Flash Memory
2
3
4
Micom for Key/IR sensing
HDMI switch (4:1)
Audio AMP (Max 12W)
wifi
Local Key
Motion assy
Front Spk
Local Dim.
2
Main processor_analog(LG1152A)
5
5
IR + Digital Eye
Clear Speaker
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
AUD
BB_TP_DATA
DAC_DATA
AAD_DATA
HSR_P/M
CVBS
DIF(P/N)
SIF
Tuner
PC_AUDIO PC_Audio_L/R
AV1_Audio L/R
AV1
COMP1
AV1_CVBS
Comp1 Y,Pb,Pr
HDMI
Switch
HDMI1~4
H13
LG1154A
USB1(USB3.0)
USB2(USB2.0)
USB3(USB2.0) USB
HUB
Motion-R
M-Remote_Rx/Tx
Audio
AMP
OPTIC
SPK/
Clear Speaker
H/P
H/P Audio L/R
SPDIF
I2S
16
DDR3
16
DDR3
CVBS
SCART
SC_CVBS, RGB, Audio L/R
DTV/MNT_LR/V_OUT
LNB
HDMI_CEC
USB 3.0
USB 2.0
USB 2.0
USB_CAM
USB 2.0
USB_W-iFi
PHY RMII
LAN
WOL / WOW
H/P AMP
IR_Blaster
IRB_SPI IR_B
Micom
H13
LG1154D
FRC
TCON
Logo Light
CI
CI
16
DDR3
16
DDR3
8
eMMC
4Gb×4 (1600)
LVDS : Quad
OLED Module
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
Tuner
DIF TS (P) System
Demux
Audio DSP
Multi-STD
Audio Decoder
LX4 HiFi EP
SIF
Global Baseband
V/Q, DVB-T/C ISDB-T
CVBS(3ch)
Component(2ch)
HDMI-Rx 1.4
(1-port PHY)
3D, ARC, 4kx2k
AAD
(THAT)
Mux
H13A H13D
Audio L/R(4-ch)
SCART out
SW
I2S(External)
Audio DAC (48KHz)
Video Decoder
Multi-STD
HD Decoder
(Boda950)
CVBS AFE(2-ch)
12b@54MHz
CVBS-Out
Mux
10x3ch
DE
CVBS
Encoder
DDR3 PHY
DDR3 Controller
Audio
Line Out
LVDS
Tx
Audio PLL
w/ DCO
Source Mux
TNR
De-interlacer
Main/Sub Scaler
H3D
VCR
2D GFX
JPG/PNG Decoder
TrustZone
CPU
ARMCA9 Core
Dual 1.2GHz
32KBI$ 32KBD$
1MB L2 $
SWSW
3ch Video
AFE
[email protected]Hz
w/ LLPLL
LVDS
Rx
Sound DSP
Clear Voice II
Perceptual
Volume Control
Slim SPK
DivX
Bluetooth
Digital AMP
I2S
I2S(HPD)
SPDIF
JPG Encoder
CVD
Y/C
CVBS
CPU
64KB SRAM
48KB ROM
UART
OTP
Timer
UARTx3
EMAC
SCI
SPIx2
I2Cx10
eMMC
DMAC(8ch)
Timer
WDT
PHY
SRAM 16KB
I2Cx1
BE
H3D
DDR3 PHY
DDR3 Controller SPLL
DDR
PLL
DPLL
DDR
PLL
Digital
Audio
Output
16 16
TS(P) TS(P)
FRC SRE
PE1
OSD
LED
Output formatter
TCON
MCU
Capture
Block
(3CH)
GBB AFE
1ch@30MHz
w/ PLL
BTSC AFE
[email protected]32MHz
w/ PLL
1ch L/R
Audio-ADC
24b@48KHz
CVBS DAC 5x1ch (1ch)
I2Cx1
HDMI
(1-Link)
HDMI
Mux
DVB-CI/CI+
16 16
Video Encoder
1080p@30fps
TS(S)
Vx1/EPI/LVDS Combo
(120Hz)
GPU Rogue Han
USB3.0 x1
USB2.0x3
GPIOx136
Secure Engine
TS(S)
Audio DAC
(48KHz ) I2S
I2S
SW
CPLL DCO
x2
MCU
SDRAM
(MCP)
GPIOIx16
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
TU6503
TDSQ-H651F H13
LG1154D
[RESET] 2 /TU_RESET1 AG6 [GPIO10]
IC2_SCL6
IC2_SDA6 AH34 [SCL5]
AH33 [SDA5]
[SLC] 3
[SDA] 4
[+3.3V_TUNER] 5
[+.1.8V_TUNER] 7
[T/C_DIF[P]] 10
[T/C_DIF[N]] 11
FILTER
[T/C_DIF[N]] 11
[ERROR] 16
[SYNC] 17
[VALID] 18
[MCLK] 19
AL37 [TP_DVB_ERR]
AL36 [TP_DVB_SOP]
AL35 [TP_DVB_VAL]
AM36 [TP_DVB_CLK]
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK
[D0] 20
[D1] 21
[D2] 22
[D3] 23
[D4] 24
[D5] 25
[D6] 26
[D7] 27
FE_DEMOD1_TS_DATA [0-7]
AM35 [TP_DVB_DATA0]
AN36 [TP_DVB_DATA1]
AN37 [TP_DVB_DATA2]
AN35 [TP_DVB_DATA3]
AP37 [TP_DVB_DATA4]
AP36 [TP_DVB_DATA5]
AR37 [TP_DVB_DATA6]
AR37 [TP_DVB_DATA7]
[+1.23V_S2_DEMOD] 30
+1.23V_D_Demod
[S2_RESET] 31 /S2_RESET AG5 [GPIO9]
[+3.3V_S2_DEMOD] 32
LNB_TX
LNB
IC6900
A8303SESTR-TB
10 [TONECTRL]
2 [LNB]
7 [SCL]
8 [SDA]
[S2_F22_OUTPUT] 33
[LNB] 36
[S2_SCL] 34
[S2_SDA] 35 I2C_SCL4
I2C_SDA4
AP6 [SCL3]
AR6 [SDA3]
22 Ω
33 Ω
LNB_OUT
+3.3V_NORMAL
3.3K Ω
+1.8_TU
+3.3V_TU
+3.3V_D_Demod
H13
LG1154A
IF_P
IF_N
TUNER_SIF
TU_CVBS
IF_AGC
U17 [ADC_I_INP]
V17 [ADC_I_INN]
ADC_I_INP
ADC_I_INN
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
H13
(LG1154A)
[CVBS_IN3]
AV1_CVBS_IN
AV1
Phone JACK
[AUAD_L/R_CH3_IN]
COMP1_Y/Pb/Pr
Component 1
Phone JACK
AV1_CVBS_IN_SOC
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
FULL
SCART
(18P)
SC_CVBS_IN
[CVBS_IN2]
SC_CVBS_IN_SOC
SC_R/G/B
/CVBS_IN_SOY
COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC_SOY
[PR1/Y1/PB1/SOY1_IN]
SC_L/R_IN AUAD_L/R_CH3_IN
[AUAD_L/R_CH2_IN]
AV_L/R_IN AUAD_L/R_CH2_IN
[PB2/Y2/SOY2/PR2_IN]
Tuner TU_CVBS_IN TU_CVBS_IN_SOC
[CVBS_IN1]
SIF
DIF[P/N] TUNER_SIF ADC_I_INP/INN [AAD_ADC_SIF]
[ADC_I_INP/INN]
Jack Side SOC Side
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
SPDIF_OUT
TAS5733
AZ4580MTR
OP AMP
Mute
CTRL
[TR]
LPF
AV_L/R_IN
[IEC958OUT]
Tuner
[AAD_ADC_SIF]
SCART_MUTE
SCART
AUDIO L/R OUT
I2C_SCL1/SDA1
MICOM
MICOM
[AUD_SCART_OUTL/OUTR]
SC_L/R_IN
SCART_Lout/Rout
AUD_SCK/LRCK/LRCH
pi filter
AMP_RESET_N
AMP_MUTE
HP_L/ROUT_MAIN
HEAD PHONE
& line out
SIDE_HP_MUTE
[DACSCK]
[DACLRCK]
[DACLRCH]
MAIN
WOOFER
4P wafer
2P wafer
[AUAD_L_CH1_IN]
[AUAD_L_CH2_IN]
[AUAD_L_CH3_IN]
[AUDA_OUTL]
TAS5733
H13
LG1154
[PHY0_ARC_OUT_0]
SPDIF_OUT_ARC
DTV/MNT_L/R_OUT
TUNER_SIF
[SCL0/SDA0]
LPF
LPF
TPA6138A2
Headphone
AMP LPF
LPF
[GPIO21]
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13
LG1154D
HDMI
Switch
(IC3201 / SII9587CNUC)
HDMI1
HDMI Out put 8bits
I2C_SCL/SDA 5 2bits
CEC_REMOTE
OCP
(IC3202 /
TPS2051)
MHL_DET
SPDIF_OUT_ARC
HDMI_INT
HDMI_S/W_RESET
HDMI2
CEC_REMOTE
HDMI3
CEC_REMOTE
HDMI4
CEC_REMOTE
TMDS Link 8bits
TMDS Link 8bits
TMDS Link 8bits
TMDS Link 8bits
DDC_I2C 2bits
DDC_I2C 2bits
DDC_I2C 2bits
DDC_I2C 2bits
MICOM
(IC3000 /
R5F100GEAFB)
CEC_REMOTE
SPDIF_OUT_ARC
H13 Block diagram
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

H13 Block diagram
USB2_ DP2 / DM2 USB2
USB_Camera
(구주7600 - Ready)
[USB2_0_DP / DM]
MICOM
(R5F100GEAFB)
[UART0_RXD]
[UART0_TXD]
M_REMOTE_RX / TX
M_REMOTE_CTS / RTS
[UART1_RXD / TXD]
[GPIO15 / GPIO18]
SOC_TX
H13
LG1154D
USB_CAMERA_DP / DM
USB3
USB1
(USB3.0, PVR Ready)
USB3_DP / DM
USB_DP3 / DM3
USB HUB
USB2512B-AEZG
USB2_HUB_IC_IN_DP / DM
[USB2_1_DP0 / DM0]
M_REMOTE_RESET
Motion Remote
Receiver
[GPIO13]
SOC_RX SOC_TX SOC_RX
4Pin debugging
Wafer
P3800
[USB3_DP0/DM0]
[USB3_RX0P / M]
[USB3_TX0P / M]
USB_WIFI
WIFI_DP / DM
[USB2_2_DP0 / DM0]
CAM_DET MICOM
(R5F100GEAFB)
WOL/WOW_POWER_ON
USB3_RX0P/RX0M
USB3_TX0P/TX0M
OCP USB2/3
TPS2062C
USB_CTL2
[EB_CS2/GPIO92]
USB_CTL3 +5V_USB2 +5V_USB3
OCP USB1
TPS2554
USB_CTL2
[HUB_VBUS_CTRL0] /USB_OCD1
[HUB_PORT_OVER0/1]
+5V_USB1
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only