AXIOMTEK AX5214P User manual

AX5214P
48 Bits DIO Board with PCI BUS
User’s Manual

ii
Disclaimers
The information in this manual has been carefully checked and is believed to be
accurate. AXIOMTEK Co., Ltd. assumes no responsibility for any infringements of
patents or other rights of third parties which may result from its use.
AXIOMTEK assumes no responsibility for any inaccuracies that may be contained in
this document. AXIOMTEK makes no commitment to update or to keep current the
information contained in this manual.
AXIOMTEK reserves the right to make improvements to this document and/or product
at any time and without notice.
No part of this document may be reproduced, stored in a retrieval system, or
transmitted, in any form or by any means, electronic, mechanical, photocopying,
recording, or otherwise, without the prior written permission of AXIOMTEK Co., Ltd.
 Copyright 2000 by AXIOMTEK Co., Ltd.
All rights reserved.
September 2000, Version A3
Printed in Taiwan

iii
ESD Precautions
Integrated circuits on computer boards are sensitive to static
electricity. To avoid damaging chips from electrostatic discharge,
observe the following precautions:
nDo not remove boards or integrated circuits from their
anti-static packaging until you are ready to install them.
nBefore handling a board or integrated circuit, touch an
unpainted portion of the system unit chassis for a few
seconds. This helps to discharge any static electricity on
your body.
nWear a wrist-grounding strap, available from most
electronic component stores, when handling boards and
components.
Trademarks Acknowledgments
AXIOMTEK is a trademark of AXIOMTEK Co., Ltd.
IBM is a trademark of International Business Machines
Corporation.
MS-DOS, MICROSOFT C and QuickBASIC are trademarks of
Microsoft Corporation.
TURBO C is a trademark of Borland Inc.
BASIC is a trademark of Dartmouth College.
Intel is a trademark of Intel Corporation.
Other brand names and trademarks are the properties of
their respective owners.

iv
Unpacking
The AX5214P is packed in an anti-static bag. The DIO board has
components that are easily damaged by static electricity. Do not
remove the anti-static wrapping until proper precautions have
been taken. Safety instructions in front of this User’s Manual
describe anti-static precautions and procedures.
Inventory and Inspection
After unpacking the DIO board, place it on a raised surface and
carefully inspect the board for any damage that might have
occurred during shipment. Ground the board and exercise
extreme care to prevent damage to the board from static
electricity.
Integrated circuits will sometimes come out of their sockets
during shipment. Examine all integrated circuits, particularly the
BIOS, processor and keyboard controller chip to ensure that they
are firmly seated.
The AX5214P 48 Bits DIO Board with PCI BUS package
includes the following:
nAX5214P Board
nRP-9 4.7K (A) 1/8w x 6 pcs
nAS59099 DAC Driver CD
Make sure that all of the items listed above are present.
What To Do If There Is A Problem
If there are damaged or missing parts, contact your supplier
and/or dealer immediately. Do not attempt to apply power to the
DIO board if there is damage to the printed circuit board.

Table of Contents
v
T a b l e o f C o n t e n t s
Chapter 1 General Description
1.1 Introduction.....................................................1
1.1.1 Applications............................................. 1
1.1.2 Accessories Guide..................................... 2
1.2 Specifications ..................................................2
1.2.1 Input and Output ...................................... 2
1.2.2 Electrical Characteristics............................. 3
1.2.3 Interface Characteristics............................. 3
1.2.4 Power Requirements................................... 3
1.2.5 Physical/Environmental............................... 3
Chapter 2 Installation
2.1 Base I/O Port Address and IRQ Level.................5
2.2 Jumper Settings ...............................................5
2.2.1 Disable Interrupt Jumper (DISx)..................... 5
2.2.2 Interrupt Enable Jumper (IENx)...................... 6
2.2.3 Programmable Interrupt Jumper (INPx)........... 6
2.2.4 +12V or Ground Select Jumper ..................... 7
2.3 Connector Pin Assignments...............................8
2.4 Resistor Pack (RP1-RP3 & RP10-RP12).............9
2.5 Hardware Installation...................................... 10
2.5.1 Board Installation .....................................10
Chapter 3 Register Structure & Format
3.1 AX5214P I/O Address Map.............................. 11
3.2 AX5214P Register Description......................... 12
3.2.1 Group #1 (base+0, 1, 2 & 3)........................12
3.2.2 Group #2 (base+4, 5, 6 & 7)........................13
Chapter 4 Device Driver
4.1 How to Install Device Driver............................. 15
4.2 How to Use Device Driver Command................ 16
Examples.................................................................. 17
Chapter 5 Programming Digital Input and
Output
5.1 Programming Examples .................................. 21
Appendix A Block Diagram
Appendix B Location Diagram

Table of Contents vi
Appendix C Technical Reference
General Usage of Digital Input and Output................. 31
AX5214P Port A, B and C Basic Definitions ............... 32

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
General Description 1
C h a p t e r 1
General Description
1.1 Introduction
The AX5214P is a 48-bit digital input and output board that plugs
into the computer via PCI (Peripheral Component Interconnect)
slot. The board can be used with TTL low-level input/output
circuitry or with solid state relay module (8-, 16-or 24-channel
versions) providing 2500V isolation for interfacing with high
level AC and DC signals.
The 48 digital I/O lines are arranged into two separated groups.
Each group, emulates 8255 PPI (Programmable Peripheral
Interface) chip mode 0 but with stronger driver capability, is
further divided into three 8-bit ports (port A, port B and port C).
These ports can be functionally programmed as either digital
inputs or digital outputs.
There is a unique feature associated with AX5214P: An interrupt
on change of state. Interrupt occurs when port C bit 3 or bit 7 of
each group changes state. This feature frees up the PC to do other
activities since there is no need to poll the digital input port for an
event to occur.
1.1.1 Applications
Sense and Control High Level Signals throughI/O module
Sense Low-level (TTL) switches or signals
Drive Indicator Light or Control Recorders
Parallel Data Transfer to PC

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
General Description 2
1.1.2 Accessories Guide
AX751
Screw terminal board for all digital I/O connections. Package
includes 3.3 feet (1 meter) cable and 50-pin connector.
AX754
24-channel opto-isolated D/I panel for signal connection and
conditioning with the AX5214P. Panel bundled with 3.3 feet (1
meter) cable and 50-pin connector.
AX756
24-channel electromechanical single-pole, double-throw(SPDT)
which can be driven by the AX5214P. Includes 3.3 feet (1 meter)
cable and 50-pin connector.
AX755
8-channel electromechanical single-pole,double-throw(SPDT) and
16-channel opto-isolated digital I/P panel compatible with the
AX5214P 48-bit DI/O board. Product comes along with a 3.3 feet (1
meter) cable and a 50-pin connector.
1.2 Specifications
1.2.1 Input and Output
Input/Output Lines 48
Operation Mode 8255 Mode 0 Compatible
Input/Output Mode Pair
Improved Noise Margins Hysteresis VT+ -VT-=0.4
(TYP.)
Input/Output Level TTL/DTL Compatible
Added Pull-up Resistor CMOS/DRY Contact
Compatible

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
General Description 3
1.2.2 Electrical Characteristics
VIH 2V (min.)
VIL 0.8V (max.)
IIH 20uA (max.) at VI=2.7V
IIL -0.2mA (max.) at VIL=0.4V
VOH 2.4V (min.) at IOH=-3mA
VOL 0.4V (max.) at IOL=12mA
IOH -15mA (max.)
IOL 24mA (max.)
1.2.3 Interface Characteristics
I/O Connector 50 pin mating header
I/O Cable Type
Ribbon Twisted Pair Cable
Ribbon Stripline Cable
Zo=50ohm to 100ohm
(TYP.)
Zo=30ohm to 80ohm
(TYP.)
Compatible Bus PCI bus
Interface Type I/O mapped with 10-
bit addressing
(A9-A0)
Number of Locations Occupied
8 consecutive
addresses
Data Path 8 bits
Configured Address and
Interrupt Plug & Play
1.2.4 Power Requirements
+5VDC 2.0A (MAX.)
1.2.5 Physical/Environmental
Dimensions (106H X 174W) mm
Weight 110 g
Operating Temperature Range
0°C to 60°C
Storage Temperature Range -25°C to 85°C
Relative Humidity Up to 90%, non-condensing

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
General Description 4
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AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 5
C h a p t e r 2
Installation
2.1 Base I/O Port Address and IRQ Level
AX5214P occupies eight consecutive I/O port spaces. The I/O
port base addresses and IRQ level are assigned by the PCI Plug &
Play BIOS. You can access the AX5214P‘s base address, IRQ
level and even the slot number where AX5214P is plugged into
from the device driver. For more detailed information, refer to the
Chapter 4 “Device Driver”.
2.2 Jumper Settings
AX5214P provides hardware interrupt function for applications. Port C bit
3 (PC3) and bit 7 (PC7) are in charge of this task. INTERRUPT ENABLE
(IENx) and PROGRAMMABLE INTERRUPT (INPx) are configurable via
jumpers JP3 and JP4 for each group.
DIS2
IEN2
JP3
INP2
DIS1
IEN1
JP4
INP1
DISx : Disable Interrupt
IENx : Enable Interrupt
INPx : Programmable Interrupt
2.2.1 Disable Interrupt Jumper (DISx)
Setting this jumper disables all interrupt inputs into this group.

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 6
2.2.2 Interrupt Enable Jumper (IENx)
When this jumper is set, any change from 0 to 1 on this group's
PC3 will generate an interrupt. The status is illustrated as
follows: PC3 INTERRUPT
YES (*)
NO
(*) After generating an interrupt, immediately send '0' to PC3 to
pull down the PC3 and subsequently enable other interrupt to
happen.
2.2.3 Programmable Interrupt Jumper (INPx)
Setting this jumper will raise a programmable interrupt function
via PC3 and PC7. The status is illustrated below:
PC3 PC7 INTERRUPT
0YES (*)
0NO
X1NO
0XNO
1YES (**)
1NO
(*) After generating an interrupt, immediately pull down the PC3 to
enable other interrupts to happen.
(**) After generating an interrupt, immediately pull high the PC7 to
enable other interrupts to happen.

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 7
2.2.4 +12V or Ground Select Jumper
Pin 2 and pin 4 of each group‘s 50-pin connector can be set to
output +12V PC power or connected to GROUND by setting
jumper. The jumpers and their corresponding 50-pin connectors
are listed as follows:
JUMPER CONNECTOR
JP1 CN1 (Group #1)
JP2 CN2 (Group #2)
Configuring +12V PC power to the connector allows the
AX5214P to provide +12V power for direct relay driving voltage
or input pull high voltage. When using the AX5214P with
standard OPTO22 interface panel board, pins 2 and 4 of
AX5214P‘s 50-pin connector must be connected to GROUND.
The jumper configurations are shown below.
JP1&JP2
+12V
GND
Connect pins 2 and 4 of the 50-
pin connector to
GROUND. With this setting, AX5214P is compatible
with AX1416 and AX1424
OPTO22interfacepanels.
This is the factory default setting.
JP1&JP2
GND
+12V
Connect pins 2 and 4 of the 50-
pin connector to
+12V PC power. Applicable to AX754, AX755 and
AX756 panels.
REMINDER: Since the AX5214P is connected to other
boards/panels through these 50-pin connectors,
you must check the pins of the boards/panels and
make sure that these jumpers are set to the proper
side.

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 8
2.3 Connector Pin Assignments
All AX5214P DIO signals are divided into two groups (Group #1
and Group #2) and are built inside two 50-pin connectors (CN1,
CN2). The connector pin assignments are shown below. The
AX5214P is compatible with AX751, AX754, AX755 and
AX756 or standard OPTO22 interface.
Pin
Name Name I/O CHANNEL
25
33
15
49
1
3
5
7
9
11
13
17
19
21
23
27
29
31
35
37
39
41
43
45
47
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
*
*
Pin
Ground
selectable
+12V
Ground or
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
PC 7/INT
PC 6
PC 5
PC 4
PC 3/INT
PC 2
PC 1
PC 0
PA 3
PB 7
PB 6
PB 5
PB 4
PB 3
PB 2
PB 1
PB 0
PA 7
PA 6
PA 5
PA 4
PA 2
PA 1
PA 0
+5V
12
8
17
0
23
22
21
20
19
18
16
15
14
13
11
10
9
7
6
5
4
3
2
1
* : refer to the following section
AX5214P Pin Assignments

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 9
2.4 Resistor Pack (RP1-RP3 & RP10-RP12)
As previously mentioned, the 8-bit port digital I/O lines can be
configured as input or output port (refer to AX5214P Register
Description). Initially the digital I/O lines are left floating. When
any of these ports is set to input port, user is suggested to pull it's
input lines high by installing RP(s). There are six reserved spaces
onboard , marked as RP1-RP3 and RP10-RP12 (refer to the table
below, the RP is approximately 4.7K).
If a port is configured as output lines, just leave the
corresponding RP unoccupied.
DI/O LINES
Group #1 Port A
Group #1 Port B
Group #1 Port C
RP3
RP2
RP1
Group #2 Port A
Group #2 Port B
Group #2 Port C
RP12
RP11
RP10
NOTE: In some situations, i.e. environment ground is not stable, the
digital output resets frequently. User is suggested to isolate
system circuitry from external signal. Let the external signal
to initially go through AX754 (24 Channel Opto-isolated D/I
Panel) or AX755 (8 Channel Relay Output and 16 Channel
Opto-isolated D/I Panel) before reaching the system
circuitry.

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Installation 10
2.5 Hardware Installation
The AX5214P board is shipped with protective electrostatic cover.
When unpacking, touching the board electro-statically shielded
packaging with the metal frame of your computer to discharge
the accumulated static electricity prior to touching the board.
The following summarizes the procedures for installing the
AX5214P:
WARNING: TURN OFF the PC and all accessories connected to
the PC whenever installing or removing any peripheral
board including the AX5214P series board.
2.5.1 Board Installation
1. Turn off the PC and all accessories power.
2. Unplug all power cords and entire cables from the rear
side of the PC.
3. Remove the PC's cover (see your PC operation Guide if
you are not familiar with it)
4. Find an unused PCI expansion slot. Remove the blank
PCI expansion slot cover and save the screw when you
affix its retaining bracket later on.
5. Grab the upper edge of the AX5214P board. Align the
AX5214P board's retaining bracket with the PCI
expansion slot rear panel, and straighten the board's
gold finger with the PCI expansion slot, push the board
into the slot.
6. Restore the screw to the PCI expansion slot retaining
bracket.
7. Replace the PC's cover and connect the cables
detached in step 2.
8. Turn on the PC and the power of other peripheral
devices in your system.

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Register Structure & Format 11
C h a p t e r 3
Register Structure & Format
3.1 AX5214P I/O Address Map
The 48 digital I/O lines of AX5214P are arranged into two
separated groups. Each group emulates 8255 PPI chip mode 0.
The AX5214P is programmable through the board configuration
registers. By writing to control registers, the type of each group
may be specified. If a group is configured as a write port, the data
drivers will drive the data value to the corresponding port. If a
group is configured as a read port, the data value on the
corresponding port will be sent to the digital I/O lines.
Only port C of each group is divided into two 4-bit nibbles; port
C-upper and port C-lower, of which the I/O direction can be
determined by programming to the control register.
AX5214P uses 8 consecutive addresses in I/O space as follows:
Location Function Type
Base address + 0 Group #1 Port A R/W
+ 1 Group #1 Port B R/W
+ 2 Group #1 Port C R/W
+ 3 Group #1 Control register W
+ 4 Group #2 Port A R/W
+ 5 Group #2 Port B R/W
+ 6 Group #2 Port C R/W
+ 7 Group #2 Control register W
** R = Read, W = write

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Register Structure & Format 12
3.2 AX5214P Register Description
3.2.1 Group #1 (base+0, 1, 2 & 3)
PortADataregister(base+0 Read/Write)
base 76543210
+0 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
PortBDataregister(base+1 Read/Write)
base 76543210
+1 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
PortCDataregister(base+2 Read/Write)
base 76543210
+2 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PC0 -PC3 : Port C Lower Byte
PC4 -PC7 : Port C Upper Byte
Controlregister(base+3 Writeonly)
base 76543210
+3 XXXD4 D3 XD1 D0
Port A
Port C (Upper)
Port B
Port C (Lower)
0 = Output, 1 = Input, X = Don't care

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Register Structure & Format 13
3.2.2 Group #2 (base+4, 5, 6 & 7)
PortADataregister(base+4 Read/Write)
base 76543210
+4 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
PortBDataregister(base+5 Read/Write)
base 76543210
+5 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
PortCDataregister(base+6 Read/Write)
base 76543210
+6 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PC0 -PC3 : Port C Lower Byte
PC4 -PC7 : Port C Upper Byte
Controlregister(base+7 Writeonly)
base 76543210
+7 XXXD4 D3 XD1 D0
Port A
Port C (Upper)
Port B
Port C (Lower)
0 = Output, 1 = Input, X = Don't care

AX5214P 48 Bits DIO Board with PCI BUS User’s Manual
Register Structure & Format 14
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