Kaya Instruments Komodo Fiber User manual

Komodo Fiber Reference Guide
(Part-No. KY-FGF)
5201June
20 aMesila St., Nesher 368852 0, Israel
POB 25004, Haifa 3125001, Israel
Tel:[phone] Fax:[phone]
www.kayainstruments.com

Komodo Fiber Reference Guide
1
Figures and Tables...............................................................................................3
Introduction.........................................................................................................5
Safety Precautions..................................................................................5
Disclaimer..............................................................................................6
Key Features........................................................................................................7
Overview ...............................................................................................7
Features..................................................................................................7
Product Applications..............................................................................8
Related documents and accessories ........................................................9
Board Components ..............................................................................................10
Board component Blocks........................................................................10
Board Block diagram..............................................................................11
External View of the Board....................................................................12
Komodo Fiber Board components..........................................................13
Featured device: Arria V GZ FPGA .......................................................13
FPGA Configuration ..............................................................................14
4.6.1 FPGA configuration via JTAG ...............................................14
4.6.2 FPGA configuration via on board flash memory.....................14
Clocking.................................................................................................14
I/O and Transceivers ..............................................................................15
4.8.1 General purpose I\O ...............................................................16
4.8.2 General purpose LEDs............................................................18
PCI Express (Gen 3.0)............................................................................18
Memory..................................................................................20
4.10.1 On-Board 16Gb DDR3...........................................................21
4.10.2 Optional SODIMM (up to 128Gb)..........................................25
QSFP and SFP+ modules .......................................................................28
Fan Control (J6).....................................................................................31
Mechanical Specifications....................................................................................32
Contents

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Mechanical dimensions ..........................................................................32
Absolute maximum ratings.....................................................................32
Electrical Characteristics......................................................................................33
Power Supply.........................................................................................33
Maximum and minimum input voltages..................................................33
Power rails .............................................................................................33
Electrical characteristics for board IO’s: .................................................34
Top Level Example Design.................................................................................36
Reference Design ..............................................................................................37
Functional block diagram.......................................................................37
8.1.1 DDR3 memories.....................................................................38
8.1.2 PCI Express............................................................................38
8.1.3 Ethernet PHY.........................................................................38
Using the reference design......................................................................39
Board Diagnostic....................................................................................40
Revision History
Version
Date
Notes
1.0
30/06/15
Initial Release
1.1
16/07/15
Minor updates
Contents

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Figures
FIGURE 1:BOARD BLOCK DIAGRAM................................................................................................................ 11
FIGURE 2: KOMODO FIBER FRONT VIEW.......................................................................................................... 12
FIGURE 3: KOMODO FIBER BACK VIEW ........................................................................................................... 12
FIGURE 4: CLOCKS PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS.......................................................... 14
FIGURE 5: I/O AND TRANSCEIVER USAGE........................................................................................................ 15
FIGURE 6: GENERAL PURPOSE INPUTS AND OUTPUTS ..................................................................................... 16
FIGURE 7: RZQ CONNECTION WHEN ONLY THE ON-BOARD MEMORY IS USED................................................ 20
FIGURE 8: RZQ CONNECTION WHEN ONLY THE SODIMM MEMORY IS USED................................................. 20
FIGURE 9: RZQ CONNECTION WHEN BOTH MEMORIES ARE USED ................................................................... 21
FIGURE 10: ON-BOARD DDR3 SIGNAL CONNECTIONS .................................................................................... 22
FIGURE 11: PCB MECHANICAL DIMENSIONS.................................................................................................. 32
FIGURE 12: FUNCTION DIAGRAM..................................................................................................................... 37
FIGURE 13: SFP+ LOOPBACK FIXTURE ............................................................................................................ 40
FIGURE 14: QSFP LOOPBACK FIXTURE............................................................................................................ 40
FIGURE 15: DDR3 SODIMM .......................................................................................................................... 40
FIGURE 16: KOMODO FIBER WITH LOOPBACK FIXTURES.............................................................................. 41
Tables
TABLE 1: KOMODO FIBER BOARD COMPONENTS ............................................................................................ 13
TABLE 2: CLOCKS PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS ........................................................... 15
TABLE 3: GENERAL PURPOSE INPUTS AND OUTPUTS PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS...... 17
TABLE 4: GENERAL PURPOSE LEDS PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS ............................... 18
TABLE 5: PCIE PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS ................................................................ 19
TABLE 6: ON BOARD SDRAM PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS........................................ 25
TABLE 7: SODIMM PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS ........................................................ 28
TABLE 8: QSFP PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS............................................................... 28
TABLE 9: SFP+ PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS................................................................ 30
TABLE 10: SFP+ AND QSFP LEDS PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS................................. 30
TABLE 11: FAN PIN ASSIGNMENTS,SIGNAL NAME AND FUNCTIONS................................................................ 31
TABLE 12: ABSOLUTE MAXIMUM RATINGS ..................................................................................................... 32
TABLE 13: POWER INPUT................................................................................................................................. 33
TABLE 14: MAXIMUM AND MINIMUM INPUT VOLTAGES FROM PCIE.............................................................. 33
Figures and Tables

Komodo Fiber Reference Guide
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TABLE 15: POWER RAILS ON THE KOMODO FIBER BOARD............................................................................ 34
TABLE 16: LVDS OUTPUT DC SPECIFICATIONS (DRIVER OUTPUTS)............................................................. 34
TABLE 17: LVDS INPUT DC SPECIFICATIONS (RECEIVER INPUTS)................................................................. 34
TABLE 18: LVTTL INPUT SPECIFICATIONS...................................................................................................... 35
TABLE 19: LVTTL OUTPUT SPECIFICATIONS .................................................................................................. 35
TABLE 20: TTL INPUT SPECIFICATIONS........................................................................................................... 35
TABLE 21: TTL OUTPUT SPECIFICATIONS........................................................................................................ 35
TABLE 22: LEDS DESCRIPTION........................................................................................................................ 39
Figures and Tables

Komodo Fiber Reference Guide
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Safety Precautions
With your Komodo Fiber in hand, please take a minute to read carefully the precautions
listed below in order to prevent unnecessary injuries to you or other personnel or cause
damage to property.
Before using the product, read these safety precautions carefully to assure correct
use.
These precautions contain serious safety instructions that must be observed.
After reading through this manual, be sure to act upon it to prevent misuse of
product.
Caution
In the event of a failure, disconnect the power supply.
If the product is used as is, a fire or electric shock may occur. Disconnect the power supply
immediately and contact our sales personnel for repair.
If an unpleasant smell or smoking occurs, disconnect the power supply.
If the product is used as is, a fire or electric shock may occur. Disconnect the power supply
immediately. After verifying that no smoking is observed, contact our sales personnel for repair.
Do not disassemble, repair or modify the product.
Otherwise, a fire or electric shock may occur due to a short circuit or heat generation. For
inspection, modification or repair, contact our sales personnel.
Do not touch a cooling fan.
As a cooling fan rotates in high speed, do not put your hand close to it. Otherwise, it may cause
injury to persons. Never touch a rotating cooling fan.
Do not place the product on unstable locations.
Otherwise, it may drop or fall, resulting in injury to persons or failure.
If the product is dropped or damaged, do not use it as is.
Otherwise, a fire or electric shock may occur.
Do not touch the product with a metallic object.
Otherwise, a fire or electric shock may occur.
Do not place the product in dusty or humid locations or where water may splash.
Otherwise, a fire or electric shock may occur.
Do not get the product wet or touch it with a wet hand.
Otherwise, the product may break down or it may cause a fire, smoking or electric shock.
Do not touch a connector on the product (gold-plated portion).
Otherwise, the surface of a connector may be contaminated with sweat or skin oil, resulting in
contact failure of a connector or it may cause a malfunction, fire or electric shock due to static
electricity.
Introduction

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Do not use or place the product in the following locations.
● Humid and dusty locations
● Airless locations such as closet or bookshelf
● Locations which receive oily smoke or steam
● Locations close to heating equipment
● Closed inside of a car where the temperature becomes high
● Static electricity replete locations
● Locations close to water or chemicals
Otherwise, a fire, electric shock, accident or deformation may occur due to a short circuit or heat
generation.
Do not place heavy things on the product.
Otherwise, the product may be damaged.
Be sure to drain static electricity from body before you touch any electronics component
The electronic circuits in your computer and the circuits on Komodo board are sensitive to static
electricity and surges. Improper handling can seriously damage the circuits. In addition, do not
let your clothing come in contact with the circuit boards or components.
Otherwise, the product may be damaged.
Disclaimer
Even if the product is used properly, KAYA Instruments assumes no responsibility for any
damages caused by the following:
- Earthquake, thunder, natural disaster or fire resulting from the use beyond our
responsibility, acts caused by a third party or other accidents, the customer’s willful or
accidental misuse or use under other abnormal conditions.
- Secondary impact arising from use of this product or its unusable state (business
interruption or others).
- Use of this product against the instructions given in this manual or malfunctions due to
connection to other devices. KAYA Instruments assumes no responsibility or liability for:
- Erasure or corruption of data arising from use of this product.
- Any consequences or other abnormalities arising from use of this product, or damage of
this product not due to our responsibility or failure due to modification.
Repair of this product is carried out by replacing it on a chargeable basis, not repairing the
faulty devices. However, non-chargeable replacement is offered for initial failure if such
notification is received within two weeks after delivery of the product.
Introduction

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Overview
Komodo Fiber is high-performance yet low-cost FPGA card supporting four SPF+ 10GigE
transceivers and a single QSFP 40GigE optical interface. The card is based on Arria V GZ powerful
FPGA that offers up to 400K flexible logic elements, 1K DSP blocks and 28Mbit of embedded
memory. The board offers a flexible DDR3 memory system with up to 144 Gb of memory and 16
GByte/s throughput. A high speed x8 lane Gen 3.0 PCI express interface allows fast data transfers
between optical links and computer memory while a versatile GPIO with multi-standard support
enables connection to external devices. The QSFP and SFP interfaces are connected directly to
FPGA device transceiver channels to minimize latency.
All of these features combine make the Komodo Fiber ideal for a wide range of applications,
including network processing and security, compute and storage, instrumentation, broadcast,
defense and aerospace.
Features
4 x SFP+ channels at 10 Gbps each
1 x QSFP channel at 40 Gbps
PCIe Gen3 x8 Half-length card
Up to 144 Gb of DDR3 memory
On-board 16Gb DDR3 64bit wide
SODDIMM of up to 128Gb DDR3 64bit wide
DDR3 1066 rate compatible
Altera Arria V GZ FPGA with:
400K equivalent LEs
1092 DSP blocks
28Mbit of embedded memory
Hard IP PCIe Gen 3.0 block
Supports Altera’s PCIe IP
Supports Ethernet IPs
Supports Memory controller IPs
Flexible machine I/O:
4 TTL configurable I/Os
Key Features

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4 LVCMOS configurable I/Os
2 LVDS inputs
2 LVDS outputs
4 opto-isolated outputs
4 opto-isolated inputs
2 quadrature rotary encoders
Integrated strobe controller
Transfer Rate of up to 60 Gbps through PCIe
Transfer Rate of up to 80 Gbps through optical interfaces
CWDM support
QSFP can be expanded to 4x 10G interfaces
Temperature control
Fan control
4 indication LEDs
0°C to 50°C operating environment temperature
Product Applications
Machine Vision
Networking
Algorithm Acceleration
Broadcasting and sports analytics
High-speed DVRs
Key Features

Komodo Fiber Reference Guide
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Related documents and accessories
Documents:
Komodo Fiber Reference Guide
Reference design
Accessories:
SFP+ module
QSFP module
GPIO extension panel
Key Features

Komodo Fiber Reference Guide
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Board component Blocks
One Arria V GZ 5AGZME5HF35C4 FPGA in a 1152-pin BGA (FBGA)
400K LEs
1092 DSP blocks
28 Mbit on-die block memory
3276 9x9 multipliers
2184 18x18 multipliers
1092 27x27 multipliers
546 36x36 multipliers
534 general purpose input/output
FPGA configuration circuitry
JTAG header
EPCQ256 programmable flash memory
Clocking circuitry
Two 322.265625-MHz LVDS oscillator for transceiver reference clock (1 of them is
optional)
125-MHz LVDS oscillator for transceiver reference clock
100-MHz reference clock from the PCIe edge connector
Two 25-MHz single-ended oscillator for DDR3 memory
Memory
16Gb DDR3, 64 bit data width
up to 128Gb DDR3, 64 bit data width SODIMM (optional)
General user I/O
Four user LEDs
GPIO header with up to 20 possible I\O connections
Board Components

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SFP+ and QSFP
Four SFP+ modules
One QSFP module
Four SFP+ interface transmit/receive LED (dual-color)
Four QSFP interface transmit/receive LED (dual-color)
Power supply
PCI Express edge connector power
Board Block diagram
GPIO
PCIe 3.0
×8
(up to 64 Gbps)
QSFP
Bank A
DDR3 ×64
16 Gb
4 green user
LEDs
Bank B
DDR3 ×64
up to 128 Gb
Oscillators
JTAG
EPCQ Flash
40 Gbps
4 SFP+ dual
color LEDs
4 QSFP dual
color LEDs
FAN
10 Gbps
SFP+
SFP+ 10 Gbps
10 Gbps
SFP+
SFP+ 10 Gbps
Figure 1: Board block diagram
Board Components

Komodo Fiber Reference Guide
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External View of the Board
Figure 2: Komodo Fiber front view
Figure 3: Komodo Fiber back view
Board Components

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Komodo Fiber Board components
Board reference
Type
Description
FPGA
P1
FPGA
Arria V GZ 5AGZME5HF35, 1152-pin FBGA
Configuration, Status and setup elements
J3
JTAG header
Provide access to the JTAG chain
J4
EPCQ programming
header
Provide access to the EPCQ using Active Serial
protocol
D11 - D14
SFP+ LEDs
Shows transmit or receive activity on SFP+
module
D15 - D18
QSFP LEDs
Shows transmit or receive activity on QSFP
module
Clocking Circuitry
U2
125 MHz oscillator
125 MHz oscillator for transceiver reference clock
J17
100 MHz reference clock
100 MHz reference clock from the PCIe edge
connector
U29 , U33
25 MHz oscillator
25 MHz oscillators for DDR3 memory
U51 , U53
322.265625 MHz
oscillator
322.265625 MHz oscillators for transceiver
reference clock
Memory devices
U14,U18,U22,U26
DDR3 x64 memory
16Gb DDR3 SDRAM with 64 bit data bus. The
64 bit data bus consists of 4 x16 devices with
single address or command bus
J11
DDR3 x64 SODIMM
memory
Up to 128Gb DDR3 SODIMM with 64 bit data
bus.
General User Input\Output
D1 - D4
User LEDs
Four user LEDs. Active low.
Communication Ports
J17
PCIe edge connector
Gold-plated edge fingers connector for up to x8
signaling in Gen 2 or Gen 3
J1
GPIO
General purpose input\output connector
Power supply
J17
PCIe edge connector
Interface to a PCIe root port such as an
appropriate PC motherboard
Table 1: Komodo Fiber board components
Featured device: Arria V GZ FPGA
The Komodo Fiber features Arria V GZ 5AGZME5HF35 device (P1) in a 1152-pin FBGA
package. For more information about Arria V device family refer to the Arria V device Handbook.
Board Components

Komodo Fiber Reference Guide
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FPGA Configuration
The Komodo Fiber FPGA can be configured using the JTAG header (J3) or by using the on board
EPCQ256 Flash that can be programmed using flash programing header (J4) with Active Serial
protocol.
4.6.1 FPGA configuration via JTAG
The JTAG programming header provides a method for configuring the FPGA using an external
USB-Blaster device with the Quartus II Programmer running on a PC. The external USB-Blaster
connects to the board through the JTAG header (J3).
4.6.2 FPGA configuration via on board flash memory
The Komodo Fiber has an on board EPCQ256 flash memory. Upon the power up, the FPGA tries to
fetch the configuration from that flash. The EPCQ256 flash can be programmed using an external
USB-Blaster device with the Quartus II Programmer running on a PC in Active Serial mode. The
external USB-Blaster connects to the board through the flash programming header (J4).
Clocking
The Komodo Fiber has a variety of on board oscillators, as described in the table and figure below:
cxp_clk_p/n
7A 7B 7C 7D 8E 8D 8C 8B 8A
4A 4B 4C 4E 3E 3C 3B 3A
B2L
B0L
B1L
B2R
B0R
B1R
25 MHz
Oscillator
clk25[1]
7E
3D4D
25 MHz
Oscillator
clk25[0]
N
125 MHz
Oscillator
N
exh_opt_clk_p/n
exh_clk_p/n
322.256625 MHz
Oscillato
322.256625 MHz
Oscillato
(optional)
100 MHz
From PCIe edge
connector
pcie_refclk_p/n
Figure 4: Clocks pin assignments, signal name and functions
Board Components

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Board
reference
Signal Name
Arria V
GZ Pin
Number
Arria V
GZ Clock
Name
I/O
Standard
Description
U2
cxp_clkp
W6
REFCLK0Rp
LVDS
125 MHz oscillator for
transceiver reference clock
cxp_clkn
W5
REFCLK0Rn
U29
clk25[0]
AE16
CLK7p
SSTL-135
25 MHz oscillators for DDR3
memory
U33
clk25[1]
J19
CLK19p
J17
pcie_refclk_p
U28
REFCLK1Lp
HCSL
100 MHz clock coming from
the PCI express edge connector
pcie_refclk_n
U29
REFCLK1Ln
U51
eth_clkp
R6
REFCLK2Rp
LVDS
322.265625 MHz oscillator for
transceiver reference clock
eth_clkn
R5
REFCLK2Rn
U52
eth_opt_clkp
U7
REFCLK1Lp
LVDS
Optional 322.265625 MHz
oscillators for transceiver
reference clock
eth_opt_clkn
U6
REFCLK1Ln
Table 2: Clocks pin assignments, signal name and functions
I/O and Transceivers
The Komodo Fiber utilizes several I/O banks out of the possible 26 I\O or transceiver banks
available on the Arria V GZ FPGA. The following figure describes what each bank is used for:
7A 7B 7C 7D 7E 8E 8D 8C 8B 8A
4A 4B 4C 4E 4D 3D 3E 3C 3B 3A
B2R
B0R
B1R
B2L
B0L
B1L Rx
Tx
QSFP
transceirers
transceirers
SFP+
PCIe_Tx
PCIe_Rx
DDR3 SDRAM + SFP and QSFP I/O + GPIO
DDR3 SODIMM
Rx
Tx
Figure 5: I/O and transceiver usage
Board Components

Komodo Fiber Reference Guide
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4.8.1 General purpose I\O
The Komodo Fiber supports 20 different I\O connections (on the FPGA), as described in Figure 6
and Table 3:
Figure 6: General purpose Inputs and outputs
Board Components

Komodo Fiber Reference Guide
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Board
reference (J1)
Signal Name
Arria V
GZ Pin
Number
I/O Standard
Description
1
rout[0]
AH26
3.3-V LVTTL
Pin 1 of this header is the positive
signal and pin 2 in the negative
signal of this LVDS. The
differential pair is converted to a
single input on the FPGA
2
3
rout[1]
AK28
3.3-V LVTTL
Pin 3 of this header is the positive
signal and pin 4 in the negative
signal of this LVDS. The
differential pair is converted to a
single input on the FPGA
4
5
din[0]
AK27
3.3-V LVTTL
Pin 5 of this header is the positive
signal and pin 6 in the negative
signal of this LVDS. The
differential pair is converted to a
single output on the FPGA
6
7
din[1]
AM26
3.3-V LVTTL
Pin 7 of this header is the positive
signal and pin 8 in the negative
signal of this LVDS. The
differential pair is converted to a
single output on the FPGA
8
9
io_out[0]
AF26
3.3-V LVTTL
Optically isolated outputs
10
io_out[1]
AE26
3.3-V LVTTL
Optically isolated outputs
11
io_out[2]
AD26
3.3-V LVTTL
Optically isolated outputs
12
io_out[3]
AC26
3.3-V LVTTL
Optically isolated outputs
13
io_in[0]
U26
3.3-V LVTTL
Optically isolated inputs
14
io_in[1]
Y25
3.3-V LVTTL
Optically isolated inputs
15
io_in[2]
W25
3.3-V LVTTL
Optically isolated inputs
16
io_in[3]
V25
3.3-V LVTTL
Optically isolated inputs
17
OptoCoupled
GND
-
-
Ground signal for opto-isolated
signals on this connector
18
GND
-
-
Reference ground signal - Board
GND
19
gpio_vt[0]
AM11
TTL
General Purpose IO
20
gpio_vt[1]
AL11
TTL
21
gpio_vt[2]
AM10
TTL
22
gpio_vt[3]
AL10
TTL
23
gpio[0]
AA30
3.3-V LVTTL
24
gpio[1]
AE28
3.3-V LVTTL
25
gpio[2]
AD28
3.3-V LVTTL
26
gpio[3]
AB27
3.3-V LVTTL
Table 3: General purpose Inputs and outputs pin assignments, signal name and functions
Board Components

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18
The “diff_en” signal coming from the FPGA, enables (when set to logic 1) data transfer from pins 1
- 4 on the GPIO header, to pins AH26 and AK28 on the FPGA. This signal also enables data
transfer from pins AK27 and AM26 on the FPGA to pins 5 –8 on the GPIO header.
4.8.2 General purpose LEDs
On the Komodo Fiber there are four user-define LEDs, all are green light and active low.
Board
reference
Signal
Name
Arria V GZ
Pin Number
I/O Standard
Description
D1
led[0]
AB11
2.5 V (Open drain)
User-defined LEDs. Driving logic
0 on the I\O port turns the LED on;
driving high-z on the I\O turns the
LED off
D2
led[1]
AE10
2.5 V (Open drain)
D3
led[2]
AE11
2.5 V (Open drain)
D4
led[3]
W11
2.5 V (Open drain)
Table 4: General purpose LEDs pin assignments, signal name and functions
PCI Express (Gen 3.0)
The Komodo Fiber is designed to fit entirely into a PC motherboard with a ×8 PCI Express slot that
can accommodate a full height long form factor add-in card.
The PCI Express edge connector has a connection speed of 2.5 Gbps/lane for a maximum of 20
Gbps full-duplex (Gen1) or 5.0 Gbps/lane for a maximum of 40 Gbps full-duplex (Gen2) or 8.0
Gbps/lane for a maximum of 64 Gbps full-duplex (Gen3).
The power for the board can be sourced entirely from the PCI Express edge connector when
installed into a PC motherboard.
The PCIe reference clock is a 100 MHz differential input that is driven from the PC motherboard on
to this board through the edge connector. This clock is connected directly to an Arria V GZ refclk
input pin pair using DC coupling. This clock is terminated on the motherboard and therefore, no on-
board termination is required.
JTAG signals (TCK, TDI, TDO and TMS) of the PCIe connector are not connected to the FPGA.
Board
reference
(J17)
Signal Name
Arria V
GZ Pin
Number
I/O Standard
Description
A1
pcie_prsntn1n
-
3.3-V LVTTL
Hot plug presence detect
B17
pcie_prsntn1n_x1
-
3.3-V LVTTL
Hot plug presence detect
B31
pcie_prsntn1n_x4
-
3.3-V LVTTL
Hot plug presence detect
B48
pcie_prsntn1n_x8
-
3.3-V LVTTL
Hot plug presence detect
A5
pcie_jtag_tck
-
3.3-V LVTTL
JTAG chain clock
A6
pcie_jtag_tdi
-
3.3-V LVTTL
JTAG chain data in
A7
pcie_jtag_tdo
-
3.3-V LVTTL
JTAG chain data out
Board Components

Komodo Fiber Reference Guide
19
A8
pcie_jtag_tms
-
3.3-V LVTTL
JTAG chain mode select
A13
pcie_refclk_p
U28
HCSL
Motherboard reference clock (P)
A14
pcie_refclk_n
U29
HCSL
Motherboard reference clock (N)
A11
pcie_perstn
W26
3.3-V LVTTL
Reset
B11
pcie_waken
W24
3.3-V LVTTL
Wake signal
B6
pcie_smbdat
V24
3.3-V LVTTL
SMB data
B5
pcie_smbclk
AA24
3.3-V LVTTL
SMB clock
A16
pcie_tx_p[0]
AK31
1.5-V PCML
Transmit bus
A17
pcie_tx_n[0]
AK32
1.5-V PCML
A21
pcie_tx_p[1]
AH31
1.5-V PCML
A22
pcie_tx_n[1]
AH32
1.5-V PCML
A25
pcie_tx_p[2]
AF31
1.5-V PCML
A26
pcie_tx_n[2]
AF32
1.5-V PCML
A29
pcie_tx_p[3]
AD31
1.5-V PCML
A30
pcie_tx_n[3]
AD32
1.5-V PCML
A35
pcie_tx_p[4]
Y31
1.5-V PCML
A36
pcie_tx_n[4]
Y32
1.5-V PCML
A39
pcie_tx_p[5]
V31
1.5-V PCML
A40
pcie_tx_n[5]
V32
1.5-V PCML
A43
pcie_tx_p[6]
T31
1.5-V PCML
A44
pcie_tx_n[6]
T32
1.5-V PCML
A47
pcie_tx_p[7]
P31
1.5-V PCML
A48
pcie_tx_n[7]
P32
1.5-V PCML
B14
pcie_rx_p[0]
AL33
1.5-V PCML
Receive bus
B15
pcie_rx_n[0]
AL34
1.5-V PCML
B19
pcie_rx_p[1]
AJ33
1.5-V PCML
B20
pcie_rx_n[1]
AJ34
1.5-V PCML
B23
pcie_rx_p[2]
AG33
1.5-V PCML
B24
pcie_rx_n[2]
AG34
1.5-V PCML
B27
pcie_rx_p[3]
AE33
1.5-V PCML
B28
pcie_rx_n[3]
AE34
1.5-V PCML
B33
pcie_rx_p[4]
AA33
1.5-V PCML
B34
pcie_rx_n[4]
AA34
1.5-V PCML
B37
pcie_rx_p[5]
W33
1.5-V PCML
B38
pcie_rx_n[5]
W34
1.5-V PCML
B41
pcie_rx_p[6]
U33
1.5-V PCML
B42
pcie_rx_n[6]
U34
1.5-V PCML
B45
pcie_rx_p[7]
R33
1.5-V PCML
B46
pcie_rx_n[7]
R34
1.5-V PCML
Table 5: PCIe pin assignments, signal name and functions
Board Components