LG CRD-8483B User manual

3
INTRODUCTION
GENERAL FEATURE
SPECIFICATIONS
1. MODEL: CRD-8483B
1) SUPPORTED SYSTEM
• IBM Compatible 486SX or Above (With PIO mode 4 recommended)
2) SUPPORTED OS
3) GENERAL PERFORMANCE
• Data Transfer Rate .........................................................................................Sustained Data Transfer Rate
22Times Speed (Inner side) : 3,300 kbytes/sec
48 Times Speed (max., Outer side) : 7,200 kbytes/sec
• Data Buffer Capacity.....................................................................................................................128 kbytes
• Access Time...................................................................................................Random Access Time : 75 ms
4) POWER REQUIREMENTS
• Voltage ......................................................................................................................................+5V DC +5%
+12V DC +5%
• Ripple ..................................................................................................................+5V : Less than 100mVp-p
+12V : Less than 100mVp-p
• Current .......................................................................................................................+5V : 0.9A (Maximum)
+12V : 1.5A (Maximum)
5) AUDIO PERFORMANCE
• Frequency Response.....................................................................................................20Hz~20KHz(+3dB)
• S/N Ratio (IHF-A+20 KHz LPF) .......................................................................75 dB (Typical at 1 KHz 0dB)
70 dB (Limit at 1 KHz 0dB)
• T.H.D. (IHF-A+20 KHz LPF) ............................................................................0.05% (Typical at 1 KHz 0dB)
0.15% (Limit at 1 KHz 0dB)
• Channel Separation (IHF-A+20 KHz LPF) .............................................................................75 dB (Typical)
70 dB (Limit)
• Output Voltage (1kHz 0dB) 47KΩLoad.................................................................................0.7Vrms + 10%
• Headphone Level (1kHz 0dB) 33ΩLoad...............................................................................0.6Vrms + 20%
• Enhanced IDE interface
• Internal 5.25 inch, halfheight CD-ROM Drive
• Fast 75ms Average Access Time
• Max 7,200KB/sec Sustained Transfer rate
• Photo-CD Multisession Disc Spec compliant
• Multimedia MPC-3 Spec compliant
• Power Tray Loading/Ejection Mechanism
• 3 Way Eject support
(Software, O/C Button, Emergency Eject)
• Closed Enclosure
• Built-in ATAPI Interface Controller
• Software Volume Control
• 8 Times Digital Filter for CD Audio
• Front panel Volume Control for Headphone Output
• Built-in MODE-1 ECC/EDC
• MTBF 125,000h POH (at 10% Utilization)
• PIO Mode 4 & Multi DMA Mode 2 support
• Horizontal or Vertical Mounting
• Digital audio output connector
• Digital audio through ATAPI Interface
• Subcode (P-W) through ATAPI Interface
• Spin-down Mode for energy saving
• MS-DOS Version 3.1 or Higher
• Windows '95/'98
• Solaris Ver 2.4 or Higher
• Linux slackware Ver 2.3
• Windows NT 4.0 or later
• OS/2 Warp (Ver 3.0)
This service manual provides a variety of service
information. It contains the mechanical structure of
the CD-ROM Drive together with mechanical
adjustments and the electronic circuits in schematic
form. This CD-ROM Drive was manufactured and
assembled under our strict quality control standards
and meets or exceeds industry specifications and
standards.

4
LOCATION OF CUSTOMER CONTROLS
(1) Headphone Jack
3.5mm jack for monitoring the audio signal from audio
CDs.
(2) Headphone Volume Control
Adjusts the headphone sound level.
(3) Disc Drawer
Accepts a CD-ROM disc on its tray.
(4) Busy Indicator
The Busy Indicator lights during initialization and data-
read operations.
(5) Emergency Eject Hole
Insert a paper clip here to eject the drawer manually or
when there is no power.
(6) Play/Skip Button
When an Audio CD is in the Disc Drawer, pressing
this button will start playing audio CDs from the first
track. If an audio CD is playing, pressing this button
will skip to the next track.
(7) Open/Close/Stop Button
This button is pressed to open or close the CD tray.
If an audio CD is playing, pressing this button will stop
it, and pressing it again will open the tray.
COMPACT
1254 6 73
Figure 1. Front View
(1) Digital Audio Output Connector
This is a digital audio output connector or Video CD
output connector.
You can connect this to the digital audio system or
Video CD Board.
(2) Analog Audio Output Connector
The Audio Output Connector connects to a sound
card.
The supplied audio cable is a SoundBlaster®type
cable. If you have a different sound card, you will
need to contact the sound card manufacturer to obtain
the proper cable for that card.
(3) Master / Slave / CSEL Jumper
These three jumpers are used to set the CD-ROM
Drive to either a Master, Slave, or CSEL drive.
(4) Interface Connector
This 40-pin connector is used to transfer and control
signals between the CD-ROM Drive and your PC.
Connect the 40-pin IDE cable in your PC to this
connector.
(5) Power-in Connector
Attach a power cable from the computer to this
connector.
Figure 2. Back View
DIGITAL ANALOG
INTERFACE POWER
DR CSM
SLA
GLG39 1+5 +12
GND
40 2
AUDIO AUDIO
125
4
3
FRONT
REAR
Figure 2. Back View

2. Trouble List (Circuit)
A. LED doesn’t light.
B. Pick-Up doesn’t move to the inner-track.
C. The Laser of Pick-Up doesn’t light.
D. Pick-Up lens doesn’t move up and down.
E. Disc doesn’t rotate.
F. TOC isn’t read. (The LED turns on, but doesn’t flicker.)
G. During Audio CD Play, LED flickers, but Speaker is silent.
22
TROUBLESHOOTING GUIDE
1. Initial Lead-in Operation
Reset or Power-On.
LED Flickers.
Pick-Up moves to the inner-Track.
Laser on the Pick-Up lights.
Focus Search (through moving up and down the lens of Pick-Up)
Focus Servo On (FEO(TP15) signal generation)
Rotate disc.
Tracking Servo On (TEI(TP14) Signal generation)
Spindle Servo On (DMSO(TP25) Signal generation)
Read TOC Area (LED Flickers)
Search the Start of Data Area and then pause.

23
3. Troubleshooting Guide
A. LED doesn’t light.
Check Power Voltage (TP1:3.3V, TP2:12V)
Reference Voltage
[TP5:VREF(2V), TP6:V2REF(4V) and GND.]
Does “H” output in IC501 pin ?
Check and replace R705, R706, Q701
and LED701 (LED703 for DELL).
Is the CLOCK Frequency of
IC501 pin 33.86MHz?
Check the power input
pattern.
Check IC501.
Check and replace
X501; 33.86MHz.
Is the CLOCK Frequency of IC501 pin
33.86MHz?
Check and replace IC501.
YES
OK
NG
YES
YES
NO NO
NO
21 54
54
A-1
A-1

24
B. Pick-Up doesn’t move to the inner track.
Do the signals appear at IC501
pin , ?
(Refer to Fig. B-1.)
Do the signals appear in PN301
pin?
(Refer to Fig. B-2.)
Does “H” output at IC201
pin ?
Is the 2V at IC201 pin ?
Check the pattern from
IC501 pin to IC201
pin
.
Check IC501.
Replace IC101.
Check the PN301, and then
replace the Sled Motor.
YES
YES
YES
YES
NO
NO
Replace IC201.
NO
NO
150
41
25
151
145
41
CH1
PIN150
FM0
CH2
PIN151
FMS0
CH1 TP4
CH2 TP5
CH3 TP6
CH4 TP7
Fig. B-1. FM0 and FMS0 Signals Fig. B-2. TP4, TP5, TP6 and TP7 Signals

Check the pattern from
IC501 pin to R225
and then replace IC501.
25
Does “High” output at IC101
pin ?
Is the voltage of IC101 pin
(LD0) 2V?
Check Pick-Up FFC, PN101.
Check Q101, C101, C102
and then replace IC101.
Replace IC501.
YES
YES
NO
NO
4
160
11
Does the focus search signal
appear at F0S0 (TP9)?
(Refer to Fig. D-1.)
Is the 2V at IC201 pin ?
Replace IC101.
YES
YES
YES
NO
NO
Replace IC201.
NO
25
Does the focus search signal
appear between F+ (TP10)
and F- (TP11)?
(Refer to Fig. D-2.)
C. The Laser of Pick-Up doesn’t light.
D. The Pick-UP lens doesn’t move up and down.
D-1

26
Check the pattern from
pin , of IC201 to
pin , of PN101.
Check the PN101, Pick-Up
FFC.
Replace the Pick-Up.
Replace PN101 or Pick-Up
FFC.
OK
OK
NG
34 35
14
CH1
TP9
(FAO)
CH1
TP10(F+)
TP11(F-)
Fig. D-1. F0S0 Signal Fig. D-2. Focus Search Signal
D-1

27
Does the signal appear at
the DMS0 (TP25)?
(Refer to Fig. E-3.)
Do the signals appear at
IC201 pin (W), (V),
and (U)?
Replace IC501.
Replace IC201.
YES
NO
NO
12
14
13
Check the pattern from
IC201 pin , , to
PN201 , , .
YES
OK
12 13 14
13 12 11
Check Spindle Motor FFC
and then replace the
Spindle Motor.
Does the signal appear at
FEO (TP15) when the
IC501 pin opened?
(Refer to Fig. E-1.)
YES
YES YES
NO NO
Replace IC501.
Replace IC501.
Replace Pick-Up.
NO
Do the signal appear at
TP15 (FEO)?
(Refer to Fig. E-2.)
Does the signal appear at
F+(TP10) during focus
search?
E. Disc doesn’t rotate.
166

28
Fig. E-2. FEO Signal
CH1
TP15:
FEO
Fig. E-3. DMS0 Signal
CH1
TP25:
DMS0
Fig. E-1. S-Curve
CH1
TP15:
S-Curve

29
Is the Focus Servo ON?
(Does FEO (TP15) signal
appear?)
Does A, B, C, D signal
appear at IC101 pin ,
?
YES YES
NO
7
8
NO
Is the Tracking Servo ON?
(Does TEI (TP14) signal
appear?)
Does E, F signal appear
at IC101 pin , ?
YES
NO
9
YES
Is TOC area on the disc
read? (Does LED flicker?)
Does the other disc
operate normally?
Normal Disc is defective.
YES YES
NO
10
NO
Does RFAC signal (TP16)
appear?
Is Spindle Servo ON?
(Does DMS0 signal
(TP25) appear?)
YES YES
NO
NO
NO
Does PDA signal appear
at IC101 pin ?
43
Replace IC101.
Replace IC101.
Replace IC501.
Replace Main Circuit
Board or MD Ass’y.
NO
Refer to C.
(The Laser of Pick-Up
doesn’t light.)
F. TOC isn’t read.

30
Does Audio signal appear
at IC501 pin , ?
(Refer to Fig. G-1.)
YES
NO
92 94
Replace IC501.
Does “H” signal appear at
IC501 pin ?
YES
NO
18
Check the IC501 pin
and then replace IC501?
108
Check C702.
YES
YES
YES
Are L-ch, R-ch signals
appear at JK701 and
Audio Line out connector
each?
NO Check JK701 and
L701,L703.
Does Audio signal appear
at IC701 pin , ?
NO
1 7
Is the voltage of IC701
pin 2.5V?
6
NO Replace IC701.
G. During Audio CD play, LED flickers, but Speaker is silent.
G-1

31
Is the connection
between JK801 (or Audio
Line out connector) and
Line (or Jack) normal?
NO Check the JK801 and
Audio line pattern.
YES
Check your sound card,
Audio Cable, Speaker,
Volume and Headphone
Jack.
Fig. G-1. Audio Signal
CH2
PIN3 of
IC601
CH2
PIN12 of
IC601
G-1

1. CABINET and CIRCUIT BOARD
DISASSEMBLY
1-1. Bottom Chassis
A. Release 4 screws (A) and remove the Bottom
Chassis in the direction of arrow (1). (See Fig. 1-1)
1-2. Front Bezel Assy
A. Insert and Press a rod in the Emergency Eject
Hole and then the CD Tray will open in the
direction of arrow (2).
B. Remove the Tray Door in the direction of arrow (3)
by pushing it outward.
C. Release 3 stoppers and remove the Front Bezel
Assy.
1-3. Cabinet and Main Circuit Board
A. Remove the Cabinet in the direction of arrow (4).
(See Fig. 1-3)
B. Release 2 hooks (a) and remove the CD Tray.
C. Remove the Soldering of the LD- and LD+ (B) for
the Loading Motor, and then remove the Main
Circuit Board.
D. At this time, be careful not to damage the 3
connectors of the Main Circuit Board.
2. MECHANISM ASSY
A. Separate the Pick-Up Unit from the Mechanism
Assy.
B. Release 1 screws (C) and then remove the Pick-
Up ( ).
DISASSEMBLY
(A)
(A)
(A)
(A)
(1)
Bottom Chassis
(3)
(2)
Tray Door
Stoppers
CD Tray
Emergency Eject Hole Front Bezel Assy
(4)
Hooks (a)
Cabinet
Main
Circuit Board
(B)
Mechanism Assy
(C)
Pick-up Unit
Fig. 1-1
Fig. 1-2
Fig. 1-3
Fig. 1-4
5

12
PHOTO DIODE STRUCTURE OF THE PICK-UP
(1) Focus Error Signal –> (A+C)-(B+D)
(Control the Pick-up’s up and down to focus on the Disc)
(2) Tracking Error Signal –> (E-F)
(Control the Pick-up’s left and right shift to find the track on the Disc)
(3) RF Signal –> (A+B+C+D)
( RF Signal is converted to Data Signal in One Chip IC (IC501))
Three signals (Focus Error Signal, Tracking Error Signal and RF Signal) above are I-V converted and
amplified at the IC101, and then are transmitted to One Chip IC (IC501) to generate the Servo Control
Signal and Data Signal.
Red laser
Pick-Up module
Tracking
Focusing
B
C
EF
D
A

13
PDA
PDC
PDD
CSOSEL
RFN
RFGS
RFO
RFON
VCC
CKIN
VREFO
FEO
FEN
FEP
NC
CSO
TEN
TEO
SBAD
PDB
RFGC
RFP
GND
MDI
LDO
CSPI
CSNI
FNI
FPI
TPI
TNI
LDC
TEB
RST_
V2REFO
Summation and VGA
(Variable-gain Amp)
Automatic Laser
Power Control
Central
Servo
Control
Focusing Error Signal
Generator
SBAD
(Sub-Beam Adder)
REF and 2VREF
Voltage Generator
Power
Down
Control Power
Down
Tracking Error Signal
Generator
MUX
IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION
•IC101 (MT1136AE) : RF Amplifier IC
I-V converts and amplifies the signal received from the pick-up and then applies to DSP part of one-
chip IC (IC501).
Block Diagram

14
Pin No. Symbol Type Description
1 GND Power Negative power supply.
2 TEST Test pin No connect.
3 MDI Analog Input Voltage for monitor laser diode photo power.
4 LDO Analog Power Laser diode control output.
5 CSPI Analog Input Central Servo input 11.
6 CSNI Analog Input Central Servo input 2.
7 FNI Analog Input Main beam I-V amplifier (A+C) input.
8 FPI Analog Input Main beam I-V amplifier (B+D) input.
9 TPI Analog Input Sub beam I-V amplifier F input.
10 TNI Analog Input Sub beam I-V amplifier E input.
11 LDC Input Laser diode control input. H: Laser diode on, L: Laser diode off.
12 TEST Test pin No connect.
13 TEST Test pin No connect.
14 TEST Test pin No connect.
15 TEB Analog Input Input for Tracking error balance adjustment.
16 RST_ Input Reset input. Active low input is used to reset the offset adjustment circuit.
17 V2REFO Analog Output A reference voltage output. Typical value is 4.0 v.
18 SBAD Analog Output Sub beam adder signal output.
19 TEO Analog Output Tracking error output. Connect to TEZI of MT1198.
20 TEN Analog Input Negative input of tracking error amplifier.
21 CSO Analog Output Central Servo control output. Connect to TEI of MT1198.
(CSOSEL = “0”, Track on : TEO ; CSOSEL = “1”, Seeking : CSO)
22 FEP Analog Input Positive input of focusing error amplifier.
23 FEN Analog Input Negative input of focusing error amplifier.
24 TEST Test pin No connect.
25 TEST Test pin No connect.
26 TEST Test pin No connect.
27 FEO Analog Output Focusing error output.
28 VREFO Analog Output A reference voltage output. Typical value is 2.0v.
29 CKIN Input 10KHz clock input for TEO, FEO, SBAD offset adjustment.
30 VCC power Positive power supply.
31 RFON Analog Output Negative output RF signal.
32 TEST Test pin No connect.
33 TEST Test pin No connect.
34 TEST Test pin No connect.
35 TEST Test pin No connect.
36 RFO Analog Output The output of RF signal.
37 TEST Test pin No connect.
38 RFGS Input RF gain selection, “0”for 4X (rf signal) 3X (servo signal) and “1”for normal
gain. It is internally pulled high.
39 RFN Analog Input The reference input of RF signal. Typical value is 2.0 v.
40 CSOSEL Digital Input Central Servo output select signal. Come from I08 of MT1198.
41 PDD Analog Input The pick-up input signal D of the RF amplifier.
42 PDC Analog Input The pick-up input signal C of the RF amplifier.
43 PDA Analog Input The pick-up input signal A of the RF amplifier.
44 PDB Analog Input The pick-up input signal B of the RF amplifier.
45 RFGC Analog Input The gain-controlled voltage of the RF amplifier.
46 RFP Analog Input Positive input of the RF amplifier.
47 TEST Test pin No connect.
48 TEST Test pin No connect.
Pin Description

15
•IC201 (M63021FP) : Drive IC (Spindle/Servo Actuator)
Rotates the Spindle Motor by receiving MDP signal from IC501.
Generates the signal to drive Focus Actuator Coil, Tracking Actuator Coil, Sled Motor, and Stepping
Motor by Control Signal input from DSP and u-COM.
Block Diagram
x12 x8
x12
FG
HU+
HU-
HV+
HV-
HW+
HW-
HB
SPIN
REF
SL1IN
SL2IN
FOIN
TOIN
5Vcc
TO+
TO-
FO+
FO-
GND
LO+
LO-
VM3
LOIN+
BRS
OSC
MU1
S
SS
S
VM1 RSP U V
W
RSL1 RSL2 SL1+ SL1- SL2+ SL2- VM2
FG Reverse
Detect
120ß
MATRIX
Hall Bias
CTL
amp
Direction
comp
Direction
comp Direction
comp
Current
comp
Current
comp Current
comp
CTL
amp CTL
amp
Logic Logic
TSD
BIAS
Frequency
generator
VM1
Regulator
Reg
Pin Description
Pin No. Symbol Description Pin No. Symbol Description
1 SL1IN Slide control voltage input 1
2 SL2IN Slide control voltage input 2
3 VM2 Motor Power Supply 3 (for Slide)
4 RSL2 Slide current sense 2
5 SL2+ Slide non-inverted output 2
6 SL2- Slide inverted output 2
7 GND GND
8 RSL1 Slide current sense 1
9 SL1+ Slide non-inverted output 1
10 SL1- Slide inverted output 1
11 GND GND
12 W Motor drive output W
13 V Motor drive output V
14 U Motor drive output U
15 RSP Spindle current sensie
16 HW- HW- sensor amp. input
17 HW+ HW+ sensor amp. input
18 HV- HV- sensor amp. input
19 HV+ HV+ sensor amp. input
20 HU- HU- sensor amp. input
21 HU+ HU+ sensor amp. input
22 VM1 Motor Power Supply 1 (for Spindle)
23 HB Bias for Hall Sensor
24 FG Frequency generator output
25 REF Refernce voltage input
26 SPIN Spindle control voltage input
27 FOIN Focus control voltage input
28 TOIN Tracking control voltage input
29 GND GND
30 5VCC 5V Power Supply (for FS, TS)
31 TO- Tracking inverted output
32 TO+ Tracking non-inverted output
33 GND GND
34 FO+ Focus non-inverted output
35 FO- Focus inverted output
36 LO+ Loading non-inverted output
37 LO- Loading inverted output
38 BRS Brake select control terminal
39 VM3 Motor power supply 3.(for Loading)
40 LOIN+ Loading control input(+)
41 MU1 Mute 1
42 OSC PWM carrier oscilation set

ADCVDD
VBDPLL
PLLVSS
LPIO
LPIN
LPFO
LPFN
IREF
PDO
PLLVDD
UP3_5/UT1
UP3_4/UT0
DGND
UP3_2/UINT0
UP3_1/UTXD
UP3_0/URXD
DVDD
IO5
IO6
IO7
IO8
LED
EJECT_
PLAY_
UP1_0/UA16
UP2_7/UA15
UP3_6/UWR_
UP2_6/UA14
UP2_5/UA13
UP2_4/UA12
UP2_3/UA11
UP2_1/UA9
UPSEN_/O9
UP2_0/UA8
UP0_7/UAD7
UP0_6/UAD6
UP0_5/UAD5
UP0_4/UAD4
UP0_3/UAD3
UP0_2/UAD2
UP0_1/UAD1
DGND
UP2_2/UA10
UALE/IO10
IO4/CS_
UP0_0/UAD0
UA0/O11
UA1/O12 UA2/O13 UA3/O14 UA4/O15 UA5/O16 UA6/O17 UA7/O18
XTLI
XTLO
DVDD
DGND
RD15
RD0
RD14
RD1
RD13
RD2
DVDD3
RD12
RD3
RD11
RD4
RD10
RD5 RD9 RD6 RD8 RD7
CASL_
CASH_
RWE_
RAS_
DVDD
RA8 RA7 RA0 RA6 RA1 RA5 RA2 RA4 RA3
SCO RFDTSLV ADCVSS RFI RFIS RFBIAS HRFZC RFRPSLV RFRO FEI TEI TEZI TEZILP SBAD PDMVDD FOO TRO PDMVSS PWM2VREF PWMVREF RFGC TEBC DMO ENDM FMO2 FMO LDC FG POR IO1 IO0 DGND DVDD3 LIMIT_ TRCLOSE TROPEN TRAYOUT_ TRAYIN_ DGND IPLLVSS IPLLVDD HRST_ DD7
DDS
DD6
DVDD
DD9
DD5
DD10
DD4
DD11
DD3
DD12
DGND
DD2
DD13
DD1
DD14
DD0
DD15
DMARQ_
DIOW_
DIOR_
IORDY
DMACK_
INTRQ
IOCS16_
DVDD
DA1
PDIAG_
DA0
DA2
DGND
CSIFX_
CS3FX_
DASP_
DEVSEL
VPVSS
VCOCIN
VPVDD
DACVDD
LO
DACVREF
RO
DACVSS
ADGO/VIO0
DGND
Data Slicer
and Data PLL
RFRP
Circuit Servo
ADC Servo
DSP
PDM &
PWM
DAC
Reset
Circuitry
Host
Data FIFO
RSPC
Decoding
Logic
DSP Data
FIFO/
Parallelizer
Descrambler
Audio
Processing
Unit
Audio
Playback
Logic
CIRC Error
Correction
EFM & Q-code
Demodulation
Mega
Interface
and
GPIO
Control
Sync
Protection
CLV & Zone-
CLV & True-
CAV Control
Subcode
FIFO/
Parallelizer
8032
Micro processor
GPIO
Control
X’tal Clock
Generator
Buffer Memory Controller
ATAPI
Packet
FIFO
Digital Emphasis Varipitch
Clock
Generator
DAC &
LPF
Over-sampling
Digital Filter
RSPC
Sync
Detector
Host
Interface
Logic
Mega interface
and GPIO Control
1PLL
Decoder & UP
Clock Generator
16
•IC501 (MT1198CE) : DSP+ATAPI DECODER+µ-COM
Block Diagram

17
•IC501 MT1198CE
Pin Description
Pin No. Symbol Type Description
Data PLL Interface
Reference voltage
Ground pin for data PLL and related analog circuitry.
The output of VCO integrator.
The negative input terminal of VCO integrator.
The output of loop filter amplifier.
The negative input terminal of loop filter amplifier.
Current reference input. It generate reference current for data PLL.
Connect an external 15K resistor to this pin and PLLVSS.
Phase comparator output. Output the phase difference of EFM and Pck.
Sink or (source) a constant current to loop filter over this pin when phase
difference occurs. Otherwise, this pin is high impedance.
Power for data PLL and related analog circuitry.
Programmable bi-direction I/O.
Alternate function : T1.Timer 1 input.
Programmable bi-direction I/O.
Alternate function : T0. Timer 0 input.
Ground pin for internal digital circuitry.
Programmable bi-directional I/O.
Alternate function : INT0_. External interrupt 0.
Programmable bi-directional I/O.
Alternate function : TXD. Serial transmit data.
Programmable bi-directional I/O.
Alternate function : RXD. Serial receive data.
Power pin for internal digital circuitry.
Programmable bi-directional I/O.
Alternate function : A16. Address bit 16 output.
Programmable bi-directional I/O.
Alternate function : A[15:8]. Upper address bus input/output.
WR_. Data write signal. The pin is dedicated for WR_ function, and the
programmable I/O function is removed.
Programmable store enable output, active low. PSEN_ enables the
external ROM output port.
Alternate function : Programmable output.
Ground pin for internal digital circuitry.
Address latch enable output, active high.
Alternate functiion : Programmable GPIO.
Programmable bi-directional I/O.
Alternate function : AD[7.0]. Lower adress/data bus output for external
device.
Lower address bus output for external device.
Alternate function : Pfogrammable output.
VBDPLL
PLLVSS
LPIO
LPIN
LPFO
LPFN
IREF
PDO
PLLVDD
UP3_5/UT1
UP3_4/UT0
DGND
UP3_2/
UINT0
UP3_1/
UTXD
UP3_0/
URXD
DVDD
UP1_0/
UA16
UP2_[7:0]/
UA[15:8]
UP3_6/
UWR_
UPSEN_/
09
DGND
UALE/
IO10
UP0_[7:0]/
UAD[7:0]
UA[7:0]/
0[18:11]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
24
25, 27, 28, 29,
30, 31, 33, 35
26
32
34
36
38-45
46-53
Anallog Output
Ground
Analog Output
Analog Input
Analog Output
Analog Input
Analog Input
Analog output
Analog Power(5V)
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
50K pull_up
Ground
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
50K pull_up
Power(5V)
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
SMT, 50K pull_up
TTL I/O
50K pull_up
Ground
TTL I/O
50K pull_up
TTL I/O, Slew rate
TTL I/O, Slew rate
Turbo 8032 Interface

18
Pin No. Symbol Type Description
X’tal Interface
X’tal input. The working frequency is 33.8688 MHz.
X’tal output.
Power pin for internal digital circuitry.
Ground pin for internal digital circuitry.
Buffer RAM Data/Versatile Input/ Output. These pins are the bi-directional upper
Buffer RAM data bus to the external buffer memory. When an 8-bit DRAM is
used, the RD8-RD15 signals becomes Versatile I/O pins, VIO8-VIO15.
Bi-directional lower Buffer RAM data bus.
Power pin for internal digital circuitry.
Column Address Strobe Low/Column Address Strobe. When
TWE63h.RW6 is 0, this pin is the Column Address Strobe Low signal for
accessing the lower bytes of a two-CAS_ 16-bit DRAM. When
TWE63h.RW6 is 1 or when an 8-bit DRAM is used, this pin shall be
connected to CAS_ of the DRAM.
Column Address Strobe High/RAM Write Enable High. When a 16-bit
DRAM is used, this pin functions as Column address Strobe High for
accessing the upper bytes of a two-CAS_DRAM if TWE63h.RW6 is 0, or
as Write Enable High for writing the upper bytes of a two-WE_DRAM.
RAM Write Enable/RAM Write Enable Low. When TWE63h.RW6 is 0 or
when an 8-bit DRAM is used, this pin is the active-low write strobe to the
external buffer DRAM. When TWE63h.RW6 is 1, this pin is the Write
Enable Low signal for writing the lower bytes of a two-WE_16-bit DRAM.
Row Address Strobe.
This output is the Row Address Strobe signal to the buffer DRAM.
Power pin for internal digital circuitry.
Buffer RAM Address.
These pins are the address bus to the external buffer DRAM.
Ground pin for internal digital circuitry.
Digital Audio Output/Versatile I/O 0. The signal is either the Digital Audio
Output which supplies the IEC-958 digital audio data when
A0SEL00h.RW7=1 and ADOE2Eh.RW0=1, or the Versatile I/O 0 pin
otherwise.
Ground pin for internal DAC circuitry.
Right channel of audio.
Reference voltage for external audio filter circuit.
Left channel of audio.
Power pin for internal DAC circuitry.
Power pin for varipitch VCO circuitry.
Connect capacitor for compensator loop filter.
XTALI
XTALO
DVDD
DGND
RD[15:8]/
VIO[15:8]
RD[7:0]
DVDD3
CASL_/
CAS_
CASH_/
RWEH_
RWE_/
RWEL_
RAS_
DVDD
RA[8:0]
DGND
ADGO/
VIO0
DACVSS
RO
DACVREF
LO
DACVDD
VPVDD
VCOCIN
54
55
56
57
58, 60, 62,
65, 67, 69,
71, 73
59, 61, 63, 66,
68, 70, 72, 74
64
75
76
77
78
79
80-88
89
90
91
92
93
94
95
96
97
Input
Output
Power(5V)
Ground
TTL I/O, Slew rate
50K pull_up
TTL I/O, Slew rate
50K pull_up
Power(3.3V)
TTL Output
Slew rate
TTL Output
Slew rate
TTL Output
TTL Output
Slew rate
Power(5V)
TTL I/O, Slew rate
50K pull_down
Ground
TTL I/O, Slew rate
SMT, 50K pull_up
Ground
Analog Output
Analog Output
Analog Output
Analog Power(5V)
Analog Power(5V)
Analog Input
Audio Interface
Internal Audio Interface
DRAM Interface
Varipitch VCO Interface