
General Description Connector Information
M68EM05P18UM/D
16 General Description MOTOROLA
Table 1. Connector J2 Signal Descriptions
Pin Mnemonic Signal
1EV
DD EXTERNAL VOLTAGE DETECT — VDD input signal from the target used
by the emulator to detect target system voltage
2 T_RST* TARGET RESET — Active-low input signal that starts a system reset
3 T_OSC1 TARGET OSCILLATOR 1 — A possible clock source input for the
M68EM05P18 board. System bus frequency is OSC1 ÷2. Use of this
signal is controlled by jumper header W1.
4 T_IRQ* TARGET INTERRUPT REQUEST — Active-low input signal from the
target that asynchronously applies an MCU interrupt
5 OSC2 OSCILLATOR 2 — Output clock signal at two times the internal bus
frequency
6, 8, 10,
12, 14, 16,
18, 20 PA7–PA0 PORT A (bits 7–0) — General-purpose I/O lines controlled by software
via data direction and data registers
7 PD7/TCAP PORT D (bit 7) — General-purpose input-only line
TIMER CAPTURE — Input signal used by the input capture feature of
the MCU programmable timer system
9 TCMP TIMER COMPARE — Output signal used by the output compare feature
of the MCU programmable timer system
11 PD5/CKOUT
PORT D (bit 5) — General-purpose I/O line controlled by software via
data direction and data registers
CLOCK OUTPUT — If the clock output mask option is enabled, this pin
will become the buffered OSC2 clock.
13, 15, 17 PC0–PC2 PORT C (bits 0–2) — General-purpose I/O lines controlled by software
via data direction and data registers
22, 24, 26 PB5–PB7
/
SDO, SDI, SCK
PORT B (bits 5–7) — General-purpose I/O lines controlled by software
via data direction and data registers.
SIOP SIGNALS — If the serial I/O port (SIOP) is enabled, these pins
are the serial communications pins. Pin 22 is the serial data output
(SDO), pin 24 is the serial data input (SDI), and pin 26 is the serial
clock (SCK).
19, 21, 23,
25, 27
PC3–PC7
/
AD3–AD0, VREFH
PORT C (bits 3–7) — General-purpose I/O lines controlled by software
via data direction and data registers
A/D INPUTS — If the analog-to-digital (A/D) subsystem is enabled, then
the pins become A/D inputs. Pins 19, 21, 23, and 25 become A/D
channels 3, 2, 1, and 0, respectively. Pin 27 is voltage reference high
(VREFH).
28–40 GND GROUND