Sinclair MrX User manual

MrX Sound Board
for the ZX81 from Sinclair
“Manual for users and programmers”
www.eightbits.de
Version v005 1 Date 22.05.2012

CONTENT
1. System Requirements .......... 4
2. MrX Sound Card .......... 5
3. MrX Expansion Bus K3 .......... 6
4. Optional 3,5mm jacks and ZX96 bus diodes .......... 7
5. Connection .......... 8
6. Software .......... 11
7. Six Channel Sound (Turbo-Sound/Turbo-AY) ….......12
8. Programming .......... 15
9. The Yamaha YM2149 .......... 18
Version v005 2 Date 22.05.2012

Disclaimer
This book is presented solely for educational and entertainment purposes. The author and publisher
are not offering it as legal, accounting, or other professional services advice. While best efforts have
been used in preparing this book, the author and publisher make no representations or warranties of
any kind and assume no liabilities of any kind with respect to the accuracy or completeness of the
contents and specifically disclaim any implied warranties of merchantability or fitness of use for a
particular purpose. Neither the author nor the publisher shall be held liable or responsible to any
person or entity with respect to any loss or incidental or consequential damages caused, or alleged
to have been caused, directly or indirectly, by the information or programs contained herein. No
warranty may be created or extended by sales representatives or written sales materials. Every
company is different and the advice and strategies contained herein may not be suitable for your
situation. You should seek the services of a competent professional before beginning any actions
described in this manual.
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1. System Requirements
Computer: ZX81
Manufacturer Sinclair, UK
Amplifier active amplifier (PC-amplifier) with 3,5mm jack
Recommended: 16k Ram
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2. MrX Sound Card
A) 3,5mm jack. Connect the amplifier here.
B) Port connector.
C) 30 pin expansion bus K3 (see next chapter)
D) Through port connector.
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3. MrX Expansion Bus K3
The MrX Interface is supplied with a built in expansion bus (K3) which allows direct access to the
signals provided by the YM2149 sound chip, should you wish to develop an add-on daughterboard.
Pinout K3
1) IOB7 Port B from YM2149
2) IOB6 Port B from YM2149
3) IOB5 Port B from YM2149
4) IOB4 Port B from YM2149
5) IOB3 Port B from YM2149
6) IOB2 Port B from YM2149
7) IOB1 Port B from YM2149
8) IOB0 Port B from YM2149
9) IOA7 Port A from YM2149
10) IOA6 Port A from YM2149
11) IOA5 Port A from YM2149
12) IOA4 Port A from YM2149
13) IOA3 Port A from YM2149
14) IOA2 Port A from YM2149
15) IOA1 Port A from YM2149
16) CHL Left channel of 3,5mm jack, behind capacitor
17) CHR Right channel of 3,5mm jack, behind capacitor
18) GND Ground
19) /CLK ZX81 clock signal 3,25 MHz
20) GND Ground
21) ANALOG_CH_C Analog Channel C directly connected to YM2149
22) ANALOG_CH_B Analog Channel B directly connected to YM2149
23) ANALOG_CH_A Analog Channel A directly connected to YM2149
24) VCC Supply current +5V
25) GAL1 Pin 15 of GAL 16V8
26) GAL2 Pin 14 of GAL 16V8
27) GAL3 Pin 13 of GAL 16V8
28) GAL4 Pin 12 of GAL 16V8
29) clock/2 1,625 MHz
30) IOA0 Port A from YM2149
Version v005 6 Date 22.05.2012

. Optional 3,5mm jacks and ZX96 bus diodes
If needed additional 3,5mm jacks can be soldered on the MrX sound card on J1 and J2.
For the ZX96 bus (http //www.fischerkai.de/zxteam/treib_e.htm ) a diode DX1 for the /BUSCS
signal has to be soldered and the port connector has to be exchanged by a VG64 connector. The
VG64 connector uses all pins of K2.
Note The ZX96 bus is only used by some freaks, if your ZX81 is equipped with the same the
original MrX won't fit mechanically.
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5. Connection
•Switch off the computer before connecting or removing any interfaces. Disconnect the
power lead to be certain! Otherwise, severe damage may occur to the computer and the
sound card.
•The ZX81 computer is connected to the sound card via the ZX expansion port on the back of
the computer.
•Make sure that the pins of the ZX81 PCB are exactly aligned with the connector of the MrX
sound card.
•Don't use brute force to connect the MrX with the ZX81.
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•The PC speaker (with integrated amplifier) has to be connected with the 3,5mm stereo jack.
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•If needed, connect further equipment. NOTE Make sure that the pins of the MrX PCB are
exactly aligned with the connector of the equipment. Otherwise severe damage may occur to
the computer, the equipment and the sound card.
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6. Software
This manual and the software for the MrX sound card is provided at http //www.eightbits.de/ in the
download section.
manual.pdf → This manual
AY-Demo → Sound-Demo
Basic-Demo → Original Basic Demos from the ZON-X Manual
Demon-Demo → Dancing Demon Demo
Games → 2 Games from Brasilian TK85
PT3-Player → Player, plays PT3-files
Pink-Panther → Music demo
ZON-X-Manual → HTML document original zonx manual
Concerning the PT3-Player, PT3-files have to be converted to wav-files according the instructions
in the ZX81 forum „http //www.rwapservices.co.uk/ZX80_ZX81/forums/aye-aye-
t528s170.html#p4919 “.
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7. Six Channel Sound (Turbo-Sound/Turbo-AY)
With a modified GAL for the MrX Sound interface, you can combine it with the ZXpand plus
ZXpand-AY module (or a second MrX sound module using the original GAL), to provide 6 channel
stereo output sound (Turbo-AY) sound on the ZX81.
REMARKS
The modified GAL changes the port address of the MrX to the following values.
Latch Data
0xAF 0xE7
0xBF 0xF7
0xAF 0xF7
0xBF 0xE7
This implies that the MrX with the modified GAL is not ZON-X compati le any more!
ATTENTION
The following instructions describe how to exchange the orignal GAL chip with the Turbo-Sound
GAL. Follow the instructions carefully and exactly. If you are not sure, engage a radio engineer or
similar to perform the exchange. In case of failures severe damage may occur to the computer and
the sound card.
Instructions:
•Put the MrX sound card in front of you. On the top right hand corner you can see the GAL
chip, marked here with a red rectangle
•Use a screwdriver or similar to lift the GAL chip out of its socket. Don't use brute force!
There is a gap between the chip and the socket.
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•Pull out the GAL Chip. You can see the empty socket.
•Take the MrX Turbo-Sound chip, stick it into the socket carefully. Pay attention that every
pin of the GAL chip is aligned exactly with the socket.
•Watch the pit of the GAL it must be exactly placed like shown on the picture.
•Press down the chip slowly until it snaps into the socket. While pressing, make sure that
none of the pins is twisted or misaligned. If a pin is twisted, stop pressing. Pull out the chip
allign the pin carefully and repeat this step.
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Now the MrX card is ready for the 6 channel stereo sound. Connect the MrX according to chapter
“5. Connection”.
The following combinations are tested and working.
Modified MrX + ZXpand + Zxpand-AY + ZX81
Modified MrX + Original MrX + ZX81
Connect two PC-speakers with the two sound cards or use an appropriate mixer.
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8. Programming
The MrX is compatible with the original ZON-X sound card.
Addresses:
The MrX Interface responds to data placed in the following addresses
Latch Data Comment
0xDF 0x0F modified ZON-X
0xCF 0x1F original ZON-X
0xCF 0x0F from ZON-X ser man al
0xDF 0x1F additional combination
See chapter “9. The Yamaha YM2149” for further explanation about “Latch” (register address
latch) and “Data” (write mode).
Examples in assem ler
Simple Sound:
; LATCH: eq $DF
LATCH: eq $CF
DTAX: eq $0F
; DTAX: eq $1F
xxx:
LD A,7
o t (LATCH),A
LD A,$C0
o t (DTAX),A
LD A,$08
o t (LATCH),A
LD A,15
o t (DTAX),A
looop:
LD A,0
o t (LATCH),A
LD A,70
o t (DTAX),A
ret
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Output on port A:
DTAX: eq $0F
; DTAX: eq $1F
LATCH: eq $CF
; LATCH: eq $DF
xxx:
LD A,7
o t (LATCH),A
LD A,$C0 ;---> set port A and B as o tp t
o t (DTAX),A
looop:
LD A,14
o t (LATCH),A
LD A,$00
o t (DTAX),A ; set port A to 0
LD HL,(DFILE)
INC HL
LD (HL),_O
INC HL
LD (HL),_F
INC HL
LD (HL),_F
LD BC,100
CALL $0F35
LD A,14
o t (LATCH),A
LD A,$FF
o t (DTAX),A ; set all bits of port A to 1 (high)
LD HL,(DFILE)
INC HL
LD (HL),_O
INC HL
LD (HL),_N
INC HL
LD (HL),__
LD BC,100
CALL $0F35
jp looop
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Reading from port A:
DTAX: eq $0F
; DTAX: eq $1F
LATCH: eq $CF
; LATCH: eq $DF
xxx:
LD A,7
o t (LATCH),A
LD A,$00 ;--> set port A & B to Inp t
o t (DTAX),A
looop:
LD A,14
o t (LATCH),A
in a,(LATCH) ;Port A (register No. 14) is read
and a,$3F
LD HL,(DFILE)
INC HL
LD (HL),A ;Print the port content to the screen
jp looop
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9. The Yamaha YM21 9
This is a copy from “http //www.atari-forum.com/wiki/ “.
Software-Controlled So nd Generator (SSG)
-----------------------------------------
Overview
The SSG (Software-Controlled So nd Generator) is an NMOS-LSI device designed
to be capable of m sic generation. It only req ires the microprocessor or
microcomp ter (CPU) to initialize its register array, th s red cing the load
on the CPU. M sic generation is carried o t by the three seq ence sq are wave
generator, noise generator, and envelope generator according to the set
parameters. This allows for the generation of m sic, special effects,
warnings, and vario s other types of so nds.
Feat res
5V single power s pply
Easy connection to 8 bit or 16 bit CPU
Simple connection to external system thro gh 2 seq ence 8 bit I/O port
Wide voicing range of 8 octaves
Smooth atten ation by 5 bit envelope generator
B ilt-in 5 bit D/A convertor
Inp t of do ble freq ency clock can be handled by b ilt-in clock freq ency
divider
TTL compatible level
Low power cons mption (typical 125mW)
40 pin plastic DIL package
Pin compatible with AY-3-8910 man fact red by GI
Pin Layo t
Vss(GND) 1 40 Vcc(+5V)
N.C 2 39 Test1
Analog Channel B 3 38 Analog Channel C
Analog Channel A 4 37 DA0
N.C 5 36 DA1
IOB7 6 35 DA2
IOB6 7 34 DA3
IOB5 8 33 DA4
IOB4 9 32 DA5
IOB3 10 31 DA6
IOB2 11 30 DA7
IOB1 12 29 BC1
IOB0 13 28 BC2
IOA7 14 27 BDIR
IOA6 15 26 SEL
IOA5 16 25 A8
IOA4 17 24 A9
IOA3 18 23 RESET
IOA2 19 22 CLOCK
IOA1 20 21 IOA0
Version v005 18 Date 22.05.2012

Block diagram
A9 A8 BDIR BC2 BC1 DA7~DA0
o o o o o |
| | | | | |
| | | | | |
| | --- B s Control ---o Bidirectional -----o I/O Port A <=> IOA7~IOA0
| | | Decoder o--- b ffer |
| | | o |
| | | | |
| | o o |
Register Addr --o Address --o Register o-------|
Latch Decoder Array -----o I/O Port B <=> IOB7~IOB0
o
|
--------------------------------------
| | | | |
o o | o o
Noise M sic | Envelope Level Freq ency
Generator Generator | Generator --o Control o----- divider ---o CLOCK
| | | | master |
| o | | clock |
-------o Mixer o-- | ---------o SEL
| |
| |
o |
D/A Convertor o------------------
| | |
| | |
Analog Channel
o o o
A B C
Description of pins
1. DA7 ~ DA0
This is an 8 bit bidirectional data b s which is sed for moving data and
addresses between the SSG and CPU. In the read and write modes, DA7 ~ DA0
corresponds to B7 ~ B0 of the register array. In the address mode, DA3 ~ DA0
is sed for the register address, and DA7 ~ DA4 is sed together with A9 and
A8 for the pper address.
2. A8 and A9
These are the pper address inp t pins. A8 has p ll p resistance while A9
has p lldown resistance. When the voltage level at A8 while the level at A9
and DA7 ~ DA4 is low, the address mode is selected allowing for the fetching
of a register address. Connect A8 and A9 to +5V and gro nd respectively when
not in se.
3. RESET
Reset is effective when the voltage level is low, and the contents of all
registers in the array are reset to '0'. This pin has p ll p resistance.
4. CLOCK
S pplies the master clock to the so nd generator and envelope generator. This
is eq ipped with a 1/2 freq ency divider which allows for the se of a
freq ency which is 1/2 of the inp t clock, as the master clock.
5. SEL
When SEL is driven to the high level, the inp t clock is taken as the master
clock. When the voltage level of SEL is low, the inp t clock is divided by 2
to obtain the master clock. This pin has p ll p resistance, allowing for
f ll pin compatibility with the AY-3-8910 man fact red by AI, when this pin
is not connected to anything.
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6. BDIR,BC1 and BC2
Controls the external b s (DA7 ~ DA0) and internal b s of the SSG. The
following fo r modes can be set by the b s control decoder. The b s control
is red ndant, control is possible even when BC5 is connected to +5V.
BDIR BC2 BC1 Mode
0 0 0 Inactive
0 0 1 Address
0 1 0 Inactive
0 1 1 Read
1 0 0 Address
1 0 1 Inactive
1 1 0 Write
1 1 1 Address
Inactive mode: DA7 ~ DA0 has high impedance.
Address mode: DA7 ~ DA0 set to inp t mode, and address is fetched from
register array.
Write mode: DA7 ~ DA0 set to inp t mode, and data is written to register
c rrently being addressed.
Read mode: DA7 ~ DA0 set to o tp t mode, and contents of register
c rrently being addressed are o tp t.
7. ANALOG CHANNEL A,B,C
Each of the three channels is eq ipped with a D/A convertor which converts
the calc lated digital val es to analog signals for o tp t.
8. IOA7 ~ IOA0, IOB7 ~ IOB0
These are two 8 bit I/O ports. These ports allow the SSG to be placed
between an external system and the CPU for the transfer of data. These pins
have p ll p resistance.
9. TEST1
O tp t pin for testing the device. Do not connect to anything.
10. Vcc
+5V power pin.
11. Vss
Gro nd pin.
Version v005 20 Date 22.05.2012