Texas Instruments ADS5474 User manual

User's GuideSLAU247 – August 2008
ADS5474 ADX Evaluation Board for Interleaving
Contents1 Overview ...................................................................................................................... 31.1 Purpose .............................................................................................................. 31.2 EVM Basic Functions............................................................................................... 31.3 Power Requirements ............................................................................................... 31.4 ADS-ADX EVM Operational Procedure .......................................................................... 32 Circuit and Operational Description ....................................................................................... 42.1 Schematic Diagram ................................................................................................. 42.2 Power ................................................................................................................. 42.3 Clock Input ........................................................................................................... 42.4 Analog Input ........................................................................................................ 42.5 DIP Switches ........................................................................................................ 52.6 Onboard Status Output ............................................................................................ 52.7 Digital Outputs....................................................................................................... 63 Installation .................................................................................................................... 64 View ........................................................................................................................... 85 Capturing Data ............................................................................................................... 95.1 Setup ................................................................................................................. 95.2 Connect to Board ................................................................................................... 95.3 Capture Single Batch ............................................................................................. 105.4 Continuous Capture ............................................................................................... 106 Import and Export of Data ................................................................................................. 106.1 Import Data ......................................................................................................... 106.2 Export Data ........................................................................................................ 107 Data Analysis ............................................................................................................... 107.1 Analysis Settings .................................................................................................. 107.2 Analysis Window Output ......................................................................................... 118 Plot Tools .................................................................................................................... 129 Keyboard Commands ...................................................................................................... 1210 MATLAB Interface .......................................................................................................... 1311 Results ....................................................................................................................... 1312 Troubleshooting ............................................................................................................ 1513 SP Devices Intellectual Property ......................................................................................... 1514 Printed-Circuit Board Layout, Bill of Materials, and Schematic ...................................................... 1614.1 Printed-Circuit Board Layout ..................................................................................... 1614.2 Bill of Materials .................................................................................................... 2014.3 Schematic .......................................................................................................... 22
List of Figures
1 Board Layout ................................................................................................................. 42 100-MHz ..................................................................................................................... 133 230-MHz ..................................................................................................................... 134 491.5-MHz ................................................................................................................... 145 ADS5474-ADX .............................................................................................................. 146 Layer 1 ....................................................................................................................... 16
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7 Layer 2 ....................................................................................................................... 178 Layer 3 ....................................................................................................................... 179 Layer 4 ....................................................................................................................... 1810 Layer 5 ....................................................................................................................... 1811 Layer 6 ....................................................................................................................... 1912 Layer 7 ....................................................................................................................... 1913 Layer 8 ....................................................................................................................... 2014 Front End Schematic ...................................................................................................... 2215 FPGA I/O Schematic ....................................................................................................... 2316 USB and Logic Analyzer Connectors .................................................................................... 2417 FPGA System Schematic ................................................................................................. 2518 Power Supply Schematic .................................................................................................. 26
List of Tables
1 DIP Switches Functional Descriptions .................................................................................... 52 DIP Switches Modes ........................................................................................................ 53 LED Functions................................................................................................................ 54 Bill of Materials ............................................................................................................. 20
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1 Overview
1.1 Purpose
1.2 EVM Basic Functions
1.3 Power Requirements
1.4 ADS-ADX EVM Operational Procedure
www.ti.com Overview
This user’s guide gives a general overview of the ADS-ADX Evaluation Board for interleaving (later calledADS-ADX EVM). It provides a description of the features and functions to consider when using themodule.
The ADS-ADX EVM provides a platform for evaluating two interleaved ADS5474 analog-to-digitalconverters (ADC) with a combined sampling rate of 800 MSPS. The ADS5474 is a 14-bit, 400-MSPS ADCwhich is pinout compatible with the ADS5463, a 12-bit, 500-MSPS ADC. For a more in-depth theoreticaldescription of ADC interleaving, consult the white paper Frequency-Response Mismatch Errors and DigitalCorrection in Time-Interleaved ADCs – available at www.spdevices.com . For system design with thistechnology, consult the SP Devices application note Recommended Analog Front-End Design for ADXwith ADS5474/ADS5463. The ADS-ADX EVM contains an ADC interleaving IP core from SP Devices. Forcommercial information and available platforms, contact SP Devices.
One analog input into the EVM is provided via the SMA connector. The input is AC-coupled, and the usersupplies a single-ended input signal, which is converted into a differential signal at the input. TheADS-ADX EVM provides an SMA connector for input of the ADC clock. The external clocking interface isto be clocked with a 50% duty cycle clock, at half of the sampling rate of the interleaved system samplingrate.
The interleaving and digital post-correction (ADX IP-core) is implemented in real time using the Virtex-5FPGA on the board.
Digital output from the EVM is provided both by two Soft Touch Probe (support for Agilent E5405A andTektronix P6908 probes) connectors for logic analyzers and by a USB connector for connecting apersonal computer. The USB interface samples the data into internal FPGA memory, which has amaximum depth of 65,536 samples.
The ADS-ADX EVM is powered through the 6-Vdc power supply adapter that is supplied. Powerconsumption during operation is approximately 12 W for the board.
1. Verify the DIP switch settings to reflect your intended setup (Section 2.5 and Table 2 )2. Connect the supply power to the EVM, from the supplied mains adapter.3. Press the reset button.4. Use a 50- Ωfunction generator with an output swing of ±1 V at the clocking speed of half the fullsystem, with a duty cycle of 50% ( ±3%).5. Connect a 50- Ωfunction generator with a 55-MHz, 0-V offset, 700-mV amplitude sine wave to the inputof the ADC channel.6. The digital output pattern on the Soft Touch Probe connector now represents a sine wave and can bemonitored with a logic analyzer.7. Or connect a USB cable between the board and your computer, start the program ADCaptureLab(installation: see section Software), and collect the data. The plots provided are a time-series plot andan FFT of the signal.
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2 Circuit and Operational Description
2.1 Schematic Diagram
2.2 Power
2.3 Clock Input
2.4 Analog Input
Circuit and Operational Description www.ti.com
Figure 1. Board Layout
Power is supplied via the 6-Vdc external power supply which is then distributed onboard using severalvoltage regulators.
A single-ended sinusoidal clock with a 50% ( ±3%) duty cycle must be applied to the SMA clock input, J10.The output swing of the clock must be ±1 V. The clock frequency must not exceed 400 MSPS for theADS5474. The single-ended clock input is converted into a differential signal by using a transformer. The0°phase output of the transformer is used to clock ADC1 whereas the 180 °phase output is used to clockADC2.
A single-ended analog input must be applied to the SMA analog input, J9. The amplitude of the signalmust not exceed 2.2-Vpp differential at the input of the ADCs. The analog input is converted into adifferential signal by using a transformer and is fed to both ADCs. When providing an analog input,consider the following guidelines for correct operation of the ADX IP core when enabled.1. The analog input must be less the 85% of the Nyquist band. The Nyquist band refers to one-half of thecombined interleaved sampling rate of the analog input signal.2. On initial power up, the analog input must be greater than 7.5% of the Nyquist band for correctestimation to occur. After estimation has occurred, one can put analog input signals representing lessthen 7.5% of the Nyquist band.3. For single- tone analysis only, users cannot input a tone of FS/4 and have adequate correction of theinterleaved tone. In this case, the interleaved spur falls on top of the wanted single tone, which cannotbe distinguished by the ADX algorithm. FS refers to the combined sampling rate of the analog input.
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2.5 DIP Switches
2.6 Onboard Status Output
2.6.1 LEDs
www.ti.com Circuit and Operational Description
The DIP switch ramp on the board has the following control possibilities:
Table 1. DIP Switches Functional Descriptions
DIPs
[XXXXXX] Functional Description[123456]
1 Reserved. Set to zero.2 Reserved. Set to zero.3 Reserved. Set to zero.4 Nyquist band selector [0 = first Nyquist band, 1 = second Nyquist band]5 Switch for raw or post-processed interleaved output.[0 = raw interleaved data, 1 = post-processed data]6 ADC power down. [0 = ADC Power down, 1 = ADC Power on].
Table 2. DIP Switches Modes
DIPs
Example of Configurations[XXXXXX]
(X is undefined. 0 is down, towards the numbers of the DIP ramp)[123456]
[000X01] The output from the ADS-ADX EVM is raw interleaved data.[000011] The output from the ADS-ADX EVM is the post-processed interleaved data.The signal is reconstructed for the first Nyquist band.[000111] The output from the ADS-ADX EVM is the post-processed interleaved data.The signal is reconstructed for the second Nyquist band.
Four LEDs are on the board. A more thorough description on the signal requirements for estimation isavailable in the data sheet for the ADX IP-core.
Table 3. LED Functions
LED Color Description
D4 Green On – Channel mismatch has been estimated and outputs are valid to specification.Off – Channel mismatch is not estimated, output may be outside specification.Blink (together with D2) – Clock is not stable or not connectedD3 Green On – A valid calibration signal is available and the post-processing tracks the channel mismatch.Off – A valid calibration signal is not available and the post-processing is locked to last estimated channelmismatch.
Blink (together with D1) – Clock is not stable or not connectedD2 Red On – License checked and is OK.Off – License not yet checked.Slow blink – License time expired. Reset manually to renew.Fast blink – License error.D1 Red On – New available dataset is stored in internal memory.Off – No new dataset is available.(This LED will blink when in continuous acquisition mode).
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2.7 Digital Outputs
2.7.1 Soft Touch Probe Connector
2.7.2 USB Connector
3 Installation
Installation www.ti.com
On the board are two soft touch probe connectors that output the data, as configured by the DIP switches.
The onboard USB1.1 chip communicates with the FPGA. Transfer speed is 3 megabaud.
To install the software, run the ADCaptureLab-setup.exe file and follow the instructions for installation.
Before continuing, you need to close any other application running to avoid the need of rebooting thesystem.
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www.ti.com Installation
If you choose to install FTDI USB drivers from the installation program, the drivers are pre-installed onyour hard disk, but are not activated until you connect a powered ADS-ADX EVM to the computer for thefirst time.
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4 View
Analysis window
(7.2)
FFT plot Plot tools (8)
SETTINGS/SETUP
(5.1)
Connect & Capture (5.2)
Import & Export
Plot settings (7.1)
Time-series plot of
data
View www.ti.com
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5 Capturing Data
5.1 Setup
5.2 Connect to Board
Find board
Acquire single batch data
www.ti.com Capturing Data
Setting Description
Sample frequency Set the sampling frequency for the system.Input frequency Set the input frequency. Only used for tagging when exporting data.Board Available choices:
•[1] ADX EVM 2xADS5463 (12b)•[2] ADX EVM 2xADS5474 (14b)
1. To find a board – push the button labeled Find USB Devices. The boards connected to the computerthen show up in the Devices box. Status information on the enumeration of devices shows in Logwindow.
2. Select a compatible device board from the Devices list. The buttons Acquire data and Run are thenactivated.
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5.3 Capture Single Batch
5.4 Continuous Capture
Run/Stop button for continuous capture
6 Import and Export of Data
6.1 Import Data
6.2 Export Data
7 Data Analysis
7.1 Analysis Settings
7.1.1 Type of Analysis
Analysis type
Import and Export of Data www.ti.com
To capture a single batch from the board, press Acquire Data.
To capture continuously, pressing the Run. button changes name to Stop, and pressing it stops thecapturing. If plots are in Play mode (see Section 7 ), plots are updated continuously as new data arrivesfrom the board.
Select a file (file on text file format supported) in dialog box, and press Open. File contents are loaded intothe plot windows (unless they are in Pause mode). To import, you can also drag and drop the file to theADCaptureLab main window directly.
Select filename in dialog box, and press Save. Data can be exported on a text file format with a header, ora pure ASCII file for use with MATLAB™, for example.
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