Texas Instruments LP8731-Q1 User manual

Using the LP8731-Q1 Evaluation Board
User's Guide
Literature Number: SNVU458
November 2014

Contents
1 Introduction......................................................................................................................... 3
2 Hardware Setup ................................................................................................................... 3
2.1 Jumper Settings .......................................................................................................... 3
2.2 Connect USB2ANY box to LP8731YZREVM......................................................................... 3
3 Board Layout and Bill of Materials ......................................................................................... 5
3.1 Bill of Materials for LP8731-Q1EVM................................................................................... 6
4 LP8731-Q1EVM PCB Layout and Layers ................................................................................. 7
5 Graphic User Interface (GUI).................................................................................................. 8
5.1 Overview .................................................................................................................. 8
5.2 PC Requirement.......................................................................................................... 8
5.3 Start-Up.................................................................................................................... 8
6 General Control and LDO Settings ......................................................................................... 9
6.1 USBAny Control.......................................................................................................... 9
6.2 GPIO Enable Control .................................................................................................... 9
6.3 General Control and LDO Settings .................................................................................... 9
6.4 System Control.......................................................................................................... 10
6.5 LDO Output Control .................................................................................................... 10
6.6 Buck Voltage & Ramp Rate Control.................................................................................. 10
6.7 Buck Function........................................................................................................... 11
6.8 Misc Page................................................................................................................ 12
2Table of Contents SNVU458–November 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated

User's Guide
SNVU458–November 2014
LP8731-Q1 Evaluation Board
1 Introduction
The Texas Instrument LP8731YZREVM evaluation module (EVM) helps designers evaluate the operation
and performance of the LP8731-Q1 dual high current step down DC/DC and dual linear regulators with I2C
interface.
The EVM contains one LP8731-Q1 (see Table 1):
Table 1.
PART NUMBER PACKAGE BODY SIZE (MAX)
LP8731-Q1 DSBGA (25) 2.52 mm x 2.52 mm
2 Hardware Setup
This section describes the jumpers and connectors on the EVM as well as how to properly connect, set
up, and use the LP8731YZREVM. The LP8731YZREVM package should include: one LP8731YZREVM,
one USB2ANY box set.
As Figure 2 shows, the USB2ANY box set contains six (A-F) parts, and only three parts (A, B, C) are
required for LP8731YZREVM evaluation.
2.1 Jumper Settings
Place all the jumpers with dark red (power) and light blue (Enable) color mark as shown in Figure 1 .
2.2 Connect USB2ANY box to LP8731YZREVM
1. Connect USB cable (A) and one side of 30-pin ribbon cable (B) to USB2ANY box(C).
2. Connect another side of the 30-pin ribbon cable(B) to USB2ANY box(C) 30-pin connector.
All trademarks are the property of their respective owners.
3
SNVU458–November 2014 LP8731-Q1 Evaluation Board
Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Hardware Setup www.ti.com
Figure 1.
Figure 2.
4LP8731-Q1 Evaluation Board SNVU458–November 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated

www.ti.com Board Layout and Bill of Materials
3 Board Layout and Bill of Materials
Figure 3. LP8731-Q1 Schematic
5
SNVU458–November 2014 LP8731-Q1 Evaluation Board
Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Board Layout and Bill of Materials www.ti.com
3.1 Bill of Materials for LP8731-Q1EVM
ITEM DESIGNATOR QTY VALUE PART NUMBER MANUFACTURER DESCRIPTION
1 C1, C2, C7, C14 4 1 µF 08055C105KAT2A AVX CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0805
2 C3, C4, C8, C9 4 10 µF C3216X7R1C106M TDK CAP, CERM, 10uF, 16V, +/-20%, X7R, 1206
3 C5, C6 2 0.47 µF C2012X7R1E474K TDK CAP, CERM, 0.47 µF, 25 V, +/- 10%, X7R, 0805
4 C10, C11 2 10 µF EMK212BB7106MG-T Taiyo Yuden CAP, CERM, 10 µF, 16 V, +/- 20%, X7R, 0805
Omron Electronic
5 J1 1 XG4C-3031 Connector, 15x2, 3A 300V STRT DIP, TH
Components
JP1, JP2, JP3, JP4,
6 8 5-146261-1 TE Connectivity Header, 100mil, 2x1, Gold plated, TH
JP5, JP6, JP7, JP8
JP9, JP10, JP12,
7 4 TSW-101-07-G-S Samtec Header, 100mil, 1pos, Gold, TH
JP18
JP13, JP14, JP15, Header, TH, 100mil, 1x3, Gold plated, 230 mil above
8 5 1 x 3 PBC03SAAN Sullins Connector Solutions
JP16, JP17 insulator
9 L2, L3 2 2.2 µH VLCF5020T-2R2N2R6-1 TDK Corporation INDUCTOR POWER 2.2UH 2.6A SMD
10 R1, R2 2 4.7 k CRCW08054K70JNEA Vishay-Dale RES, 4.7kΩ, 5%, 0.125W, 0805
11 R15 1 100 k CRCW0805100KFKEA Vishay-Dale RES, 100kΩ, 1%, 0.125W, 0805
SH-JP1, SH-JP2, SH-
JP3, SH-JP4, SH-JP5,
12 SH-JP6, SH-JP13, 11 1 x 2 2SN-BK-G Samtec Shunt, 2mm, Gold plated, Black
SH-JP14, SH-JP15,
SH-JP16, SH-JP17
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8,
TP9, TP10, TP11,
TP12, TP13, TP14,
13 TP15, TP16, TP17, 27 Double 1593-2 Keystone Terminal, Turret, TH, Double
TP18, TP19, TP20,
TP21, TP22, TP23,
TP24, TP25, TP26,
TP27
14 U1 1 LP8731Q1YZR TEXAS INSTRUMENTS Dual Step-Down DC/DC and Linear Reg
6LP8731-Q1 Evaluation Board SNVU458–November 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated

www.ti.com LP8731-Q1EVM PCB Layout and Layers
4 LP8731-Q1EVM PCB Layout and Layers
Figure 4. Top Layer Figure 5. Mid-Layer 1
Figure 6. Mid-Layer 2 Figure 7. Bottom Layer
7
SNVU458–November 2014 LP8731-Q1 Evaluation Board
Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Graphic User Interface (GUI) www.ti.com
5 Graphic User Interface (GUI)
5.1 Overview
Texas Instruments has created a graphic user interface (GUI) and USB2ANY box that can help exercise
the part in a simple way. This section descripts in detail of how to use the GUI to communicate with the
LP8731YZREVM.
5.2 PC Requirement
Windows 7, Microsoft .net framework 4.0
5.3 Start-Up
1. Complete the hardware setup following previous setup section.
2. Apply recommended voltage (see LP8731-Q1 data sheet (SNVSA28) for details) to LP8731YZREVM.
3. Launch the GUI by double clicking the Icon
4. The GUI then launches as picture shows below
NOTE: At the first time use, the USB2ANY firmware update message window pops up, please
simply follow the screen instruction to complete the update.
Figure 8.
8LP8731-Q1 Evaluation Board SNVU458–November 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated

www.ti.com General Control and LDO Settings
6 General Control and LDO Settings
6.1 USBAny Control
Figure 9. USB2ANY Control
6.2 GPIO Enable Control
Figure 10.
NOTE: In order to have the control works correctly, please place the jumpers according to Section 2.
6.3 General Control and LDO Settings
Figure 11.
9
SNVU458–November 2014 LP8731-Q1 Evaluation Board
Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

General Control and LDO Settings www.ti.com
Individual enable register for each power rail, default are all enabled.
6.4 System Control
Figure 12.
Two dropdown boxes for selecting buck power operating mode PWM Only or Auto (note the default is
PWM mode) — please contact TI sales office if the auto/PFM mode is needed. The third dropdown box is
used for selecting power up/down sequence delay when EN_T control is used.
6.5 LDO Output Control
Figure 13.
Two slide bars are used to change the LDO outputs.
6.6 Buck Voltage & Ramp Rate Control
Figure 14.
These four drop-down boxes are used to select target voltage and ramp for both buck regulators, please
read the LP8731Q datasheet link for detail information. Read button is for updating/reading the latest
register values.
10 LP8731-Q1 Evaluation Board SNVU458–November 2014
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated