Wavecom Gr64 Installation and operating instructions

PPLICATION NOTE

GR/GS64 General Purpose and

Alternate Function I/O

Reference:

I_DEV_Gx64_APN_008

Revision: 001

Date: 2006/12/15

The information contained in this document is the proprietary information of Wavecom Inc.

The contents are confidential and any disclosure to persons other than the officers,

employees, agents or subcontractors of the owner or licensee of this document, without the

prior written consent of Wavecom Inc, is strictly prohibited.

Further, no portion of this publication may be reproduced, stored in a retrieval system, or

transmitted in any form or by any means, electronic or mechanical, including photocopying

and recording, without the prior written consent of Wavecom Inc, the copyright holder.

First Edition (December 2006)

Wavecom Inc publishes this manual without making any warranty as to the content contained

herein. Further Wavecom Inc reserves the right to make modifications, additions and

deletions to this manual due to typographical errors, inaccurate information, or

improvements to programs and/or equipment at any time and without notice. Such changes

will, nevertheless be incorporated into new editions of this manual.

Publication number: ___________

Printed in US

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Alternate Function I/O

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Table of Contents

1Introduction ............................................................................................ 4

1.1 LOGIC INTERFACE VOLTAGE.......................................................................................... 4

2GPIO vs. Alternate I/O Functions ............................................................. 5

2.1 DEFAULT SETTINGS....................................................................................................... 5

2.2 AT*GPIO OR ALTERNATE FUNCTION SELECTION ............................................................ 5

3Using GPIO.............................................................................................. 6

3.1 USING GPIO FOR CONTROL ........................................................................................... 6

3.2 USING GPIO FOR MONITORING ...................................................................................... 7

4Using Alternate I/O functions.................................................................. 8

4.1 UART 1 MODEM CONTROL............................................................................................ 8

4.2 ACTIVITY INDICATION................................................................................................... 9

4.3 SD/MMC SUPPORT ........................................................................................................ 9

4.4 I2C SUPPORT .............................................................................................................. 10

Appendix A -- I/O Pins by GR/GS64 Device Type........................................ 11

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1Introduction

The GR/GS64 family of Wireless CPUs is designed to provide a rich and flexible set of

physical interfaces. These interfaces allow the application designer to integrate

GR/GS64 Wireless CPUs into the widest possible variety of applications and still meet

cost, power and size constraints.

GR/GS64 general purpose input and output (GPIO) pins represent the simplest of

digital interfaces—single line digital signals. GPIO pins can be used to control or

monitor devices such as relays, contacts, actuators and lamps with appropriate signal

conditioning. GR/GS64 Wireless CPUs provide as many as thirty-three GPIO pins.

GR/GS64 Wireless CPUs also provide up to three analogue-to-digital converters.

These convert analogue voltage levels to digital measurements. With appropriate

transducers, applications can use the measurements to monitor a wide variety of

physical conditions like temperatures, pressures or fluid levels.

1.1 Logic Interface Voltage

All GPIO interfaces are referenced to the voltage level available on system connectors

VREF-pin, unless otherwise is stated in the units Integrators Manual.

GR/GS64 Wireless

CPU type VREF Direction VREF Voltage Level

GS64 Output from Wireless CPU 1.8V

GR64001 Output from Wireless CPU 2.8V

GR64002 Input to Wireless CPU 1.8V – 5.0V

Under no circumstances can a logic signal exceed VREF. Level translators must be

incorporated if the application logic voltage is different than that of the Wireless CPU.

Failure to heed to this requirement can lead to unexpected behaviour and may

permanently damage the Wireless CPU.

Examples of possible level translators to use consist of, but are not limited to:

Maxim MAX3000 family

ST ST2378E

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2GPIO vs. Alternate I/O Functions

Many of the GPIO pins can be configured to perform dedicated operations such as

activity indication, modem control, SD/MMC memory support or I2C. These dedicated

operations are known as alternate I/O functions. While the number of GPIO and

dedicated tasks that can be active simultaneously is limited by this technique, the

Wireless CPU size, power consumption and pin count are kept small with no decrease

in flexibility to meet application requirements.

•Section 3describes how to use and control GPIO pins.

•Section 4describes available alternate I/O functions.

2.1 Default Settings

The factory default setting of all IO’s is as input signals and pulled up. If a signal is

changed by the application and stored with AT&W the change is stored so that the

next time the Wireless CPU is powered up the IO will maintain the new customer

setting.

2.2 At*GPIO or Alternate Function Selection

The integrator should understand that the use of a pin for GPIO or an alternate

function is exclusive. If an attempt is made to issue GPIO commands on a pin that is

enabled for an alternate I/O function, the GPIO command will return an error

indication. When the alternate function has been disabled, GPIO commands may once

again be issued without error on the pin.

Please consult the table in Appendix A for the GR/GS64 Wireless CPU type that is

used. Each table describes the pins available for GPIO use and indicates if a pin is

part of an alternate function. Select pins for GPIO that do not belong to an alternate

function that is also needed.

For example, suppose that two GPIO pins are needed in a GR64 application, one to

monitor a contact closure and another to control a relay. The application must also

minimize power consumption, so the GR64 will be placed in standby mode

periodically. Standby mode requires the use of the modem control lines which are an

alternate function of the GPIO7-GPIO12 pins. Therefore, do not select the monitor

and control pins from the GPIO7-GPIO12 group. In this example, we select GPIO1 to

monitor the contact closure and GPIO2 to control the relay.

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3Using GPIO

3.1 Using GPIO for Control

GPIO pins are configured and controlled in software using the E2IO AT command. See

the GR/GS64 AT Command Manual for a complete description of the E2IO command.

To continue our example, the relay is controlled from the GPIO2 pin. From Table 2 in

Appendix A, the E2IO signal name for GPIO2 is IO2.

To control an external device using a GPIO, configure the pin for output then set the

desired level.

AT*E2IO=2,”IO2”,1 (configure GPIO2 for output)

AT*E2IO=1,”IO2”,1 (assert GPIO2)

The application can query the level of a GPIO pin, whether configured for input or

output.

AT*E2IO=0,”IO2”

*E2IO: 0,"IO2",1 (pin level is high)

The application can also query whether a pin is configured for input or output.

AT*E2IO=3,"IO2"

*E2IO: 3,"IO2",1 (GPIO2 is configured for output)

The configured direction of GPIO pins is saved in the profile. If the application saves

the profile using AT&W command, the pins will be configured on subsequent Wireless

CPU start-ups according to the directions set when the profile was saved. However,

the external circuitry should be designed to act benignly if the control signal is not

present or is configured for input. In this example, the application should select

either the normally open or normally closed outputs of the relay to provide a benign

start-up state.

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3.2 Using GPIO for Monitoring

The contact closure is connected to GPIO1. From Table 1 in Appendix A, the E2IO

signal name for GPIO1 is IO1.

Configure the GPIO1 pin for input.

AT*E2IO=2,"IO1",0

The application can query the level of a GPIO pin, whether configured for input or

output.

AT*E2IO=0,”IO1”

*E2IO: 0,"IO1",0 (pin level is low)

Querying the level of a GPIO pin repeatedly can be wasteful, so the application can

program GPIO pins as input triggers. When a pin is configured as a trigger, a change

in the pin’s level will cause a report to be issued on the AT command interface.

Configure the GPIO1 pin as an input trigger.

AT*E2IO=4,”IO1”,1

Now any changes in the level of the GPIO1 signal will cause a report.

*E2IO: 4,"IO1",1

This technique can be quite useful in low-power applications. The Wireless CPU can

be placed in standby mode and will awaken when a transition on a pin configured as

an input trigger occurs.

The application can query if a GPIO pin has been configured as an input trigger.

AT*E2IO=5,"IO1"

*E2IO: 5,"IO1",1

The input trigger feature can be disabled for a GPIO pin. No reports will subsequently

be issued when a level change occurs on that pin.

AT*E2IO=4,”IO1”,0

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4Using Alternate I/O functions

The following sections describe the alternate I/O functions provided by GR/GS64

Wireless CPUs.

4.1 UART 1 modem control

The UART 1 modem control alternate function provides full RS-232 modem control

signals. Some of the reasons to select UART 1 modem control alternate function are:

•Flow control is typically required to prevent serial buffer overruns when high-

speed UART data rates are used.

•Modem control enables the RTS/CTS hardware flow control mechanism. If standby

mode is required for low power consumption,

•DTR and DSR are used for sleep/wake handshaking. The Ring Indicator signal can

indicate receipt of incoming calls or messages.

•Plug-and-Play enumeration of serial devices requires modem control lines. If the

application is using the Windows driver to control GR/GS64 Wireless CPUs, the

UART 1 modem control alternate function must be enabled.

By factory default, the UART 1 modem control alternate function is selected. The

alternate function is disabled or enabled by using the *E2RS232 AT command.

AT*E2RS232=2 (disables UART 1 modem control)

AT*E2RS232=0 (enables UART 1 modem control)

The *E2RS232 settings are not retained across power downs. If the application wishes

to disable the UART 1 modem control alternate function, it must do so after each

Wireless CPU restart. The application may then use the modem control pins for GPIO

purposes.

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4.2 Activity Indication

The LED signal can display Wireless CPU activity when its alternate function is

enabled. This signal has historically been connected to an LED to provide a visual

indication of Wireless CPU activity. The following table describes the activity

indications if an LED is connected:

LED indication Description

Off Wireless CPU not powered on.

On, steady Power is applied but the Wireless CPU is not registered on the

network. Corresponds to CREG conditions 0, 2, and 4.

Slow flashing The Wireless CPU is registered on the network. Corresponds to

CREG conditions 1,5.

Quick

flashing

The Wireless CPU has received an SMS message within the last

10 seconds.

Slow flashing is characterized by a 30 ms pulse with a 2-second period. Quick

flashing is characterized by a 200 ms on pulse with a 400 ms period. The quick

flashing lasts for 10 seconds after the last SMS message was received.

The activity indication alternate function for the LED signal can be enabled or disabled

using the *E2LED AT command.

AT*E2LED=1 (enables LED activity)

AT*E2LED=0 (disables LED activity)

The LED activity indication function selection is saved in the profile. The current

selection can be retained across power downs if the AT&W command is used to save

the profile to non-volatile storage.

4.3 SD/MMC support

The GS64 Wireless CPU can act as either a secure digital (SD) or multimedia memory

card (MMC) bus host. I/O pins GPIO25-GPIO33 are currently permanently configured

for the SD/MMC alternate function and cannot be used as GPIO pins.

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4.4 I2C Support

The GR/GS64 Wireless CPU can act as either an I2C or GPIO interface. I2C can be

enabled or disabled using the AT*E2I2C AT command.

AT*E2I2C=1 (enables I2C)

AT*E2I2C=0 (disables I2C)

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Appendix A -- I/O Pins by

GR/GS64 Device Type

Table 1. GR64 I/O pins

GR64 Function AT*E2IO Alt function GR4x

Pin Primary Sig GPIO <io> section Equivalent

21 GPIO1 GPIO1 IO1 GPIO1

22 GPIO2 GPIO2 IO2 GPIO2

23 GPIO3 GPIO3 IO3 GPIO3

24 GPIO4 GPIO4 IO4 GPIO4

13 ADIN4 GPIO5 IO5 GPIO5

33 LED GPIO6 IO6 4.2 GPIO6

32 DSR1 GPIO7 IO7 4.1 GPO3

36 RI GPIO8 IO8 4.1 GPO2

39 RTS1 GPIO9 IO9 4.1 GPIO9

37 DTR1 GPIO10 IO10 4.1 GPI1

38 DCD1 GPIO11 IO11 4.1 GPO1

40 CTS1 GPIO12 IO12 4.1 GPO4

29 SDA GPIO13 IO13 4.4

30 SCL GPIO14 IO14 4.4

43 TD3 GPIO7

44 RD3 GPIO8

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Table 2. GS64 I/O pins

GS64 Function AT*E2IO Alt function

Pin Primary Sig GPIO <io> section

40 GPIO1 GPIO1 IO1

41 GPIO2 GPIO2 IO2

43 GPIO3 GPIO3 IO3

44 GPIO4 GPIO4 IO4

45 SDA GPIO5 IO5 4.4

48 SCL GPIO6 IO6 4.4

49 GPIO7 GPIO7 IO7

50 GPIO8 GPIO8 IO8 4.2

51 GPIO9 GPIO9 IO9

53 RI GPIO10 IO10 4.1

54 DCD1 GPIO11 IO11 4.1

55 DTR1 GPIO12 IO12 4.1

56 DSR1 GPIO13 IO13 4.1

57 RTS1 GPIO14 IO14 4.1

58 CTS1 GPIO15 IO15 4.1

83 KEYROW1 GPIO16 IO16

84 KEYROW2 GPIO17 IO17

85 KEYROW3 GPIO18 IO18

86 KEYROW4 GPIO19 IO19

87 KEYROW5 GPIO20 IO20

88 KEYCOL1 GPIO21 IO21

89 KEYCOL2 GPIO22 IO22

90 KEYCOL3 GPIO23 IO23

91 KEYCOL4 GPIO24 IO24

74 MMCCLK GPIO25 IO25 4.3

75 MMCCMD GPIO26 IO26 4.3

76 MMCDAT0 GPIO27 IO27 4.3

77 MMCDAT1 GPIO28 IO28 4.3

78 MMCDAT2 GPIO29 IO29 4.3

79 MMCDAT3 GPIO30 IO30 4.3

80 MMCCMD_EN GPIO31 IO31 4.3

81 MMCDAT_EN GPIO32 IO32 4.3

82 MMCDAT_EN0 GPIO33 IO33 4.3

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