ADT ADZBT1HP Instructions for use

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ADZBT1HP Hardware User Manual
Hardware User Manual
Version 1.1

2/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
Revision History
Version
Date
Comment
1.0
2020/3/16
᪂つసᡂ
1.1
2020/8/28
PS
㒊
CLK
ኚ᭦ࠊ
J1,J2
ࢥࢿࢡࢱᆺ␒ኚ᭦

3/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
┠ḟ
1Overview............................................................................................................................................. 4
2Block Diagram ................................................................................................................................... 5
3ᶵ⬟ㄝ󰩣.............................................................................................................................................. 6
3.1Power Supply.............................................................................................................................. 7
3.2Zynq FPGA Configration ........................................................................................................... 8
3.3JTAG I/F.................................................................................................................................... 10
3.4QSPI Flash................................................................................................................................ 10
3.5DDR Memory ............................................................................................................................ 10
3.6USB Serial Port........................................................................................................................ 11
3.7MicroSD Slot............................................................................................................................. 11
3.8Clock Source ............................................................................................................................. 11
3.9User I/O..................................................................................................................................... 12
3.10LED ........................................................................................................................................... 15
3.11DIP SW...................................................................................................................................... 16
4Appendix .......................................................................................................................................... 17

4/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
1 Overview
ᮏFPGA ࣮࣎ࢻࠊADZBT1HP ࡢ௙ᵝ࡟ࡘ࠸࡚グ㍕ࡋࡲࡍࠋ
ADZBT1-Dualcore
FPGA
XC7Z010(Zynq)Pakage㸸CLG400
Processor Core
Dual-Core
ARM Coretex-A9 MPCore
Up to 866MHz
Processor
Extensions
NEON SIMD Engine and Single/Double Precision
Floating Point Unit Per Processor
L1 Cache
32KB Instruction, 32KB Data per processor
L2 Cache
512KB
On-Chip Memory
256KB
DRAM
DDR3L 512MB
QSPI Flash
512Mb(64MB)
UART
Micro USB UART Debug I/F㸦USB Micro B㸧
SD Card
SD Card x 1
Connect I/O
133 Pin User I/O
I/O ࡣ௨ୗࡢ⏝㏵࡟ᣑᙇྍ⬟ࠋ
USB2.0(OTG) , Gigabit Ether,
UART, CAN 2.0B, I2C, SPI, GPIO, User I/F
Power
DC In : 5V㸦ᣑᙇࢥࢿࢡࢱ࠿ࡽ౪⤥㸧 / Micro USB : 5V
Programmable Logic
Logic Cells
28K
Look-up Tables
(LUTs)
17,600
Flip-Flop
35,200
Total Block RAM
2.1Mb
DSP Slice
80
Board Size
50.0mm x 50.0mm
ືస ᗘ⠊ᅖ
0㹼85Υ
ᾘ㈝㟁ຊ
⣙1.5W㸦5Vࠊ300mA ௨ୗCPU ࡣDhrystone ᐇ⾜󰪍㸧

5/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
2 Block Diagram
ADZBT1 ࡢࣈࣟࢵࢡᵓᡂࢆࠊ௨ୗ࡟♧ࡋࡲࡍࠋ
㻽㻿㻼㻵㻌㻲㼘㼍㼟㼔
㻢㻠㻹㻮
㻰㻵㻼㼋㻿㼃㻌㻞ಶ
㻸㻱㻰㻟ಶ
㼁㻿㻮㻌㼠㼛㻌㻿㼑㼞㼕㼍㼘
㼁㻭㻾㼀
㼁㻿㻮㻌㻹㼕㼏㼞㼛
㻼㼛㼣㼑㼞㻌㼟㼛㼡㼞㼏㼑
㻿㼑㼘㼑㼏㼠
㻡㼂㻡㼂
㻰㻯㻛㻰㻯
㻿㻰㻌㻯㼍㼞㼐
㻯㼛㼚㼚㼑㼏㼠㼛㼞㻞
Zync FPGA
XC7Z010
CLG400
䠄㻭㻾㻹㻌㻯㼛㼞㼑㼠㼑㼤㻙㻭㻥
㻼㼞㼛㼏㼑㼟㼟㼛㼞㻌
䠇㻌
㻲㻼㻳㻭㻌㼁㼟㼑㼞㻌㻸㼛㼓㼕㼏䠅
㻯㼛㼚㼚㼑㼏㼠㼛㼞㻝
㼀㼛㻌㻯㼛㼙㼜㼡㼠㼑㼞
㻰㻰㻾㻟㻸
㻡㻝㻞㻹㻮
㻾㼑㼟㼑㼠㻌㻮㼡㼠㼠㼛㼚
㻼㼛㼣㼑㼞㻌㻸㻱㻰
㻰㼛㼚㼑㻌㻸㻱㻰
㻜㻚㻢㻣㻡㼂
䠍㻚㻜㼂
㻝㻚㻤㼂
㻝㻚㻟㻡㼂
㻟㻚㻟㼂
㻮㼛㼛㼠㻌㻹㼛㼐㼑㻌㻿㼃
㻻㻿㻯㻌㻟㻟㻹㻴䡖
㻼㻿㒊
㻼㻸㒊
㻼㻿㒊䠇㻼㻸㒊ಙྕ
㻢㻣㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻
㻼㻸㒊ಙྕ䠖㻢㻢㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻
㻶㼀㻭㻳ಙྕ䝁䝛䜽䝍
㻭㻰㼆㻮㼀㻝ᅇ㊰ᵓᡂ
㻡㼂እ㒊౪⤥
䠄㻿㼁㻮ᇶᯈ䛛䜙䠅
㻟㻚㻟㼂䚸㻝㻚㻤㼂౪⤥
㻡㼂እ㒊౪⤥
䠄㻿㻰㻛㻲㼘㼍㼟㼔㻛㻶㼀㻭㻳䠅

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ADZBT1HP Hardware User Manual
3 ᶵ⬟ㄝ󰩣
ADZBT1 ࡢᶵ⬟࡟ࡘ࠸࡚ࠊ௨ୗ࡟ㄝ󰩣ࡋࡲࡍࠋ

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ADZBT1HP Hardware User Manual
3.1 Power Supply
ADZBT1 ࡢ㟁※ࡣࠊձMicro USBࠊղSUB ᇶᯈ⤒⏤ࠊճእ㒊㟁※౪⤥ࡢ㸱㏻ࡾ࠿ࡽ⤥㟁ࡍࡿࡇ࡜ࡀ
࡛ࡁࡲࡍࠋ⤥㟁ࡢษࡾ᭰࠼ࡣࠊࢪࣕࣥࣃ࡟ࡼࡾษࡾ᭰࠼ࡲࡍࠋ
ձMicro USB ࠿ࡽ 5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃ᥋⥆
㼁㻿㻮 㻰㻯㻡㼂
㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂
㻭㻰㼆㻮㼀㻝
㻰㻯㻛㻰㻯
㻹㼕㼏㼞㼛㻌㼁㻿㻮 㻶㼡㼚㼜㼑㼞
䝁䝛䜽䝍䠎 䝁䝛䜽䝍䠍
ղࢥࢿࢡࢱ⤒⏤㸦SUB ᇶᯈ➼㸧5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋⥆
㻭㻯
䜰䝎䝥䝍䞊
㻰㻯㻡㼂 㻡㼂
㻿㼁㻮ᇶᯈ
㻝㻚㻤㼂㻔㻜㻚㻟㻭㻌㻹㻭㼄䠅
㻟㻚㻟㼂㻔㻝㻚㻞㻭㻌㻹㻭㼄䠅
㻝㻚㻤㼂㻛㻟㻚㻟㼂
㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂
㻭㻰㼆㻮㼀㻝
㻰㻯㻛㻰㻯
㻹㼕㼏㼞㼛㻌㼁㻿㻮 㻶㼡㼚㼜㼑㼞
䝁䝛䜽䝍䠎 䝁䝛䜽䝍䠍
ճୖグ௨እ࡟እ㒊࠿ࡽ 5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋⥆
   5V/GND ࢆ᥋⥆ࡋ┤᥋౪⤥ࡍࡿࡇ࡜ࡀྍ⬟࡜࡞ࡗ࡚࠸ࡲࡍࠋ

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ADZBT1HP Hardware User Manual
3.2 Zynq FPGA Configration
Zynq FPGA ࡢConfigration ࡣࠊQSPI/JTAG/SDCard ࡢ㸱ࡘࡢ Boot Mode ࠿ࡽ㑅ᢥ࡛ࡁࡲࡍࠋ
Mode ࡢษࡾ᭰࠼ࡣࠊDIP_SW3㸦M0㸧ࠊDIP_SW4㸦M1㸧࡟ࡼࡾษࡾ᭰࠼ࡲࡍࠋ
DIP SW ࡢタᐃ⾲ࢆ௨ୗ࡟♧ࡋࡲࡍࠋ
タᐃ Mode
DIP SW4㸦M1㸧
DIP SW3㸦M0㸧
QSPI Mode
OFF
OFF
JTAG Mode
OFF
ON
SD Card Mode
ON
OFF

9/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
ڦJTAG Mode
Xilinx SDK ࢆ౑⏝ࡋ࡚ࢯࣇࢺ࢙࢘࢔ࡢࢹࣂࢵࢢཬࡧࠊ Xilinx Vivado ࢆ౑⏝ࡋ࡚ࣁ࣮ࢻ࢙࢘
࢔ࡢ FPGA ࡢෆ㒊ಙྕࢆࣔࢽࢱࡋ࡚ࢹࣂࢵࢢࡍࡿࡇ࡜ࡀ࡛ࡁࡲࡍࠋ
ࡲࡓࠊQSPI Boot Mode ࡛౑⏝ࡍࡿ㝿࡟ࠊQSPI ࡬ࡢ᭩ࡁ㎸ࡳ󰪍࡟ JTAG Mode ࢆ౑⏝ࡋࡲࡍࠋ
JTAG Mode ࡢタᐃ
ڦQSPI Boot Mode
ADZBT1 ࡟ࡣࠊQuad-SPI Serial Flash ࢆᐇ⿦ࡋ࡚࠸ࡲࡍࠋ
࣮࣎ࢻࡢ㟁※㉳ືᚋ࡟ࠊQSPI ࡟ಖᏑࡉࢀ࡚࠸ࡿ࢖࣓࣮ࢪࢆㄞࡳ㎸ࢇ࡛ࠊ㉳ືࡍࡿࡇ࡜ࡀ࡛ࡁࡲ
ࡍࠋ
QSPI Boot Mode ࡢタᐃ
ᡭ㡰౛㸸
1) DIP_SW3=ON ࡟ࡋ࡚ࠊJTAG Mode ࡟ࡋࡲࡍࠋ
2) ࣮࣎ࢻࡢ㟁※ࢆ᥋⥆ࡋࡲࡍࠋ
3) Xilinx JTAG ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝ࠿ࡽࠊXilinx SDK ࢆ౑ࡗ࡚ QSPI ࡟᭩ࡁ㎸ࡳࡲࡍࠋ
4) ᭩ࡁ㎸ࡳᚋࠊDIP_SW3=OFF ࡟ࡋ࡚ࠊQSPI Mode ࡟ࡋࡲࡍ
5) ࣮࣎ࢻࡢ㟁※ࢆ OFF ࡋࡲࡍࠋ
6) ෌ᗘ㟁※ࢆ ON ࡍࡿ࡜ࠊQSPI ࡟᱁⣡ࡉࢀ࡚࠸ࡿ࢖࣓࣮ࢪࡀㄞࡳฟࡉࢀ࡚ࠊ
FPGA ࡟ࢥࣥࣇ࢕ࢢ࣮ࣞࢩࣙࣥࡀ⾜ࢃࢀࡲࡍࠋ
ڦSD_Card Boot Mode
SD Card ࡟᱁⣡ࡉࢀ࡚࠸ࡿ Boot ⏝ࢹ࣮ࢱࢆ౑ࡗ࡚ Boot ࡍࡿࡇ࡜ࡀ࡛ࡁࡲࡍࠋ
SD Card Boot Mode ࡢタᐃ

10/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
3.3 JTAG I/F
JTAG I/F ࡣࠊ6Pin ࢥࢿࢡࢱ㸦PSL-210203-06㸧ࢆ౑⏝ࡋ࡚࠸ࡲࡍࠋ
ಙྕ㓄⨨ࡣ௨ୗࡢࡼ࠺࡟࡞ࡾࡲࡍࠋ
3.4 QSPI Flash
QSPI I/F ࡣࠊ3.3V ᑐᛂࡢࠊMicron㸸MT25QL512㸦64MB㸧ࢆ౑⏝ࡋ࡚࠸ࡲࡍࠋ
㟁※ᢞධᚋࡢࠊFirst Stage Loader ࢆಖᏑࡍࡿࡓࡵ࡟౑⏝ࡉࢀࡲࡍࠋ
FPGA ࡢPin 㓄⨨ࡣ௨ୗ࡟グ㍕ࡋࡲࡍࠋ
㻹㻵㻻㻞
㻹㻵㻻㻝
㻹㻵㻻㻟
㻹㻵㻻㻠
㻹㻵㻻㻡
㻹㻵㻻㻢
㻲㻼㻳㻭
㻯㻿
㻰㻜
㻰㻝
㻰㻞
㻰㻟
㻯㻸㻷
㻽㻿㻼㻵
3.5 DDR Memory
DDR Memory ࡣࠊDDR3LMicron㸸MT41K256M16㸦512MB㸧ࢆ౑⏝ࡋ࡚࠸ࡲࡍࠋ

11/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
3.6 USB Serial Port
Micro USB ࠿ࡽࠊZynq FPGA ࡬ࡢ UART ࢔ࢡࢭࢫ࡟౑⏝ࡋࡲࡍࠋ
Zynq FPGA ෆ࡛ Linux ㉳ື󰪍࡟ࡣࠊMicro USB-UART ⤒⏤࡛᧯స࡛ࡁࡲࡍࠋ
Micro USB㸦Micro B ࡢࢥࢿࢡࢱᙧ≧㸧
㼁㻿㻮
䋽
㼁㻭㻾㼀
ኚ᥮
㻲㻼㻳㻭
㻹㼕㼏㼞㼛
㼁㻿㻮
㼀㼄㻰
㻾㼄㻰 㻹㻵㻻㻠㻥
㻹㻵㻻㻠㻤
3.7 MicroSD Slot
Micro SD ࡣࠊ2nd-Boot ࡟౑⏝ࡋࡲࡍࠋ
Linux ࡞࡝ࡢ OS ࡢ࢖࣓࣮ࢪࢆ MicroSD ࡟᱁⣡ࡋ࡚࠾ࡃࡇ࡜࡛ࠊBoot 󰪍࡟ Linux ㉳ືࡉࡏࡿࡇ࡜ࡀ
࡛ࡁࡲࡍࠋ
FPGA ࡢPin 㓄⨨ࡣ௨ୗ࡟グ㍕ࡋࡲࡍࠋ
㻹㻵㻻㻠㻣
㻹㻵㻻㻠㻞
㻹㻵㻻㻠㻝
㻹㻵㻻㻠㻜
㻹㻵㻻㻠㻟
㻹㻵㻻㻠㻠
㻹㻵㻻㻠㻡
㻲㻼㻳㻭
㻯㻰
㻰㻜
㻯㻹㻰
㻯㻸㻷
㻰㻝
㻰㻟
㻿㻰㻌㻯㻭㻾㻰
㻰㻞
3.8 Clock Source
33.3333MHz Oscillator ࢆᐇ⿦ࡋࠊFPGA ࡢPS 㒊ࠊPL 㒊࡟ྛࠎධຊࡋ࡚࠸ࡲࡍࠋ
㻲㻼㻳㻭
㻼㻿㼋㻯㻸㻷
㼁㻝㻤
㻟㻟㻚㻟㻟㻟㻟㻹㻴㼦
䠄㻼㻸ഃ㻯㻸㻷㻕
㻟㻟㻚㻟㻟㻟㻟㻹㻴㼦

12/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
3.9 User I/O
  User I/O ࡜ࡋ࡚ࠊ⿬㠃࡟ J1㸸67PinࠊJ2㸸66Pin ࢆᐇ⿦ࡋࡲࡍࠋ
J1㸦⿬㠃 67Pin㸧ࢥࢿࢡࢱᆺ␒㸸FX10A-100P/10-SV1㸦Hirose㸧
J2㸦⿬㠃 66Pin㸧ࢥࢿࢡࢱᆺ␒㸸FX10A-100P/10-SV1㸦Hirose㸧
Pin ࢔ࢧ࢖ࣥࢆ௨ୗ࡟♧ࡋࡲࡍࠋ
ڦJ1 ࢥࢿࢡࢱ㸸
J1
ࢥࢿࢡ
ࢱ
FPGA
J1
ࢥࢿࢡ
ࢱ
FPGA
Pin ␒
ྕ
Pin ␒
ྕ
Port ྡ
Pin ␒ྕ
Pin ␒ྕ
Port ྡ
1

+3.3V
2

+3.3V
3

+3.3V
4

+3.3V
5

+3.3V
6

+3.3V
7

+3.3V
8

+3.3V
9

GND
10

GND
11
A10
PS_MIO37 (OTG_data5)
12
A12
PS_MIO34 (OTG_data2)
13
A11
PS_MIO36 (OTG_clk)
14
B13
PS_MIO50 (ETH Interrupt)
15

GND
16

GND
17
B9
PS_MIO51 (ETH PHY Reset)
18
A14
PS_MIO32 (OTG_data0)
19
C18
PS_MIO39 (OTG_data7)
20
C16
PS_MIO20 (OTG_data4)
21

GND
22

GND
23
F12
PS_MIO35 (OTG_data3)
24
E16
PS_MIO31 (OTG nxt)
25
C15
PS_MIO30 (OTG stp)
26
C13
PS_MIO29 (OTG dir)
27
D15
PS_MIO33 (OTG_data1)
28

GND

13/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
29
D16
PS_MIO46 (OTG Reset)
30
E13
PS_MIO38 (OTG_data6)
31
C11
PS_MIO53 (ETH mdio)
32
C10
PS_MIO52 (ETH mdc)
33
D11
PS_MIO23 (ETH rxd0)
34
D10
PS_MIO19 ((ETH txd2)
35

GND
36

GND
37
D13
PS_MIO27 (ETH rx_ctl)
38
A17
PS_MIO20 (ETH txd3)
39

GND
40

GND
41
A15
PS_MIO26 (ETH rxd3)
42
B18
PS_MIO18 (ETH txd1)
43

GND
44

GND
45
A16
PS_MIO24 (ETH rxd1)
46
E14
PS_MIO17 (ETH txd0)
47

GND
48

GND
49
F15
PS_MIO25 (ETH rxd2)
50
F14
PS_MIO21 (ETH tx_ctl)
51
B17
PS_MIO22 (ETH rx_clk)
52
A19
PS_MIO16 (EH tx_clk)
53

GND
54

GND
55
C8
PS_MIO15
56
C5
PS_MIO14
57
E8
PS_MIO13
58
D5
PS_MIO8
59
B5
PS_MIO9
60
E9
PS_MIO10
61
C6
PS_MIO11
62
D9
PS_MIO12
63

JTAG_nRST
㸦SRST ࡢSW ࢆ᥋⥆㸧
64
V13
IO_L3N_T0_DQS_34
65
E6
PS_MIO0
66
T11
IO_L1P_T0_34
67
U12
IO_L2N_T0_34
68
U13
IO_L3P_T0_DQS_PUDC_B_34
69
T12
IO_L2P_T0_34
70
T10
IO_L1N_T0_34
71
W15
IO_L10N_T1_34
72
U15
IO_L11N_T1_SRCC_34
73
W14
IO_L8P_T1_34
74
U14
IO_L11P_T1_SRCC_34
75
Y14
IO_L8N_T1_34
76
T16
IO_L9P_T1_DQS_34
77
V15
IO_L10P_T1_34
78
T14
IO_L5P_T0_34
79
W13
IO_L4N_T0_34
80
T15
IO_L5N_T0_34
81
V12
IO_L4P_T0_34
82
Y16
IO_L7P_T1_34
83
N18
IO_L13P_T2_MRCC_34
84
Y17
IO_L7N_T1_34
85
P19
IO_L13N_T2_MRCC_34
86
U17
IO_L9N_T1_DQS_34
87
P14
IO_L6P_T0_34
88
N20
IO_L14P_T2_SRCC_34
89
R14
IO_L6N_T0_VREF_34
90
P20
IO_L14N_T2_SRCC_34
91
U19
IO_L12N_T1_MRCC_34
92
R19
IO_0_34
93

GND
94

GND
95

GND
96

GND
97

+1.8V
98

+1.8V
99

+1.8V
100

+1.8V

14/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
ڦJ2 ࢥࢿࢡࢱ㸸
J2
ࢥࢿࢡ
ࢱ
FPGA
J2
ࢥࢿࢡ
ࢱ
FPGA
Pin ␒
ྕ
Pin ␒
ྕ
Port ྡ
Pin ␒
ྕ
Pin ␒ྕ
Port ྡ
1

+5V
2

+5V
3

+5V
4

+5V
5

+5V
6

+5V
7

+5V
8

+5V
9

GND
10

GND
11

TCK
12

TDO
13

TMS
14

TDI
15
R16
IO_L19P_T3_34
16
W16
IO_L18N_T2_34
17
R17
IO_L19N_T3_VREF_34
18
V16
IO_L18P_T2_34
19
V17
IO_L21P_T3_DQS_34
20
T17
IO_L20P_T3_34
21
Y18
IO_L17P_T2_34
22
W18
IO_L22P_T3_34
23
Y19
IO_L17N_T2_34
24
W19
IO_L22N_T3_34
25
V18
IO_L21N_T3_DQS_34
26
W20
IO_L16N_T2_34
27
U20
IO_L15N_T2_DQS_34
28
V20
IO_L16P_T2_34
29
T20
IO_L15P_T2_DQS_34
30
R18
IO_L20N_T3_34
31
C20
IO_L1P_T0_AD0P_35
32
B19
IO_L2P_T0_AD8P_35
33
B20
IO_L1N_T0_AD0N_35
34
A20
IO_L2N_T0_AD8N_35
35

GND
36

GND
37
E17
IO_L3P_T0_DQS_AD1P_35
38
D19
IO_L4P_T0_35
39
D18
IO_L3N_T0_DQS_AD1N_35
40
D20
IO_L4N_T0_35
41

GND
42

GND
43
E18
IO_L5P_T0_AD9P_35
44
F16
IO_L6P_T0_35
45
E19
IO_L5N_T0_AD9N_35
46
F17
IO_L6N_T0_VREF_35
47

GND
48

GND
49
M19
IO_L7P_T1_AD2P_35
50
M17
IO_L8P_T1_AD10P_35
51
M20
IO_L7N_T1_AD2N_35
52
M18
O_L8N_T1_AD10N_35
53

GND
54

GND
55
L19
IO_L9P_T1_DQS_AD3P_35
56
K19
IO_L10P_T1_AD11P_35
57
L20
IO_L9N_T1_DQS_AD3N_35
58
J19
IO_L10N_T1_AD11N_35
59

GND
60

GND
61
L16
IO_L11P_T1_SRCC_35
62
K17
IO_L12P_T1_MRCC_35
63
L17
IO_L11N_T1_SRCC_35
64
K18
IO_L12N_T1_MRCC_35
65

GND
66

GND
67
H16
IO_L13P_T2_MRCC_35
68
J18
IO_L14P_T2_AD4P_SRCC_35
69
H17
IO_L13N_T2_MRCC_35
70
H18
IO_L14N_T2_AD4N_SRCC_35
71
F19
IO_L15P_T2_DQS_AD12P_35
72
G17
IO_L16P_T2_35
73
F20
IO_L15N_T2_DQS_AD12N_35
74
G18
IO_L16N_T2_35

15/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
75

GND
76

GND
77
J20
IO_L17P_T2_AD5P_35
78
G19
IO_L18P_T2_AD13P_35
79
H20
IO_L17N_T2_AD5N_35
80
G20
IO_L18N_T2_AD13N_35
81

GND
82

GND
83
H15
IO_L19P_T3_35
84
K14
IO_L20P_T3_AD6P_35
85
G15
IO_L19N_T3_VREF_35
86
J14
IO_L20N_T3_AD6N_35
87

GND
88

GND
89
G14
IO_0_35
90
J15
IO_25_35
91
N15
IO_L21P_T3_DQS_AD14P_35
92
L14
IO_L22P_T3_AD7P_35
93
N16
IO_L21N_T3_DQS_AD14N_35
94
L15
IO_L22N_T3_AD7N_35
95

GND
96

GND
97
M14
IO_L23P_T3_35
98
K16
IO_L24P_T3_AD15P_35
99
M15
IO_L23N_T3_35
100
J16
IO_L24N_T3_AD15N_35
3.10 LED
ADZBT1 ࡟ࡣ User ⏝LED ࢆ㸱ࡘᐇ⿦ࡋ࡚࠸ࡲࡍࠋ
FPGA ࡢPin 㓄⨨ࡣ௨ୗ࡟グ㍕ࡋࡲࡍࠋ
㻲㻼㻳㻭
㻵㻻㼋㻸㻞㻠㻼㼋㼀㻟㼋㻟㻠
㻵㻻㼋㻸㻞㻠㻺㼋㼀㻟㼋㻟㻠
㻵㻻㼋㻞㻡㼋㻟㻠

16/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
3.11 DIP SW
ADZBT1 ࡟ࡣ User ⏝DIP SW ࢆ㸰ࡘᐇ⿦ࡋ࡚࠸ࡲࡍࠋ
FPGA ࡢPin 㓄⨨ࡣ௨ୗ࡟グ㍕ࡋࡲࡍࠋ
㻲㻼㻳㻭
㻵㻻㼋㻸㻞㻟㻼㼋㼀㻟㼋㻟㻠
㻵㻻㼋㻸㻞㻟㻺㼋㼀㻟㼋㻟㻠

17/17  ࢔ࢻࣂࣥࢫࢹࢨ࢖ࣥࢸࢡࣀࣟࢪ࣮ᰴᘧ఍♫
ADZBT1HP Hardware User Manual
4 Appendix
ADZBT1 ฟⲴ󰪍࡟ࡣࠊฟⲴ᳨ᰝ⏝ࡢ ROM ࢹ࣮ࢱࡀ᭩ࡁ㎸ࡲࢀ࡚࠾ࡾࠊLED Ⅼ⁛ࡍࡿ≧ែ࡜࡞ࡗ
࡚࠾ࡾࡲࡍࠋ౑⏝󰪍࡟ QSPI Flash ࡬ࡢ᭩ࡁ㎸ࡳࠊཪࡣࠊSD Card ࡟ROM ࢹ࣮ࢱࢆ᱁⣡ࡋ࡚ࡈ౑
⏝ࡃࡔࡉ࠸ࠋ
ADZBT1 ࢆ⏝࠸ࡓ㛤Ⓨ࡟࠶ࡓࡾࠊࢧࣥࣉࣝࢹࢨ࢖ࣥࢆᥦ౪ࡋ࡚࠾ࡾࡲࡍࠋ
ࢸࢫࢺ⏝ࡢࢧࣥࣉࣝࢹࢨ࢖ࣥ࡜࡞ࡾࡲࡍࡢ࡛ࠊ〇ရ࡟㌿⏝ࡉࢀࡿሙྜ࡟ࡣࠊ࣮ࣘࢨ࣮ᵝࡢ㈐௵࡟࠾
࠸࡚ࡈ฼⏝ୗࡉ࠸ࡲࡍࡼ࠺࠾㢪࠸⮴ࡋࡲࡍࠋ
ڦ࣮࣎ࢻࣇ࢓࢖ࣝ       㸸adzbt1-400p.zip
ڦࢧࣥࣉࣝࢹࢨ࢖ࣥ 
㸦㸯㸧ࣉࣟࢪ࢙ࢡࢺࣇ࢓࢖ࣝ㸸ADZBT1_400p_Ref.xpr.zip
㸦㸰㸧bsp         㸸adzbt1hp_ref.bsp
㸦㸱㸧ROM ࢹ࣮ࢱ     㸸BOOT.BIN
image.ub
system.dtb
zynq_fsbl.elf
    㸦㸲㸧RootFileSystem    㸸ubuntu18.04LTS_RootFS.tar.gz
࠙㛤Ⓨ⎔ቃࠚ
࣭Vivado 2018.3
࣭Petalinux 2018.3
࣭Ubuntu 16.04 LTS
௨ୖ㸫