Allegro MicroSystems ACS732 User manual

User Manual
ACS732 and ACS733 Evaluation Board
Allegro ACS732/33 demo board is pictured in Figure 1 below. Refer to Table 1 for symbol names and descriptions of onboard
components. Note: Board is pictured without Allegro device.
ACS732 AND ACS733 DEMO BOARD AND COMPONENTS
ASEK732-3-UM
MCO-0000744
December 6, 2019
Table 1: Summary of Demo Board Components
Symbol Description
U1 Location of Allegro ACS733 (VCC = 3.3 V) or ACS732 (VCC = 5 V)
U2 3.3 or 5 V Regulator
Jumper Removes regulator and capacitors C1, C2 from VCC; C3 (0.1 µF) still present at device
C1, C2 Regulator output capacitors; removed from the circuit via the jumper
C3 0.1 µF device bypass capacitor; is always connected
R4 Potentiometer to set voltage on VOC pin; VOC voltage sets fault current level
Figure 1: Allegro ACS733 Current Sensor Demo Board

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Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Figure 2: Schematic for ACS732 and ACS733 Demo Board
Table 2: Terminal List Table
Number Name Description
1,2,3,4 IP+ Positive terminals for current being sensed; fused internally.
5,6,7,8 IP– Negative terminals for current being sensed; fused internally.
9,10 GND Device ground terminal.
11 PROGRAM Programming input pin for factory calibration. Connect to ground for
best ESD performance.
12 VIOUT Analog output signal.
13 FAULT Overcurrent Fault output. Open drain.
14 VOC Set the overcurrent fault threshold via external resistor divider on this
pin.
15,16 VCC Device power supply terminal.
Package LA, 16-Pin
SOICW Pinout Diagram
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IP+
IP+
IP+
IP+
IP–
IP–
IP–
IP–
VCC
VCC
VOC
FAULT
VIOUT
PROGRAM
GND
GND
PINOUT DIAGRAM AND TERMINAL LIST

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Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright 2019, Allegro MicroSystems.
The information contained in this document does not constitute any representation, warranty, assurance, guaranty, or inducement by Allegro to the
customer with respect to the subject matter of this document. The information being provided does not guarantee that a process based on this infor-
mation will be reliable, or that Allegro has explored all of the possible failure modes. It is the customer’s responsibility to do sufficient qualification
testing of the final product to ensure that it is reliable and meets all design requirements.
Copies of this document are considered uncontrolled documents.
Revision History
Number Date Description
– December 6, 2019 Initial Release