Altera Arria 10 GX User manual

Altera’s Arria® 10 GX FPGA Development Kit, which comes with a one-year license for the
Quartus® Prime software, provides all that you need to begin developing high-performance
designs.
You can download the kit installer directly from www.altera.com/products/boards_and_kits/dev-kits/altera/kit-a10-gx-fpga.html.
A Complete Development Environment
QUICK START GUIDE: ARRIA 10 GX FPGA
DEVELOPMENT KIT
Introduction
You can use this development kit to:
• Develop and test PCI Express® (PCIe®) 3.0 designs using the PCI-SIG®-compliant development board.
• Develop and test memory subsystems consisting of DDR4, DDR3, QDR IV*, and RLDRAM III memories.
• Develop modular and scalable designs by using the FPGA mezzanine card (FMC) connectors to
interface to a FMC mezzanine card provided by Altera partners and supporting protocols, such as
JESD204B, Hybrid Memory Cube, Bandwidth Engine 2, Serial RapidIO®, 10-Gbps Ethernet (10GbE),
SONET, Common Public Radio Interface (CPRI), OBSAI, and many others.
What’s in the Box
• Hardware
The development kit includes the following
hardware:
- Arria 10 GX FPGA development board
running on Arria 10 GX 10AX115S2F45I1SG
FPGA
- DDR4 SDRAM, DDR3 SDRAM, and
RLDRAM III daughtercards
- Two FMC loopback cards supporting
transceiver, LVDS, and single-ended I/Os
- One quad small-form-factor pluggable
(QSFP) and one SFP+ port
- Two FMC low-pin count (LPC + 15
transceivers) connector
- PCIe x8 edge connector
- Serial digital interface (SDI) channel
- Character LCD
- AC adapter power cables
- Ethernet and USB cables
• Software
Download and install Arria 10 GX FPGA
Development Kit installer to obtain the
following items:
- Design examples
- Board Update Portal design
- Board Test System (BTS) design
- Documentation
- Arria 10 GX FPGA Development Kit User
Guide
- Board design les
- Design software*
- Quartus Prime software (required)
- Nios® II processor (optional)
- MegaCore® intellectual property (IP)
library (optional)
- Mentor Graphics® ModelSim®-Altera
software (optional)
* QDR IV daughtercard is not included with this development kit. Contact Altera to order a QDR IV daughtercard for use
with this development kit.

The Board Update Portal design example included in this development kit facilitates easy development
of software and board ash memory updates, allowing you to:
• Access useful information on www.altera.com, including the page that contains updated software
and design examples.
• Load designs into the ash memory on your board.
The following steps ensure that you have the latest software available on both your computer and your
board. The Board Update Portal design example, which includes a Nios II embedded processor, an
Ethernet media access control (MAC), and a web page, is stored in the “factory”portion of your board’s
ash memory. The source for this design is installed with the development kit software. When your
board is connected to a DHCP-enabled network, the Nios II processor obtains an Internet Protocol (IP)
address and allows you to interface with your board over the network through a web page.
Before you proceed, ensure that you have the following:
• A computer with a connection to a working Ethernet port on a DHCP-enabled network.
• A separate working Ethernet port connected to the same network for your board.
• The Ethernet, power cables, and development board included in your kit.
Step 1. Connect to the Board Update Portal
1. With the board powered down, set the DIP switch SW6.4 to the open position (factory default),
which loads the factory design into ash on power-up.
2. Attach the Ethernet cable from the board to your network hub.
3. Power up the board. The LCD will rst display “Connecting”. The board then connects to your
network server and obtains an Internet Protocol address, which will be displayed on the board’s
Character LCD when it has been assigned.
4. Launch a web browser on a computer that is connected to the same network, and type the Internet
protocol address displayed on the LCD in the address bar. The Board Update Portal web page
appears on your PC.
5. Click on the “Arria 10 GX FPGA Development Kit”link and download the latest version of the
development kit software. The version number noted in the “Downloads”section of the website
corresponds to the version of Quartus Prime software used to create the design examples.
6. Browse through the additional designs that are available. Check this website often for new designs
and for updates to existing designs and documentation. Note that some designs may require
specic versions of the Altera Complete Design Suite to function properly.
7. If necessary, click on the link to the Software Download Center to install the latest Altera software
tools, including Quartus Prime software, Nios II processor, and IP functions.
8. This development kit comes with a one-year, nonrenewable development kit license for the
Quartus Prime Standard Edition software. To get your nonrenewable one-year license, visit
www.altera.com/download/licensing/lic-index.html.
QUICK START GUIDE
Keep Your Board Current with the Board Update Portal

If you cannot connect to the Board Update Portal, go to www.altera.com/products/boards_and_
kits/dev-kits/altera/kit-a10-gx-fpga.html to ensure that you have the latest development kit
software.
Step 2. Install the development kit software
Install the latest development kit software tools from www.altera.com and follow the on-screen
instructions to complete the installation.
Step 3. If necessary, use the Board Update Portal to update your board and load the latest BTS
The Board Update Portal allows you to download new FPGA congurations to the “user” portion of the
board’s ash memory. If your board is up to date, you can skip this step and proceed to Using the BTS
section of this quick start guide.
If you cannot connect to the Board Update Portal, refer to the kit’s user guide for other options to
update the ash memory.
To update the user portion of ash memory on your board, follow these steps:
1. Perform the steps in Step 1 to display the Board Update Portal web page.
2. In the Hardware File Name eld, specify the .ash le (<installation directory>\kits\
arria10GX_10AX115S2F45I1SG_fpga\factory_recovery\build_factory_source\bts_cong.
ash) that you downloaded from the Altera website. Because the design does not have a software
component, leave the Software File Name eld blank.
3. Click Upload.
4. Recongure the FPGA with the new les:
a. Press the PGM_SEL (S5 push button until LED D13, labeled PGM1 illuminates.
b. Press the PGM_CONFIG (S6) push button, to congure the FPGA from the“user_hardware1”
portion of the ash memory.
The BTS design now runs in the FPGA.
The Board Update Portal can also be used to upload your custom designs. The kit’s user guide
describes in detail how to prepare your designs for use with the Board Update Portal.
The BTS interface allows you to verify most of the components on your board. All design les for the
BTS are included in the <installation directory>\ kits\arria10GX_10AX115S2F45I1SG_fpga\
examples\ board_test_system directory.
BTS Interface
When you launch the BoardTestSystem.exe le in that directory, the screen shown in Figure 1
appears. To view each tab, select the design from the Congure menu. Each tab has options for
interfacing to one or more of the board components. The Help menu provides further information
about each test design.
QUICK START GUIDE
Using the BTS

Kit-specic Resources
• Arria 10 GX FPGA Development Kit
www.altera.com/products/boards_and_
kits/dev-kits/altera/kit-a10-gx-fpga.html
• Arria 10 GX devices
www.altera.com/products/fpga/
arria-series/arria-10/overview.html
General Design Resources
• Board Design Resource Center
www.altera.com/technology/signal/
board-design-guidelines/sgl-bdg-index.
html
• Licensing
www.altera.com/download/licensing/
lic-index.html
QUICK START GUIDE
Related Links
• Software Download Center
www.altera.com/download/dnl-index.jsp
• Technical Support Center
www.altera.com/support/spt-index.html
• Development kits
www.altera.com/products/devkits/
kit-index.html
• Embedded processing
www.altera.com/products/processors/
overview.html
• Altera Forum:
www.alteraforum.com
Power Measurement Tool
The power measurement tool, available via the buttons in the upper left of the BTS interface, can be
used to see how any design—including your custom design—aects the FPGA’s power consumption.
Figure 1. BTS Interface
Electromagnetic interference caused by any modification made to the kit contents is the sole responsibility
of the user. This equipment is designated for use only in an industrial research environment.
Without proper anti-static handling, the board can be damaged.Therefore, use anti-static handling
precautions when touching the board.
FCC NOTICE:This kit is designed to allow:
(1) Product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished
product and
(2) Software developers to write software applications for use with the end product.This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful
interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or
part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under FCC
Part 5 of CFR Title 47.
© 2016 Altera. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera and registered in the U.S. Patent and
Trademark Oce and in other countries. All other words and logos identied as trademarks or service marks are the property of their respective holders as described at www.altera.com/legal.
January 2016 L01-44494-01