BHI NEDSP900 User manual

bhi Ltd
Document: HB07-003-10 Issue: B
PO Box 318, Burgess Hill, RH15 9NR England.
Tel: +44 (0)1444 870333
info@bhi-ltd.com, www.bhi-ltd.com
(Picture of a basic assembled unit)
Handbook for
NEDSP900 Development
Board

NEDSP900 Development Board
2
Contents
1.0 Introduction
1.1 Recommendation
1.2 Board Mechanics
1.3 General Specifications
2.0 The inputs
2.1 SK6 Speaker/Headphone/Line Signals
2.2 SK7 Microphone Input Signals
2.2.2 Electret Bias
2.3 Balanced Input Pre=amplifiers
2.4 Signal Input Selection
2.5 Overload Indicators
3.0 Gain Settings
3.1 Setting the gain for SK7 (Microphone input)
4.0 Noise Reduction Settings
5.0 Outputs
5.1 Line Drive
5.2 Headphone/Speaker Output
6.0 Other Facilities on the Board
6.1 Audio Monitor Points
6.2 Noise Reduction Control
6.3 Algorithm ‘Hold’ (SF)
7.0 Connector Specifications
Appendix A –PCB Schematic Diagrams, Component Positions and BOM
Appendix B –Balanced Input Amplifiers
Appendix C –Fitting the board to an enclosure

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1.0 Introduction
The NEDSP900 is a dual channel audio DSP Noise Suppression pcb module for improving the speech
quality in Voice communication systems used in noisy environments. It is capable of handling a wide
range of audio inputs and providing up to 40dB of noise suppression. The module operates on a single
supply rain with on‐board voltage regulation and clock oscillator. It has low power consumption which
makes it suitable for portable applications.
The module has a 26 pin Dual-in-line format with 2mm pin spacing allowing it to ‘plug-in’ to a standard
2mm pitch socket strip.
The NEDSP900 development board was to aid the design-in of the NEDSP900 module. The board allows
various signals to be input to the module and then provides both a Line Out and a Headphone/Small
speaker output to evaluate the processed signal.
Parts of the board have not been populated, but Circuits, Bills of Material (BOM) and information as to
what components fit in these areas are given for the user to add to whatever level they require. This
information can be found throughout this document, but specifically in Section 7.0 and the various
Appendices.
The board has been created such that it can be mounted on standard M3 type pillars for ease of use.
However the format also allows a standard extruded case to be purchased and modified to may this test
board into a robust unit for field testing of the boards’properties.
1.1 Recommendation
We would like to suggest that you just take a few minutes to read through this document first
prior to using the eval board. Some comments have been highlighted in bold,which you should
consider before you connect this device up to your system.
1.2 Board Mechanics
The PCB is approximately 99.5 mm x 159.5 mm and is supplied with M3 x 10mm standoffs as
supports (in 6 positions, see diagram overleaf). These allow components on the underside of the
board to clear the bench. If the PCB is to be fitted into an enclosure, these standoffs may be
used for this purpose or exchanged for shorter ones.
An extruded case can be used to house this board. This provides plenty of room for the board
plus protection for initial system integration when carrying out larger projects. Information
regarding this case and an alternative, if other supplementary circuitry is to be built in, is given
in Appendix C. Drilling patterns for both the front and back covers can also be found in
Appendix C.

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1.3 General Specifications
Operating voltage: 8 to 16v d.c.
Note: While Current and Reverse Polarity protection has been built into the Power circuitry on this
PCB, please check that the power lead is connected with the correct polarisation before applying
power.
Audio Input Acceptance: Input –Stereo (Audio 1 –Plug Tip/ Audio 2 –Plug Ring)
8 Ohms at 2Watts RMS
32 Ohms at 32mW
10K Ohm at 600mV p-p
Balanced Audio Input amplifiers with Phantom Power facility have
been provisioned, but not populated on the PCB (See Appendix B)
Audio Outputs: Headphones/small speakers –0.5 + 0.5 Watts into 8 Ohms
Line Out - Both channels 600 Ohms at up to 0dBV
Connections: Audio Input
Mono Microphone Input
Line Output
Headphone/ Low power Speaker Output
Power 2.1mm Coaxial Power Jack
Various other connections using 0.1” connectors, mainly Molex KK,
have been provisioned for monitoring and control purposes
Switches 4 off 4 Pole DIL Switches have been provided for the purpose of Gain
and Noise Reduction control
Indicators: Power ON
Audio 1 Overload
Audio 2 Overload
Important: Take appropriate Electro-Static precautions before handling the PCB and while
making any additions or changes to the PCB components.
2.0 The Inputs
There are two main input sockets SK6 and SK7 that allow various levels
of signal to be accommodated. Also, there are two balanced audio
input amplifiers with Phantom Power capability. These amplifier
circuits are included on the PCB, but not populated. The circuitry plus
some explanation and the parts list are provided in Appendix B.

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2.1 SK6 Speaker/ Line signals
This socket allows for stereo speakers/headphone signals to be input, matched and attenuated.
The input connection Tip is connected to Channel 1 of the NEDSP900 module, while the first
Ring is connected to Channel 2 of the module. Each channel has attenuation/matching facilities
that can be selected using Jumpers JP 1 through to JP4 as given in the table below:
Low Impedance
Speaker Level
(8 Ohms/3 Watts)
Low Impedance
Headphone Level (33
Ohms/30mW)
High Impedance
Line level (10k
Ohm/ 0.707 v p-p)
Input 1- Ring
JP1 (Not JP3)
JP3 (Not JP1)
None
Input 2 - Tip
JP4 (Not JP2)
JP2 (Not JP4)
None
Below is a picture to assist in the location of the above jumpers.
Above: Jumpers set for Speaker Level Inputs Above: Jumpers set for Headphone Level inputs
Note: For Line levels, the Jumpers are removed altogether.
2.2 SK7 Microphone Input signals
A standard 3.5mm stereo jack socket is provided such that a Condenser Electret or other
microphone may be connected to channel 1 only as this has higher gain settings and an AGC
function that can be used if required.
When using SK7, ensure that JP8 (Mic) is removed
(this ensures no speaker signal is fed to Channel 1).
Speaker level signals will only be taken from the
Ring connection of SK6.
2.2.2 Electret Microphone Bias
Most Electret microphones require some form of
electrical bias. In some this is provide by an

NEDSP900 Development Board
6
internal source, such as batteries. To make sure that you are using the correct
connections always check with the manufacturers’data sheet. The Bias is provided
jumper PL19 this applies a fixed Bias to either the Ring or Tip of the jack plug. Of course
if the microphone requires no bias or has an internal biasing system, then the Jumper
across PL19 can be removed.
If the microphone is supplied with a Stereo 3.5mm jack plug on it, then it’s likely that it
requires Bias on the middle ring of the plug. This is standard for Microphone or Headset
being used with a PC.
For a standard 3 wire PC type microphone place Jumper in
position M (across pins 1 and 2).
If the microphone is supplied with a Mono Jack Plug,
then the Bias is likely to be required on the Tip of the
Jack.
For a two wire type electret insert place the jumper in
position T (across pins 2 and 3).
If the microphone does not require any bias current,
then the jumper PL19 should be removed altogether
Mic Signal - Tip
Mic Bias - Ring
Mic Ground
Mic Signal and Bias
Ground

NEDSP900 Development Board
7
2.3 Balanced input Pre-amplifiers
These can be configured with appropriate gains as required. As mentioned earlier the board is
provided with tracks for these, but they have not been populated. Refer to Appendix B for
further information on the components required for this feature.
2.4 Signal Input selection
There are a variety of ways in which the PCB may be configured for input signals. However, the
section on Gain Settings (section 3) should be read first in order to understand what signals
should be routed to which section of the NEDSP900 module.
Below are some typical signal configurations that may be used.
Channel 1
Channel 2
Comments
Speaker/Headphone/Line
Speaker/Headphone/Line
Dual/Stereo Audio input from Radio or recording
Mono Microphone
Speaker/Headphone/Line
Communication System for Noisy environments
Balance Audio Signal
Speaker/Headphone/Line
Communication System for Noisy environments
Balance Audio Signal
Balance Audio Signal
Dual/ Stereo balance microphones or signals
2.5 Overload Indicators
Each channel has an Overload indicator (Marked OV’RLD on the PCB) these are located next to
the Power Indicator.
The overload LED’s indicate if the
signals being fed into the NEDSP900
are too high for the device input.
These indicators are set to trigger at
signal levels of 1.4v P-P. The device is
able to handle over 2 Volts P-P
signal, but above 1.8 Volts the
signal becomes distorted.
Where the single microphone (SK7)
or the balanced input pre-amplifiers are being used, these indicators while monitoring, will not
be effective as the signal will be much lower and you will be relying on the NEDSP900 internal
gain system to increase the levels.
Setting the input level from SK6 Line through to Speaker Level
When inputting signals to SK6, it’s recommended that you have the NEDSP900 Gains set to 0dB.
You should have Jumpers J1 through to J4 set for the expected signal level and impedance. You
can then adjust the input signal level as appropriate for a good audio output. If the Overload
indicators start to flash, then reducing your input signal or change the jumper settings to a

NEDSP900 Development Board
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higher input setting. If on the other hand you find that you have an insufficient audio level try
increasing the source level or change J1 through to J4 settings for the next lower input level.
When using a Line input make sure that the Jumpers are removed all together.
3.0 NEDSP900 Gain Settings
The NEDSP900 Gain is set using SW2 for Channel 1 and SW3 for Channel 2.
Channel 1 has a gain setting capability of up to 30dB, while Channel 2 has gain settings up to 18dB only.
The reason for this, is that Channel 1 also has the AGC algorithm making use of the full 30 dB gain range
which makes it useful for Microphone operation, especially electret modules without any pre-
amplification. The following is the Gain Settings for this channel:
Channel 2 has no AGC action and is designated as a Speaker or high level audio channel, therefore high
gain settings are not required.
Gain (dB)
SW1 Gain
Bit 1
SW1 Gain
Bit 0 (LSB)
0
OFF
OFF
12
OFF
ON
15
ON
OFF
18
ON
ON
Note: SW1 –Bit 2 (MSB) is the Special Facility control and therefore has no association with the
Channel 2 Gain setting
As a general idea of what to expect from the gain setting on either channel, the following are some
typical input signals/results obtained while trying maintain an output of 600mV P-P at the different
module gain settings. This was a single tone (1 kHz) test the DSP noise reduction was switched OFF.
You can see that the actual gain of the DSP module isn’t actually what was set and therefore a certain
amount of experimentation may be required to achieve the required settings for your application.
Gain (dB)
SW4 Gain Bit 2
(MSB)
SW4 Gain Bit
1
SW4 Gain Bit
0 (LSB)
0
OFF
OFF
OFF
12
OFF
OFF
ON
15
OFF
ON
OFF
18
OFF
ON
ON
21
ON
OFF
OFF
24
ON
OFF
ON
27
ON
ON
OFF
30
ON
ON
ON

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Channel 1
Input (mV P-P)
Gain 1
(Spec. dB)
Gain 1
(Meas. dB)
Channel 2
Input (mV P-P)
Gain 2
(Spec. dB)
Gain 2
(Meas. dB)
2000
0
0
1940
0
0
472
12
12.5
476
12
12.2
348
15
15.2
324
15
15.5
260
18
17.7
248
18
17.8
196
21
20.2
140
25
23.2
112
27
25.0
88
30
27.1
3.1 Setting the Gain for SK7 (Microphone input)
AGC Facility
Selecting the AGC function overrides the Gain setting switches and uses the internal firmware to
select an appropriate gain between 9dB and 31dB, dependent on the microphone signal level.
The AGC operates on voice signal only and therefore only responds to changes in voice level and
not the general audio signal.
Manual Gain setting
A nominal gain setting for an Electret microphone would be about 28dB. This is set by selecting
the gain using switches SW4 –see general section on Gain Settings
4.0 Using the DSP Noise Reduction
The Noise Reduction is individually selectable for each channel. Channel 1 is controlled by SW2
and Channel 2 by SW3.
The Noise Reduction settings are given in the table below with the settings referring to either
SW2 or SW3.
Strength
Setting
Noise
Reduction
(dB)
Switch
1 (On/Off)
Switch
2 (LSB)
Switch
3
Switch
4 (MSB)
Off/Bypass
Off/Bypass
OFF
X
X
X
1
8
ON
OFF
OFF
OFF
2
12
ON
ON
OFF
OFF
3
16
ON
OFF
ON
OFF
4
20
ON
ON
ON
OFF
5
25
ON
OFF
OFF
ON
6
30
ON
ON
OFF
ON
7
35
ON
OFF
ON
ON
8
40
ON
ON
ON
ON

NEDSP900 Development Board
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When experimenting with the Noise Reduction levels, start with the lowest level and then increase the
‘Strength’ until you find a satisfactory level which is providing the necessary Noise Reduction without
making the audio distorted or ‘watery’ where the audio artefacts sound like dripping water. This has a
lot to do with the type of noise you are trying to combat as much the level of Noise Reduction.
Once you have found a suitable Noise Reduction level, note the value for future reference.
You can get a feel for how much clearer the Noise Reduction is making the signal by switching the DSP
OFF and then back ON again.
Note: the DSP algorithm may take a short while to take full effect, approximately 500 mS, dependent
on the noise content of the signal.
While playing with the Noise Reduction you may find that you have to increase the appropriate Output
Level control as the effect of the Noise Reduction is to reduce the mean audio level so that everything
sounds quieter. This is mainly because the noisy parts of the signal are being removed to improve the
overall speech quality of the signal.
5.0 Outputs
There are two outputs available. One is provided to allow recording of results or for onward audio
processing. The other is capable of driving a small speaker system or headphones. Each output is
independently adjustable via the two edge mounted controls.
Users should be aware that as these are wired for Stereo Output. Monaural jack plugs should not be
used as this could cause damage to the circuitry. If a mono output is required it is recommended that
stereo jack plug is used with just the required channel wired. If in doubt, consult bhi Ltd.
5.1 Line Drive
This is capable of driving up to 1 Volt P-P into a 600 Ohm (resistive) load and can drive as high as
2Volts p-p into higher impedances. The gain of this output stage is fixed and the signal level is set by
potentiometer R1 a & b located adjacent to SK3 which is the output socket.
SK3 –Line Output
SK3 –Line Output
Level Control
SK10 –Headphone/
Speaker Output
R1a&b –Headphone
/Speaker Level Control

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5.2 Headphone/ Speaker output
This is provided using a TDA2822 low power amplifier. This is ideal for headset listening and small
speakers only. It can drive into loads as low as 4 Ohms. The Audio level is set by RV65 a & b, located
adjacent to SK10 which is the output socket.
6.0 Other facilities on the Board
To allow for monitoring of both input and output audio signals as well as allowing for external control of
the NEDSP900 module from signals ‘off the PCB’ provision has been made for additional connectors,
some of them already fitted and their use is easily identifiable from the Circuit Diagrams (see Appendix
A).
6.1 Audio Monitor Points
A set of audio Monitor points has been provided for the user to ‘hook’ into the audio
signals before and after the DSP module allowing for monitoring, signal injection and
signal extraction from the Module.
These connections all use Molex KK connector series (see Connector Specifications –
section 7.0). Their Pin outs are as follows:
Pin 1 = Channel 1, Pin 2 = Ground, Pin 3 = Channel 2
PL18 is the NEDSP900 Input Audio Monitor. Do not load these pins with impedances of
less than 100kOhm
PL6 is the NEDSP900 Output Audio Monitor. Do not load these pins with impedances of
less than 100kOhm
PL7 is the NEDSP900 Buffered Audio Monitor. Do not load these pins with impedances
of less than 10kOhm

NEDSP900 Development Board
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6.2 Noise Reduction Control
This is allows the user access to the Noise Reduction control lines of the NEDSP900
module. PL3 has not been fitted. This is a standard 0.1” (2.54mm) Pitch connector and
suggestions for this have been made in section.
The Pin connection and designation is given here:
Pin
Signal
Comments
1
Channel 2 –Suppression ON/OFF
Weak Pull-up –Pull Down to Activate
2
Channel 2 –Suppression LSB (NS0)
Weak Pull-up –Pull Down to Activate
3
Channel 2 –Suppression (NS1)
Weak Pull-up –Pull Down to Activate
4
Channel 2 –Suppression MSB (NS2)
Weak Pull-up –Pull Down to Activate
5
Channel 1 –Suppression ON/OFF
Weak Pull-up –Pull Down to Activate
6
Channel 1 –Suppression LSB (NS0)
Weak Pull-up –Pull Down to Activate
7
Channel 1 –Suppression (NS1)
Weak Pull-up –Pull Down to Activate
8
Channel 1 –Suppression MSB (NS2)
Weak Pull-up –Pull Down to Activate
9
Gnd
10
+5v
You will note from the previous page, that the switches are ON to get the appropriate
line to activate. The NEDSP900 provides a weak pull up to its internal power rail of
1.8Volts, therefore when the switch is activated the appropriate pin is taken to ground.
The logic is therefore inverted. The fact that the ‘weak’ pull-up is to the devices’ 1.8v
internal logic means that caution should be used when attempting to interface with
other logic systems operating at 3.3v or 5v.
The following are a few suggestions as to the possible methods of implementation
Logic control
There are several ways in which the module may be controlled by external logic or
microprocessor. The various alternatives are shown and described below:

NEDSP900 Development Board
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To NEDSP control Pin
From 3.3v /5v control System
From 3.3v /5v control System To NEDSP control Pin
a) Transistor (Logic Inversion) Interface 3.3v or 5.5v
c) Resistor Divider Circuit (see values table) d) Diode Pull Down Circuit
From 3.3v /5v control System To NEDSP control Pin
To NEDSP control Pin
From 3.3v /5v control System
b) Digital Transistor (Logic Inversion) Interface 3.3v or 5.5v
Circuit a) –This provides a good level conversion interface and has a logic Inversion
function, thus a positive logic from the external system will use the transistor as a switch
that will pull the NEDSP900 control line down.
Circuit b) –There are many types of what are termed Digital Transistors. These are no
more than Circuit a) packaged together in a small surface mount pack. They come in a
variety of input and Base to Emitter resistor values. Again these will perform a logical
inversion.
Circuit c) –This is the simplest circuit and just provides a simple voltage divider action.
Bearing in mind that the NEDSP900 input pins have a maximum of 1.8v voltage limit,
you have to be careful with this. The resistors R3 and R4 need to be changed dependent
on the control logic voltage being used (3.3v or 5v).
There is no logic inversion with this circuit.
Circuit d) - This lets the external control logic pull the NEDSP900 logic down only and
the diode becomes back biased when the external logic goes high, leaving the
NEDSP900 logic to pull up itself. R6 provides a pull down function to give the Diode
something to work against. A value of 100 k Ohms of above is sufficient not to have an
Processor supply
R4 Ohms
R3 Ohms
3.3v
1K
820R
5v
1K
1.8K

NEDSP900 Development Board
14
effect on the weak pull up resistance of the NEDSP900. Again there is no logic inversion
with this circuit.
6.3 Algorithm ‘Hold’ (SF)
This is a special facility (SF) that may be useful where this module is incorporated in certain
intercom systems (half duplex). As it will be noted from earlier comments in the Noise
Reduction section of this document, the DSP algorithm takes a few milliseconds to act on the
audio dependent on the noise content. Where the audio content fed into the Module is a
‘clean’ audio signal, the Noise Reduction algorithm reduces its effectiveness. In certain intercom
configurations where there may be bursts of ‘clean’ audio this can lead to problems and small
periods of noisy audio may be heard while the algorithm starts to pick up on the noise content
again.
The Algorithm ‘Hold’ line is marked as S.F. on the module and when activated ‘holds’ the Noise
Reduction algorithm in its last state. When De-activated, the algorithm continues where it left
off and effectively reduces or removes periods whereby there may be some Noise content
allowed through.
The Algorithm Hold pin is not bought out as an ‘off-board’ function of PL3, but is available as the
MSB of the Audio 2 Gain switch SW1. So placing this switch in the ON position will ‘Hold’ the
algorithm on both audio channels.

NEDSP900 Development Board
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7.0 Connector specifications
The board has the following connections to facilitate power, signal and control connections. The
information is given here such that the user can obtain the correct connectors to interface with these or
fit to the PCB
Connection
Connector
Number
Detail
Comments
DC
PL20
Standard 2.1mm diameter DC
Jack
Centre = +ve DC and
Outside = Ground
Speaker/Headphone
Input
SK6
3.5mm Stereo Jack Socket
Tip = Channel 1, Ring =
Channel 2 and Base =
Ground
Mic Only Input
SK7
3.5mm Stereo Jack Socket
Tip = Mic Audio, Ring = Bias
and Base = Ground
Balanced Microphone
Inputs
PL12/PL13
Any 0.1” standard Wire to
PCB connector –3 Way.
Molex KK or similar
Not Fitted, see Appendix A
Balanced Microphone
Phantom Power
PL10/PL11
Any 0.1” standard Wire to
PCB connector –2 Way.
Molex KK or similar
Not fitted, See Appendix A
Pre/Post DSP audio
signal monitor points
PL6/ PL10
Molex 01” KK series – 3 Way
connector
Pin 1 = Channel 1, Pin 2 =
Ground and Pin 3 = Channel
2
Buffered DSP audio
signal monitor
PL7
Molex 01” KK series – 3 Way
connector
Pin 1 = Channel 1, Pin 2 =
Ground and Pin 3 = Channel
2
Line Out
SK3
3.5mm Stereo Jack Socket
Tip = Channel 1, Ring =
Channel 2 and Base =
Ground
Speaker/Headphone
Out
SK10
3.5mm Stereo Jack Socket
Tip = Channel 1, Ring =
Channel 2 and Base =
Ground
Control Signals
PL3
Any 0.1” standard single in-
line connector –10 Way.
Molex KK or similar.
Not Fitted, see appendix B

NEDSP900 Development Board
16
Appendix A - PCB Documentation and BOM
Board Topside Layout
Board Bottom side Layout
Power Input
on this end

NEDSP900 Development Board
17
Schematic Diagram Sheet 1 of 5 –Output Buffer and Line Driver

NEDSP900 Development Board
18
Schematic Diagram Sheet 2 of 5 –NEDSP900 and Control Switches

NEDSP900 Development Board
19
Schematic Diagram Sheet 3 of 5 –Balanced Audio Inputs (See also Appendix B)

NEDSP900 Development Board
20
Schematic Diagram Sheet 4 of 5 –Speaker and Microphone Input Interface with Overload Indicator
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