Casio SF-7900E Troubleshooting guide

SF-7900E(LX-552A)
SF-8900(LX-552I/J)
R
(with price)
(without price)
SF-7900E
JAN. 1995

CONTENTS
SPECIFICATIONS ................................................................................................................ 1
TO REPLACE THE BATTERY ............................................................................................. 2
TO CHECK THE MEMORY CAPACITY............................................................................... 2
ERROR MESSAGE............................................................................................................... 3
TO RESET THE SF UNIT'S MEMORY................................................................................. 4
TO SAVE THE DATA TO ANOTHER UNIT ......................................................................... 5
BLOCK DIAGRAM................................................................................................................ 8
CIRCUIT EXPLANATIONS
System chart................................................................................................................. 9
Power supply circuit .................................................................................................. 10
CPU pin description (HD62076C03).......................................................................... 12
Gate array pin descriptions (SSC2571F0A) ............................................................. 13
Gate array pin descriptions (SSC2571F0B) ............................................................. 14
Operation program ROM pin descriptions .............................................................. 15
RAM pin descriptions ................................................................................................ 15
DIAGNOSTIC OPERATION................................................................................................ 16
TROUBLESHOOTING........................................................................................................ 21
SCHEMATIC DIAGRAM
Main PCB .................................................................................................................... 23
Display PCB................................................................................................................ 25
Key Matrix ................................................................................................................... 26
Key Matrix (Display side)........................................................................................... 27
PARTS LIST........................................................................................................................ 29
ASSEMBLY VIEW .............................................................................................................. 31

— 1 —
SPECIFICATIONS
Main modes: Telephone Directory, Business Card Library, Memo, Schedule Keeper,
Expense, Reminder, Calendar, Home Time, World Time and Calculator
Data storage: Storage and recall of telephone, business card, memo, schedule, expense,
reminder data, calendar display, secret area; editing; memory status display
Clock: World Time; reminder alarm; schedule alarm; daily alarm; accuracy under
normal temperatures: ±3 seconds average
Calculation: 12-digit arithmetic calculations; arithemetic constants (+, –, ×, ÷); independ-
entmemory;percentages;squareroots;24-digitapproximations;datecalcula-
tions; other mixed calculations
General:
Display element: 16-column ×8-line LCD
Memory capacity: SF-7900E: 128KB (103436 bytes)
SF-8900: 256KB (234508 bytes)
Main component: LSI
Power supply: 3 lithium batteries (CR2032)
Power consumption: 0.07 W
Battery life*: Approximately 170 hours continuous operation in Telephone Directory;
approximately 130 hours repeating one minute of input and 10 minutes of
display in Telephone Directory; approximately 12 months for memory back
up
* The batteries that come installed in this unit when you purchase it are for
factory test purposes, so they will probably not provide normal service life.
Auto power off: Approximately 6 minutes after last key operation
Operating temperature: 0°C ~ 40°C (32°F ~ 104°F)
Dimensions: Unfolded: 9.55H ×144W ×155D mm (3/8"H ×5 11/16"W ×6 1/8"D)
Folded: 15.95H ×144W ×77.5D mm(5/8"H ×5 11/16"W ×3 1/16"D)
Weight: 123g (4.3 oz.)
• Design and specifications are subject to change without notice.
Current consumption:
Power switch TYP. [µA] MAX [µA]
OFF 11.7 37.1
ON 1,670.0 13,711.0
ON (Operating) 4,520.0 16,645.0

— 2 —
Hold down
CAPA
to display a screen that shows the current memory status. To clear the memory
status display, release
CAPA
.
TO CHECK THE MEMORY CAPACITY
Remaining memory
capacity
Total number of characters stored in memory
TO REPLACE THE BATTERY
To replace the batteries
1. Loosen the screw on the back of the SF unit that holds the battery compartment cover in
place, and remove the cover.
Caution
In the next step, be sure to remove only one battery at a time.
Otherwise, you will lose all data stored in memory.
2. Loosen the screw that secures one of the three battery holders
in place and remove the battery holder.
3. Replace the old battery with a new one, making sure that the
positive (+) side of the new battery is facing up (so you can see
it).
4. Replace the battery holder and secure it by tightening its screw.
Screw
RESET
+
10050
0
C
A
P
A
C
I
T
Y
76420BytesFREE
27016BytesUSED
26
%

— 3 —
Message Meaning Action
DATA ITEM Search operation Current search operation
NOT FOUND! attempted when no data cannot be performed.
NO DATA is stored in memory.
IN MEMORY!
DATA ITEM Data specified in search Change specification or
NOT FOUND! operation does not exist cancel search.
in memory.
MEMORY FULL! No more room in memory Delete unnecessary data
for storage of data. items from memory.
ALARM TIME Attempt to set a Schedule Set a different alarm time
ALREADY USED! Keeper alarm time that or change the existing alarm
is already used for time to another one.
another entry.
ALARM TIME Attempt to set a Schedule Set a different alarm time
ALREADY PASSED! Keeper alarm time for a (for a future time/date.)
time/date that is already
passed.
SECRET DATA! Alarm for a secret Enter the secret memory
memory area data item is area to view details of the
sounding. alarm.
PASSWORD Attempt to enter the Use the correct password.
MISMATCH! secret memory area
using a password that
does not match the one
preset for the secret area.
TRANSMIT ERROR! Error during data Cancel the data
communications. communications
STOPPED! operation and try again.
DATA ERROR! Data corrupted by strong See page 11 of the
CONSULT THE impact, electrostatic owner's manual.
OWNER'S MANUAL! charge, etc.
SAME TYPE Attempt to store a label Use a different label.
ALREADY USED! that is identical to one
already stored.
ERROR MESSAGE

— 4 —
TO RESET THE SF UNIT'S MEMORY
The following procedure erases all data stored in the memory of the SF unit.
Perform the following operation only when you want to delete all data and initialize the settings of the SF
unit.
Remember – you should always keep copies of important data by writing it down, by transferring it to a
personal computer or other SF unit.
To reset the SF Unit's memory
1. Switch on power and press the RESET button with a thin, pointed object.
Warning!
The next step deletes all data stored in the SF unit's memory. Make sure that you really want
to delete the data before you continue!
2. Press Yto reset the memory and delete all data or Nto abort the reset operation without
deleting anything.
Following the reset operation described above, the Home Time display appears and the SF unit
settings are initialized as noted below.
Home Time: 12-hour format
JAN/1/1995
AM/12:00 00
World Time: Washington D.C.
Daily Alarm: 12:00 PM
Sound: Schedule alarm →ON
Reminder alarm →ON
Daily alarm →OFF
Key →ON
Character input: CAPS
RESET
RESET button

— 5 —
2) Turn on the power switch of both units.
3) The slave unit must be set the date of Feb. 3rd, 1901 into the memory under the calculator
mode.
Operation: 1 DATE 2 DATE 3 DATE M+
If you don't set the date, the "PASSWORD" isn't transferred to the slave unit.
TO SAVE THE DATA TO ANOTHER UNIT
SF-7900 can transfer customers data to another SF-7900 with memory protection only when replacing
the LCD or the outer case.
How to transfer the data
* Before connecting the cable (SB-60 or SB-62), be sure to reset the slave unit to clear all
data.
1) Turn off the power switch and connect the two units using the cable (SB-60 or SB-62) as shown in
the drawing.
To change the hardware
parameters, press the
, , and
cursol keys.
4) Check the hardware parameters, and if the units have another condition, reset as follows.
TEL
To set the hardware
parameters, press the SET
key.
SET UP
PARITY NONE
BIT LENGTH 7
BPS 9600
ON CAL
CLEAR
FUNC 4 4

— 6 —
5) Set up the slave unit.
1 While in the Calendar Display, Telephone Directory, Business Card Library, Memo Mode, or
Schedule Keeper, press the FUNCTION key followed by 4 to select " DATA COMM", and
the following menu appears.
2 Press 2 to select "RECEIVE" and the following display appears to indicate that the slave unit
is ready to receive data.
6) Set up the customer's unit.
1 While the transmitting unit is in the Calendar Display, Telephone Directory, Business Card
Library, Memo Mode, or Schedule Keeper, press the FUNCTION key followed by 4 to
select "DATA COMM", and the following menu appears.
2 Press 1 to select "SEND" and the following menu appears.
1 SEND
2 RECEIVE
3 PRINT
4 SET UP
DATA
RECEIVE OK
TO STOP
PRESS [ESC]
FUNCTION 4
TEL
2
TEL FUNCTION 4
1
SEND
1 ONE ITEM
2 MODE DATA
3 ALL DATA
1 SEND
2 RECEIVE
3 PRINT
4 SET UP

— 7 —
3 Press 3 to select "ALL DATA". The following display appears to confirm if you wish to
proceed.
4 Press the SET key to proceed with the data transmission, or press ESC if you wish to
cancel.
TEL MEMO REMINDER
HOME/WORLDSCHEDULE
Data are transmitted in the sequence of Telephone Directory data, Memo data, Reminder data,
Schedule Keeper data and Calendar data.
* The following messages appear on the display of the receiving unit when a problem occurs during
data communications. All data transferred up to display of the message is retained in memory, but
data communication is terminated.
If one of the following error messages appear, press the , , , , ,
, keys, to clear the error message. Then, take corrective action and try data
communication again.
CAL CALENDAR
Message Meaning Action
TRANSMIT ERROR! Error during data Cancel the data
STOPPED! communications. communications operation
and try again.
DATA ERROR! Data corrupted by strong See page 9 of the owner's
CONSULT THE impact, electrostatic manual.
OWNER'S MANUAL! charge, etc.
SEND ALL
DATA ITEM ?
SET / ESC
NOW SENDING !
TO STOP, PRESS ESC
3
SET

— 8 —
LOCK (ON)
C0~C63
CPU
GATE ARRAY
Power supply circuit
LCD DRIVE
VOLTAGES
DATA BUS
S16~S95S0~S15
LCD 96 × 64 dots
INTERFACE FOR
DATA TRANSMISSION
& DATA RECEPTION
OPEN (OFF)
MSM6585AV
-Z-358B
LCD DRIVERLCD DRIVER
MSM6585AV
-Z-358B
MAIN SWITCH
BLOCK DIAGRAM
CD760-TS
VDD
GND
SSC2571
LSI2
HD62076C03
LSI1
PCB-L589-E4
TO KEYBOARD
KEYBOARD
RAM
MSM51008AFP-10LL
LSI3, LSI4
ROM
(Operation Program)
LSI5
V1 ~ V5 PCB-L522-1(SF-7900E)
or
PCB-L552-1(SF-8900)
PCB-L589-E2
SF-7900E: RAM ×1
SF-8900: RAM ×2

— 9 —
VIN
VSS
KAC KIO
ADDRESS BUS
2 MHz
VDD1
ON
MAIN SWITCH
SW
GND
VDD
(Pin53)
(Pin54)
(Pin41)
VDD
"H"
"H"
ADDRESS
DATA
VDD
"L"
OSCOOSCI (Pin70)
INT0
V2ON
Gate array
DATA BUS
(Pin40)(Pin45)
(Pin36)
"L"
(Pin24)
System chart
The circuitry operates in the following order:
1. Supply 5V to VDD1 and VDD2.
2. Output "L" from SWO terminal.
3. Output "L" from IC4 and Q5 terminal.
4. Main switch ON.
5. Input "L" to SW terminal.
6. Input "L" from KAC terminal.
7. Push power on button switch.
8. CPU oscillation is generated.
9. Output "H" from V2ON terminal.
10. Output "L" from VOB terminal.
OFF
CIRCUIT EXPLANATIONS
CPU
HD62076C03
PDN
"L"
SWO
"L"
2
3
54
6
7
(Operation program)
ROM
VOB
OEO
(Pin62)
(Pin35)
"L"
12
(Pin58)
(Pin28)
MSO (Pin49)
"L"
13
14
15
(Pin24) (Pin22)
Power supply
circuit
V1~V5
for LCD
IC4
1VDD
Low battery
detector
98
11. Output all LCD drive voltages.
12. Gate array sends ROM output enable
signal to OE terminal.
13. Gate array sends ROM Chip enable
signal to CE terminal.
14. CPU sends address to ROM.
15. CPU receives data from ROM.
CEOE GND
11
10

— 10 —
Power supply circuit
1) Power supply circuit for CPU, GATE ARRAY and RAMs.
When the main batteries are set, the voltage (9V) is applied to the terminal VDD1 of CPU (LSI1), GATE
ARRAY (LSI2) and RAM (LSI4).
When IC2 receives the voltage, it provides 4V to the GND lines from the terminal OUT (Pin No.1).
2) Main switch
The CPU (LSI1) detects the informations of the Main switch by the terminal SW (Pin No.36) from the
SWO signal of the GATE ARRAY (LSI2).
3) How to turn the display ON.
When pressing "ON" key under the ON side of the Main switch , the CPU (LSI1) generates the signal
to turn the display ON on the terminal V2ON (Pin No.45).
This signal goes to the terminal VIN (Pin No.24) of the GATE ARRAY (LSI2), then the GATE ARRAY
(LSI2) generates "L" level on the terminal VOB (Pin No.28). When the transistor 2SA1179 (Q2) re-
ceives "L" level, the transistor 2SC2812 (Q1) will be also turned ON. Then LCD drive voltage V1~V4
will be applied.
4) How to detect the voltage for the main batteries.
When the voltage of the VDD lines becomes +6.6V±0.18V, the terminal OUT (Pin No.1) of the detector
RH5V60BA (IC4) becomes "L" level, then this signal goes to the terminal INTO (Pin No.70) of the CPU
(LSI1) and the terminal PDN (Pin No.35) of the GATE ARRAY (LSI2).
The CPU detects the low battery condition, then the display turns OFF.

— 11 —
OFF
ON SWO
SW
CPU
MAIN SWITCH
VDD
"L"
"L"
KAC KIO
(Pin36)
(Pin62)
(Pin54) (Pin53)
5) Main switch and power on switch
When the main switch is set to on position, SW terminal of CPU receives "L", then KAC terminal will be
"L" to enable the system power on. The KI0 terminal is "H" when VDD is applied to CPU. Therefore,
when pressing the power on switch, CPU will generate a clock pulse (2 MHz) at OSCO terminal for
start up the system.
When the PDN terminal will be receiving "L" level, GATE ARRAY will send "L" signal from KON termi-
nal for cutting the line of power on switch.
HD62076C03
from IC4
(Pin35)
VOB
VIN
"L"
V2ON
CPU
GND
(Pin45) (Pin24)
(Pin28) (Pin31)
When the system is start up, CPU will send "H" signal to VIN terminal of gate array from V2ON termi-
nal. Then, gate array will send "L" signal from VOB terminal to turn ON the transistors Q2 and Q1 for
LCD drive voltages.
HD62076C03
"H"
GATE ARRAY
(Pin2)
(Pin1)
R3
R2
VR1
VDD
C20 V1~V4
(Pin3)
6) Power supply for LCD
PDN
GATE ARRAY
KON
(Pin26)
(Pin3)
"L" "H"
POWER ON SWITCH
4S66F
OSCO
OSCI 2 MHz

— 12 —
Pin No. Name In/Out Status Status Description
of OFF of ON
1~14,16,17 A0~A15 Out L Pulse Address Bus line
15,39, 100 VSS In GND GND GND terminal
24 WE Out H Pulse Write signal
25 OE Out H Pulse Read signal
26 FE Out H Pulse Chip select signal for Gate array
27 CS1 Out H H Chip select signal
28 CS2 Out H H Chip select signal
29 CS3 Out H Pulse Chip select signal
30 E0 Out L Pulse Chip enable signal (Not used)
31 E1 Out L H Chip enable signal (Not used)
32 E2 Out L H Chip enable signal (Not used)
33 E3 Out L H Chip enable signal (Not used)
34 BCON Out H H BCN signal (Not used)
35 MDP2 Out H L MDP signal (Not used)
36 SW In L L Switch signal (When switches are at ON position)
37 ONMK In H H Battery detection
38 TEST In L L TEST terminal (connect to GND)
40,41 OSC O/I In L Pulse Clock input
42 VDSC In L H Power input for Clock
43, 91 VDD1 In H H VDD input terminal
44 VDD2 In H H VDD input terminal
45 V2ON Out L H Power on output signal
46~53 KI7~KI0 In H H Key input signal
54 KAC Out L Pulse Power on switch signal output
55~65,67 KC0~KC11 Out H Pulse Key common signal output
66 GND In L L GND terminal
68 INT2 In H H Interrupt signal from Gate array
69 INT1 In L H Interrupt signal for transmission
70 INT0 In H H Interrupt signal for Power down
71 BRK In H H VDD input terminal
72 P0 Out H H Transmission data output
73 P1 In L H Reception data input
74 P2 In H H Card lock switch input (Not used)
75 P3 In L H IC card detection signal input (Not used)
76 P4 Out H Pulse Not used
77 P5 Out H Pulse Not used
78 P6 In H H Memory back-up battery detection input (Not used)
79 P7 In H H Battery detection input (Not used)
80 H1 Out H H Not used
81 WENL In L L GND terminal
82 H2 Out H H Not used
83 L1 Out L H Not used
84 L2 Out L L Not used
85 DT Out H Pulse DT signal output
86 PRO Out L H LCD driver mode selection signal
87 FR Out L Pulse LCD driver synchronous signal
88 LP Out H Pulse LCD driver latch pulse signal
89 GC Out H Pulse GC signal output
90 DE Out H Pulse LCD driver data latch clock signal
92~99 IO7~IO0 In/Out L Pulse Data bus line
18~23 RA14~19 Out L Pulse Address line (Not used)
CPU pin description (HD62076C03)

— 13 —
Pin No. Name In/Out Description
1 VSS1 In GND terminal
2 OSO Out Clock out
3 OSI In Clock in
4 VL1 In 6V input
5~10 A0~3,A14,15 In Address input
11 FE In Chip select signal from CPU
12 CS1 In Chip select signal from CPU
13 CS2 In Chip select signal from CPU
14 CS3 In Chip select signal from CPU
15 OEI In Output enable signal from CPU
16 VSS(GND) In GND terminal
17 VH1(VCC) In 9V input
18 TXI In Transmission data input from CPU
19 WEI In Write enable signal from CPU
20 GC In GC signal from CPU
21 IO0 In/Out Data bus lin
e
22 DT In DT signal input
23 IO1 In/Out Data bus lin
e
24 VIN In Power ON signal from CPU (V2ON)
25 IO2 In/Out Data bus lin
e
26 KON Out Switch control signal
27 IO3 In/Out Data bus lin
e
28 VOB Out Inverted signal for VIN
29 IO4 In/Out Data bus lin
e
30 INT Out Interrupt signal
31 VH2(VCC) In 9V input
32 VL2(VLL) In 6V input
33 VSS(GND) In GND terminal
34 BBC Out Not used
35 PDN In Power down detection input
36 IO5 In/Out Data bus lin
e
37 RLD Out Not used
38 RA15 Out Address bus output
39 IO6 In/Out Data bus lin
e
40 RA16 Out Inverted signal for VIN
41 IO7 In/Out Data bus lin
e
42 RA17 Out Address bus output
43 RA18 Out Address bus output
44 MS3 Out Not used
45 RA19 Out Not used
46 RA20 Out Not used
47 R15 Out Address bus
48 VSS(GND) In GND terminal
49 VH3(VCC) In 9V input
50 VDD1(VLL) In 6V input
51 R16 Out Address bus
52 R17 Out Address bus
53 MSO Out Chip enable signal for ROM
54 MS4 Out Chip select signal for RAM (Not used)
55 MS1 Out Not used
56 MS5 Out Not used
Gate array pin descriptions (SSC2571F0A): Used in SF-7900E

— 14 —
Pin No. Name In/Out Description
57 MS2 Out Not used
58 OEO Out Output enable for ROM
59 BZ1 Out Buzzer signal
60 OTP In Connected to GND
61 BZ2 Out Buzzer signal
62 SWO Out Main switch control signal
63 VH4(VCC) In 9V input
64 TXO Out Transmission data output terminal
Pin No. Name In/Out Description
1 VSS1 In GND terminal
2 OSO Out Clock out
3 OSI In Clock in
4 VL1 In 6V input
5~10 A0~3,A14,15 In Address input
11 FE In Chip select signal from CPU
12 CS1 In Chip select signal from CPU
13 CS2 In Chip select signal from CPU
14 CS3 In Chip select signal from CPU
15 OEI In Output enable signal from CPU
16 VSS(GND) In GND terminal
17 VH1(VCC) In 9V input
18 TXI In Transmission data input from CPU
19 WEI In Write enable signal from CPU
20 GC In GC signal from CPU
21 IO0 In/Out Data bus lin
e
22 DT In DT signal input
23 IO1 In/Out Data bus lin
e
24 VIN In Power ON signal from CPU (V2ON)
25 IO2 In/Out Data bus lin
e
26 KON Out Switch control signal
27 IO3 In/Out Data bus lin
e
28 VOB Out Inverted signal for VIN
29 IO4 In/Out Data bus lin
e
30 INT Out Interrupt signal
31 VH2(VCC) In 9V input
32 VL2(VLL) In 6V input
33 VSS(GND) In GND terminal
34 BBC Out Not used
35 PDN In Power down detection input
36 IO5 In/Out Data bus lin
e
37 LRAM Out Connected to 9V
38 CM32 Out Connected to GND
39 IO6 In/Out Data bus lin
e
40 RA16 Out Inverted signal for VIN
41 IO7 In/Out Data bus lin
e
42 RA17 Out Address bus output
43 RA18 Out Address bus output
44 MS3 Out Not used
45 RA19 Out Not used
Gate array pin descriptions (SSC2571F0B): Used in SF-8900

— 15 —
Pin No. Name In/Out Description
46 RA20 Out Not used
47 R15 Out Address bus
48 VSS(GND) In GND terminal
49 VH3(VCC) In 9V input
50 VL3 In 6V input
51 CAC Out Address bus
52 MS7 Out Address bus
53 MSO Out Chip enable signal for ROM (Not used)
54 MS4 Out Chip select signal for RAM (Not used)
55 MS1 Out Chip select signal
56 MS5 Out Not used
57 MS2 Out Not used
58 MS6 Out Chip select signal
59 BZ1 Out Buzzer signal
60 OTP In Connected to GND
61 BZ2 Out Buzzer signal
62 SWO Out Main switch control signal
63 VH4(VCC) In 9V input
64 TXO Out Transmission data output terminal
Operation program ROM pin descriptions
RAM pin descriptions
Pin No. Name In/Out Status Status Description
of OFF of ON
3~12, 23 A0~A15 In L Pulse Address bus line (A0~A15)
25~28, 31
13~15, 17~21 IO0~IO7 Out L Pulse Data bus line (IO0~IO7)
16 GND In L L GND terminal
22 S1 In H Pulse Chip enable signal from Gate array
24 OE In L Pulse Output enable signal from Gate array
29 W In H Pulse Write enable signal from CPU
32 VCC In L H VDD terminal
Pin No. Name In/Out Status Status Description
of OFF of ON
2~12,23, A0~A17 In L Pulse Address bus line (A0~A14, RA15~RA17)
25~30
13~15, 17~21 O0~O7 Out L Pulse Data bus line (IO0~IO7)
16 GND In L L GND terminal
22 CE In H Pulse Chip enable signal from Gate array
24 OE In L Pulse Output enable signal from Gate array
31 A18 In L Pulse Address line (RA18)
1,32 VPP, VCC In L H VDD terminal

— 16 —
DIAGNOSTIC OPERATION
2. Display check
MENU DISPLAY
1 : LCD ALIGNING
2 : ALL DOTS ON
3 : ALTERNATIVE
4 : REVERSE
5 : LCD FRAMING
CASIO 1993. 11. 09
1. Diagnostic mode
The diagnostic mode appears when main switch is turned on
while there is a short in the checkpad. After this operation,
the machine will beep and display "SELF-TEST".
The menu appears after pressing SET key. Tests are con-
ducted by selecting the mode from the list on screen. The
each test can be selected by numeral keys.
SELF TEST PROG.
PRESS SET
QUIT BY OFF
CASIO 1993. 11. 09
MENU TOP SHEET
1 : DISP CHECK
2 : RAM TEST
3 : MEMORY TEST
4 : KEY / BUZZER
5 : INTERFACE
CASIO 1993. 11. 09
Check pad
Main switch
DISPLAY TEST : LCD display check
RAM TEST : RAM chip check
MEMORY TEST : ROM/Clock check
KEY/BUZZER : Keys and Buzzer check
INTERFACE : Transmission check
To return to the menu display, press DISP CHNG button .
LCD ALIGNING: Lights on dot at corners
ALL DOTS ON : Lights on in all dots (black screen)
ALTERNATIVE : Checker display
REVERSE : Reverse checker display
LCD FRAMING: Lights on dot along the screen edge (frame)

— 17 —
3. RAM check
DISP CHNG key :Return to menu
DATA WRITE : Write the set pattern to the RAM area
DATA READ : Compare the pattern displayed after # with
the write data of RAM and displays the
results.
PAT. CHANGE : Change the test data pattern.
#1---Test data pattern(00,01,02...)
#2---Test data pattern(FF,FE,FD....)
MENU RAM #1
1 : DATE WRITE
2 : DATA READ
3 : PAT. CHANGE
4 :
5 :
CASIO 1993. 11. 09
The unit will beep after a second.
The menu will be appeared.
1) RAM write
RAM WRITING #1
NOW EXECUTING!
CASIO 1993. 11. 09
2) RAM read
Error end display is;
Normal end display is;
It means RAM write is succeeded.
RAM COMPARE #1
COMPLETE!
CASIO 1993. 11. 09
To escape from this message, press DISP CHNG
key.
RAM COMPARE #1
DATA ERROR!
ADDRESS CORR RAM
XXXX XX XX
CASIO 1993. 11. 09

— 18 —
4. ROM/Clock check
CHECK-SUM : Call up check sum and XOR
values for connected ROM.
SPECIFIC ADDR : Call up check sum for certain
address.
TIME DISPLAY : Bring up clock display. The
present time, date and daily
alarm can be set.
1) Check sum 3) Time display
MENU MEMORY
1 : CHECK–SUM
2 : SPECIFIC ADDR
3 : TIME DISPLAY
4 :
5 :
CASIO 1993. 11. 09
5. Key/Buzzer check RANDOM :
The 'key code' will be displayed.
The 'key code' is numbered incrementally from
left to right with the DATE key as "00", and
HOME/WORLD key as "34" etc. Accordingly,
the left cursor key is "40". To release this test, press
SEARCH key.
COMPULSORY :
Limits the mode mentioned above so that the
keys must be pressed according to the key code.
If an error is made, a buzzer sounds for about 1
second. (A correct entry results in a beep tone.)
CHECKSUM CALC
TP SZ SUM XOR
C0 O 256 XXXX XX
CASIO 1993. 11. 09
TIME DISPLAY
1990-03-00
10:10 00
XXXXXXXXXXXXXXX
CASIO 1993. 11. 09
2) Specific address
SPECIFIC ADDR
TP SZ SUM XOR
D0 O 256 XXXX XX
CASIO 1993. 11. 09
Input can be made in the line which
shows "x" using the numeric keys.
Entry of 12 or more digits sets the time
and date. Entry of 4 or 6 digits sets the
daily alarm. The ON key clears cur-
rent entries.
MENU KEY / BZR
1 : RANDOM
2 : COMPULSORY
3 : BEEP
4 : ALARM NOTE 1
5 : ALARM NOTE 2
CASIO 1993. 11. 09
BEEP : Key input sound every 1 second
ALARM NOTE 1 : Sound alarm 1
ALARM NOTE 2 : Sound alarm 2
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