Concurrent Technologies VP 110/01x VME Pentium III-M Single Product manual

Technical Reference Manual
for VP 110/01x
VME Pentium®III-M Single
Board Computer
Manual Order Code 550 0014 Rev 02 August 2002
E-mail: [email protected] http://www.gocct.com
Concurrent Technologies Inc
3840 Packard Road
Suite 130
Ann Arbor, MI 48108
USA
Tel: [phone]
Fax: [phone]
Concurrent Technologies Plc
4 Gilberd Court
Newcomen Way
Colchester, Essex CO4 9WN
United Kingdom
Tel: [phone]
Fax: [phone]

NOTES
Information furnished by Concurrent Technologies is believed to be accurate and reliable.
However, Concurrent Technologies assumes no responsibility for any errors contained in this
document and makes no commitment to update or to keep current the information contained in
this document. Concurrent Technologies reserves the right to change specifications at any time
without notice.
Concurrent Technologies assumes no responsibility either for the use of this document or for any
infringements of the patent or other rights of third parties which may result from its use. In
particular, no license is either granted or implied under any patent or patent rights belonging to
Concurrent Technologies.
Some parts of this document are reproduced with the permission of and remain copyright
Phoenix Technologies Ltd, 1997.
No part of this document may be copied or reproduced in any form or by any means without the
prior written consent of Concurrent Technologies.
All companies and product names are trademarks of their respective companies.
CONVENTIONS
Throughout this manual the following conventions will apply:
#or*or over a name represents an active low signal. e.g. INIT* or INIT or INIT#
h denotes a hexadecimal number. e.g. FF45h
byte represents 8-bits
word represents 16-bits
dword represents 32-bits
ii VP 110/01x

GLOSSARY OF TERMS
BIOS ·····Basic Input Output System
BIST ·····Built In Self Test
BSB······Back Side Bus
CCT······Concurrent Technologies
CPU ·····Central Processing Unit
CRT······Cathode Ray Tube
DDC ·····Display Data Channel
DIB ······Dual Independent Bus
DFP······Digital Flat Panel
DMA ·····Direct Memory Access
ECC ·····Error Checking and Correcting
ECP······Extended Capabilities Port
EIDE ·····Enhanced Integrated Drive Electronics
EPP······Enhanced Parallel Port
EPROM· · · Electrically Programmable Read Only Memory
FSB······Front Side Bus
ISA ······Industry Standard Architecture
LDT······Long Duration Timer
LFM······Linear Feet per Minute
LPC······LowPinCount
NMI······NonMaskable Interrupt
PCI ······Peripheral Component Interconnect
PIT ······Programmable Interval Timer
PMC ·····PCIMezzanine Card
POST ····Power-on Self Test
RFU······Reserved for Future Use
RTC······Real Time Clock
SCC ·····Serial Communications Controller
SCSI ·····Small Computer Systems Interface
SDRAM · · · Synchronous Dynamic Random Access Memory
SODIMM · · Small Outline Dual Inline Memory Module
TTL······Transistor-Transistor Logic
UART ····Universal Asynchronous Receiver Transmitter
USB······Universal Serial Bus
VP 110/01x iii

NOTATIONAL CONVENTIONS
NOTE Notes provide general additional information.
WARNING Warnings provide indication of board malfunction if they are not observed.
CAUTION Cautions provide indications of board or system damage if they are not observed.
iv VP 110/01x

Revision Revision History Date
01 Initial Release July 2002
02 Added clarifications to several sections August 2002
VP 110/01x v

Table of Contents
1. Introduction and Overview ·················1-1
1.1 General ·························1-1
1.2 The VP 110/01x - Main Features ··················1-2
1.2.1 Central Processor ······················1-2
1.2.2 Cache Memories·······················1-2
1.2.3 Chipset··························1-2
1.2.4 SDRAM ·························1-3
1.2.5 PCI Busses ························1-3
1.2.6 EPROM ·························1-3
1.2.7 Battery Backed SRAM ·····················1-3
1.2.8 Application Flash EPROM ····················1-3
1.2.9 EIDE Controllers ·······················1-3
1.2.10 USB···························1-3
1.2.11 PMC Interface ·······················1-3
1.2.12 Ethernet Controllers ······················1-3
1.2.13 VME Interface ·······················1-3
1.2.14 Floppy Disk ························1-4
1.2.15 Serial Communication ·····················1-4
1.2.16 Keyboard & Mouse ······················1-4
1.2.17 Real Time Clock (RTC)·····················1-4
1.3 Additional Board Options ····················1-5
2. Hardware Installation ···················2-1
2.1 General ·························2-1
2.2 Unpacking and Inspection ····················2-2
2.3 Default Jumper Settings ···················2-3
2.4 Front Panel Indicators and Controls ·················2-4
2.4.1 Run LED (R) Green ······················2-4
2.4.2 POST LED (P) Yellow ·····················2-4
2.4.3 Ethernet Speed LEDs (Speed) Yellow ················2-4
2.4.4 Link/Activity LEDs (LK/ACT) Green ·················2-4
2.4.5 Battery Status LED (B) Yellow (optional) ···············2-4
2.4.6 Reset/NMI Switch ······················2-4
2.4.7 External Reset ·······················2-5
2.5 Installation of On-Board Mass Storage ················2-6
2.5.1 Hard Disk Storage Kit (AD CP1/DR1) ················2-7
2.5.2 CompactFlash Storage Kit (AD 200/001) ···············2-8
2.6 Adding or Replacing DRAM Modules ················2-9
2.7 Installing and Replacing the Battery ················2-10
2.8 Installing or Removing a PMC Module················2-12
2.9 Installing the Board in a VME Backplane ···············2-14
2.9.1 Installing the board······················2-14
2.9.2 Removing the board ·····················2-14
3. Software Installation ···················3-1
3.1 Starting up for the first time ···················3-1
3.2 Bootloading from CD-ROM ···················3-2
3.3 Installing Windows NT®4.0···················3-3
3.4 Installing Windows®2000 ····················3-4
3.5 Installing RedHat®Linux®7.2···················3-5
3.6 Using VxWorks 5.4 with Tornado 2 ·················3-6
4. Mass Storage Interfaces ··················4-1
4.1 Floppy Disk Interface ·····················4-1
4.2 EIDE Interfaces ·······················4-2
vi VP 110/01x

4.3 ROM Disk ·························4-3
4.4 RAM Disk ·························4-4
5. VME Interface ······················5-1
5.1 VME Bus Interface Features ···················5-1
5.2 VME Byte Swapping ·····················5-2
5.3 VME Bus Error Interrupt ····················5-3
5.4 VME Address Capture ·····················5-3
5.4.1 VME Address Capture Read Register (Read Only) ············5-4
5.4.2 VME Address Capture Control Register (Write Only) ···········5-6
6. Other Interfaces ·····················6-1
6.1 Serial Port ·························6-1
6.2 Keyboard and Mouse Ports ···················6-2
6.3 Ethernet Controllers ······················6-3
6.4 Real-Time Clock ·······················6-4
6.5 Universal Serial Bus (USB) ···················6-5
6.6 Power On Self Test LED/Speaker ·················6-6
7. Memory························7-1
7.1 SDRAM ·························7-2
7.2 Flash EPROM ·······················7-3
7.3 Application Flash EPROM ····················7-4
7.4 Battery backed SRAM ·····················7-5
8. Additional Local I/O Functions ················8-1
8.1 Status & Control Register 0 (I/O address 210h) ·············8-3
8.2 Status & Control Register 2 (I/O address 211h) ·············8-4
8.3 Status & Control Register 1(I/O address 212h) ·············8-5
8.4 Watchdog Timer ·······················8-6
8.4.1 Watchdog Status & Control Register (I/O address 214h) ··········8-7
8.4.2 Watchdog Configuration ····················8-8
8.4.3 Using the Watchdog······················8-8
8.4.4 Programming the Watchdog ···················8-9
8.5 Status & Control Register 4 (I/O address 215h) ·············8-11
8.6 Memory Page and Status Register (I/O address 216h) ··········8-12
8.7 Status & Control Register 3 (I/O address 217h) ·············8-13
8.8 Long Duration Timer/Periodic Interrupt Timer ·············8-14
8.8.1 Long Duration Timer/Periodic Interrupt Timer Low Byte ··········8-15
8.8.2 Long Duration Timer/Periodic Interrupt Timer Mid-low Byte ·········8-15
8.8.3 Long Duration Timer/Periodic Interrupt Timer Mid-high Byte ·········8-15
8.8.4 Long Duration Timer/Periodic Interrupt Timer High Byte ··········8-15
8.8.5 LDT/PIT Status & Control Register ·················8-16
8.8.6 Programming the LDT/PIT ···················8-17
8.9 Port 80 ·························8-20
9. PCBIOS························9-1
9.1 Entering the PC BIOS ·····················9-1
9.2 The PC BIOS Startup Sequence ··················9-3
9.3 Boot device selection ·····················9-4
9.4 PCI Bus Resource Management ··················9-5
9.4.1 PCI Resource Allocation ····················9-5
9.4.2 PCI Device IDs ·······················9-7
10. VME System Architecture Test Handler ·············10-1
10.1 Introduction ························10-1
10.2 The VSA Environment ····················10-1
VP 110/01x vii

10.2.1 Slot Numbering ·······················10-1
10.2.2 VSA Console Devices·····················10-1
10.2.3 Starting the Master Test Handler ·················10-2
10.2.4 Remote Testing from the System Controller ··············10-2
10.2.5 Bootloading the BIOS ·····················10-2
10.2.6 BIST Execution ·······················10-3
10.3 MTH Command Reference ···················10-4
10.3.1 Help Screens ·······················10-4
10.3.2 General Commands ·····················10-4
10.3.3 Utility Commands ······················10-6
11. VSA Mode Diagnostics ··················11-1
11.1 Initialization Checks ·····················11-1
11.1.1 Check 16: CPU Alive Check ···················11-1
11.1.2 Check 18: Scratchpad RAM Check ················11-1
11.2 BIST Descriptions ······················11-2
11.2.1 Test 1: Test Initialization Routine ·················11-2
11.2.2 Test 2: PROM Check ·····················11-2
11.2.3 Test 4: Numeric Coprocessor Test ·················11-2
11.2.4 Test 6: Interconnect Image Check ·················11-3
11.2.5 Test 7: Off-board Interconnect Access ···············11-3
11.2.6 Test 9: 8254 PIT Test ·····················11-3
11.2.7 Test 10: 8259A PIC Test ····················11-3
11.2.8 Test 12: Local RAM Fixed Pattern Test ···············11-4
11.2.9 Test 13: SCC Access Test ···················11-4
11.2.10 Test 19: NMI Test ······················11-4
11.2.11 Test 20: Universe NMI Test ···················11-5
11.2.12 Test 22: RAM Data and Address Bus Test ··············11-5
11.2.13 Test 23: Local RAM Read/Write Test ················11-5
11.2.14 Test 25: Local RAM Dual Address Test ···············11-6
11.2.15 Test 27: Local RAM Execution Test ················11-6
11.2.16 Test 28: SCC Interrupt Test ···················11-7
11.2.17 Test 29: SCC Internal Loopback Test ················11-7
11.2.18 Test 30: SCC External Loopback ·················11-7
11.2.19 Test 33: Universe PCI−>VME Test ·················11-7
11.2.20 Test 34: Universe PCI Config Utility ················11-8
11.2.21 Test 35: Universe VME Config Utility ················11-8
11.2.22 Test 36: VME Bus Byte Swapping ·················11-8
11.2.23 Test 37: Bus Error Detection Test ·················11-9
11.2.23.1 Sub-Test 1: VME Bus Error Detection [by polling] ············11-9
11.2.23.2 Sub-Test 2: VME Bus Error Detection [by interrupt] ···········11-9
11.2.23.3 Sub-Test 3: VME Bus Error Address Capture ·············11-9
11.2.24 Test 39: Watchdog Test····················11-10
11.2.24.1 Sub-Test 1: Watchdog NMI Test ·················11-10
11.2.24.2 Sub-Test 2: Watchdog Reset Test ················11-10
11.2.25 Test 40: LDT and PIT Test ···················11-11
11.2.26 Sub-Test 1: Standard LDT / PIT Functional Test ············11-11
11.2.27 Sub-Test 2: Enhanced LDT / PIT Functional Test ············11-11
11.2.28 Test 41: StrataFlash Test ···················11-12
11.2.29 Test 42: Non-Volatile RAM Test ·················11-13
11.2.29.1 Sub-test 1: Non-destructive NVRAM Read/Write Test ··········11-13
11.2.29.2 Sub-test 2: NVRAM Data retention Pattern, Setup ···········11-13
11.2.29.3 Sub-test 3: NVRAM Data Retention Pattern Check ···········11-13
11.2.30 Test 56: IDE Controller Test ··················11-14
11.2.30.1 Register Access Test ····················11-14
11.2.30.2 Controller Diagnostics Test···················11-14
11.2.30.3 Identify Disk Drive ·····················11-14
11.2.31 Test 58: IDE Fixture Test ···················11-15
11.2.32 Test 63: PS/2 Mouse Test ···················11-16
viii VP 110/01x

11.2.33 Test 64: PC Keyboard Test···················11-17
11.2.34 Test 68: Real Time Clock Test··················11-18
11.2.35 Test 69: 82559ER Test ····················11-19
11.2.35.1 Sub-Test 0 – Default Tests ···················11-19
11.2.35.2 Sub-Test 1 – Device Checks ··················11-19
11.2.35.3 Sub-Test 2 – Internal Loopback ·················11-19
11.2.35.4 Sub-Test 3 – External Loopback @ 10Mb/sec ·············11-19
11.2.35.5 Sub-Test 4 – External Loopback @ 100Mb/sec ············11-19
11.2.35.6 Sub-Test 5 – Display Programmed Ethernet Address ··········11-19
11.2.36 Test 70: Maxim 1617 Thermal Sensor Test··············11-20
11.2.36.1 Basic Functionality ·····················11-20
11.2.36.2 Temperature Readout ····················11-20
11.2.36.3 Set Alarms ························11-20
11.2.36.4 Change Update Frequency ··················11-21
11.2.36.5 Full Readout ·······················11-22
11.2.37 Test 71: 82559ER Interface Test ·················11-23
11.2.38 Test 80: SCSI Based PMC Site Test ················11-23
11.2.39 Test 85: Floppy Disk Drive Test ·················11-23
11.2.39.1 Controller Access Test ····················11-23
11.2.39.2 Diskette Access Test ····················11-23
11.2.39.3 Disk Checksum Test ·····················11-23
11.2.40 Test 101: Display Memory Utility ·················11-24
11.2.41 Test 102: Fill Memory Utility ··················11-24
11.2.42 Test 103: I/O Read Utility ···················11-24
11.2.43 Test 104: I/O Write Utility ···················11-25
11.2.44 Test 105: Interconnect Read Utility ················11-25
11.2.45 Test 106: Interconnect Write Utility ················11-25
11.2.46 Test 107: Cache Control Utility ·················11-26
11.2.47 Test 120: PCI Configuration Utility ················11-26
11.2.48 Test 121: PCI Read Utility ···················11-27
11.2.49 Test 122: PCI Write Utility ···················11-27
11.2.50 Test 126: Display Board Configuration ···············11-27
11.2.51 Test 127: Retrieve BIST Information ················11-27
A. Specifications······················A-1
A.1 Functional Specification ····················A-1
A.2 Environmental Specification ···················A-2
A.2.1 Temperature Range ·····················A-2
A.2.2 Humidity ·························A-2
A.3 Dimensions ························A-2
A.4 Electrical Specification ·····················A-2
A.4.1 Power Supply Requirements ···················A-2
A.5 Connectors ·······················A-3
A.5.1 VME Interface (P1) Pin-outs ···················A-4
A.5.2 Auxiliary Connector (P2) Pin-outs ·················A-5
A.5.3 PMC I/O Connector (P0) Pin-outs ·················A-6
A.5.4 Keyboard and Mouse Header (LK1) Pin-outs ··············A-7
A.5.5 Serial Interface (J9) Pin-outs ···················A-8
A.5.6 Ethernet Interface (J15 and J16) Pin-outs ···············A-9
A.5.7 On-Board Mass Storage Option Connector (S1) Pin-outs··········A-10
A.5.8 PMC Site 1 Connectors (J11, J12, J13 and J14) Pin-outs ·········A-11
A.5.9 PMC Site 2 Connectors (J21, J22, J23 and J24) Pin-outs ·········A-15
A.5.10 Processor Debug Port (J1) Pin-outs ················A-19
A.5.11 Port 80 (J3) Pin-outs ····················A-20
B. Breakout Modules ····················B-1
B.1 Introduction ························B-1
B.2 Breakout Modules List ·····················B-1
B.3 AD VP2/004-10 ·······················B-2
VP 110/01x ix

B.3.1 Layout ··························B-2
B.3.2 Pin-out Tables ·······················B-2
B.4 AD VP2/004-20 ·······················B-3
B.4.1 Layout ··························B-3
B.4.2 Pin-out Tables ·······················B-3
B.5 AD VP2/005-00 ·······················B-4
B.5.1 Layout ··························B-4
B.5.2 Pin-out Tables ·······················B-4
B.6 Header/Connector Configuration Tables ···············B-5
x VP 110/01x

Table of Figures
Figure 1-1 Overview ························1-1
Figure 2-1 Default Jumper and Switch Settings ················2-3
Figure 2-2 Front Panel Indicators and Controls ················2-4
Figure 2-3 Front Panel Reset and NMI Switch ················2-5
Figure 2-4 Mass Storage Connector and Fixing Holes ··············2-6
Figure 2-5 Disk Drive Cable Installation ··················2-7
Figure 2-6 CompactFlash Carrier Module Installation ··············2-8
Figure 2-7 DRAM Module Replacement ··················2-9
Figure 2-8 Battery Fitting and CMOS Clear Jumper ··············2-10
Figure 2-9 PMC Installation Diagram ···················2-12
Figure 2-10 PMC V(I/O) Jumper ·····················2-13
Figure 6-1 Console Mode Switch·····················6-1
Figure 7-1 Memory Map ·······················7-1
Figure 7-2 Flash Program Jumper ····················7-4
Figure 7-3 SRAM Backup Power Jumper ··················7-5
Figure 8-1 Watchdog Timer Switch ····················8-6
Figure 9-1 Mode Switch ·······················9-1
Figure A-1 Connector Layout ······················A-3
Figure A-2 Front Panel Connectors ····················A-3
Figure A-3 Keyboard and Mouse Header LK1 Polarization·············A-7
Figure A-4 Serial Port RJ45 Connector (Front View)···············A-8
Figure A-5 Ethernet RJ-45 Connector (Front View) ···············A-9
Figure A-6 Port 80 Connector ·····················A-20
Figure B-1 AD VP2/004-10 P2 Breakout Connectors ··············B-2
Figure B-2 AD VP2/004-20 P2 Breakout Connectors ··············B-3
Figure B-3 AD VP2/005-00 P2 Breakout Connectors ··············B-4
VP 110/01x xi

Table of Tables
Table 1-1 VME P2 Breakout Interfaces ··················1-5
Table 5-1 VME Address Capture Read Register················5-4
Table 5-2 VME Address Modifier Codes ··················5-5
Table 5-2 VME Address Modifier Codes (Continued) ··············5-6
Table 8-1 I/O Address Map ······················8-1
Table 9-1 Configurable PCI Bus Interrupts ·················9-6
Table 9-2 PCI Device Numbers ·····················9-7
Table A-1 VME Interface Pin-outs ····················A-4
Table A-2 P2 Connector Pin-outs (64 PMC I/O Signals) ·············A-5
Table A-3 PMC I/O Connector (P0) Pin-outs ·················A-6
Table A-4 Keyboard and Mouse Header (LK1) Pin-outs ·············A-7
Table A-5 Serial Port Cable Connections ··················A-8
Table A-6 Serial Port Cable Connections ··················A-8
Table A-7 Ethernet RJ-45 Connector Pin-outs ················A-9
Table A-8 On-Board Mass Storage Option Interface Pin-outs ···········A-10
Table A-9 PMC J11 Connector Pin-outs ··················A-11
Table A-10 PMC J12 Connector Pin-outs ··················A-12
Table A-11 PMC J13 Connector Pin-outs ··················A-13
Table A-12 PMC J14 Connector Pin-outs ··················A-14
Table A-13 PMC J21 Connector Pin-outs ··················A-15
Table A-14 PMC J22 Connector Pin-outs ··················A-16
Table A-15 PMC J23 Connector Pin-outs ··················A-17
Table A-16 PMC J24 Connector Pin-outs ··················A-18
Table A-17 30-way Debug Connector Pin-outs ················A-19
Table A-18 Port 80 Connector Pin-outs ··················A-20
Table B-1 Breakout Modules List ····················B-1
Table B-2 Floppy 34-way IDC Header ···················B-5
Table B-3 EIDE 40-way IDC Header ···················B-5
Table B-4 USB Connector Pin-outs····················B-6
Table B-5 PMC I/O 1-32 IDC Header Pin-outs ················B-6
Table B-6 PMC I/O 33-64 IDC Header Pin-outs ················B-6
Table B-7 P5 68-way D-type Connector Pin-outs ···············B-7
xii VP 110/01x

Introduction and Overview
1.1 General
This manual is a guide and reference handbook for engineers and system integrators who wish
to use the Concurrent Technologies’ VP 110/01x ultra high-performance Pentium III
Processor-M (Pentium III-M) single board computer. The board has been designed for
high-speed multiprocessing applications using a PC-AT™ architecture operating in a VME Bus
environment.
The VP 110/01x board is available in several different variants which differ by the amount of
fitted memory and processor configuration. Currently the board is available with either an
800MHz or a 1.2GHz Pentium III-M processor, designated by VP 110/010 and VP 110/012
respectively. The boards may be supplied with one of a range of SDRAM sizes, as specified by
a two-digit suffix to the board name; refer to the product data sheet for further details. Further
details of other board options are given in Section 1.3. References to the board in this document
will use the name VP 110/01x unless they apply only to a specific variant, in which case the full
name will be used.
The information contained in this manual has been written to provide users with all the
information necessary to configure, install and use the VP 110/01x as part of a system. It
assumes that the user is familiar with the VME bus and PC-AT bus architectures and features.
VP 110/01x 1-1
2
x Ethernet
10/100Mbps
32-bit PCI Bus
1xRS232
Header Header
PMC
Expansion
PMC Module
PMC
PMC Module
PMC
Universal
Serial Bus
VME
Floppy
Disk
Interface
S-DRAM
Low Power
Pentium III
Processor
ServerWorks
ServerSet III LE™
Bridge
Universe II
64-bit PCI Bus
2x
Intel
82559ER
Byte
Swap
CPU
Bus
Keyboard
Interface Mouse Interface
USB
BIOS
Flash
EPROM
Real-Time
Clock
Application
Flash
EPROM
EIDE Optional
P0
P2
P2
or CF
TM
EIDE
Interfaces
Serial
Interface
Battery
Backed
SRAM
3V
Figure 1-1 Overview

1.2 The VP 110/01x - Main Features
The VP 110/01x is a member of the Concurrent Technologies range of single-board computers
for the VME bus architecture. It has been designed as a powerful single board computer based
upon the Pentium III Processor-M (Pentium III-M) incorporating the following features:
lup to 1 Gbyte 133MHz SDRAM
ltwo IEEE P1386.1 PMC sites
ltwo 82559ER 10/100 Ethernet controllers
lup to 2 Mbytes of Battery backed SRAM
lup to 64 Mbytes of Intel®StrataFlash®
lon-board mass storage
lVME 8/16/32/64bit with data Endian translation
and standard PC-AT based peripherals.
1.2.1 Central Processor
The central processor used on this board is an ultra high performance low power Intel Pentium
III-M 32-bit microprocessor, operating internally at 800MHz or 1.2GHz. The processor supports
the Dual Independent Bus (DIB) architecture with the backside bus connected to the on die
Level 2 cache and the frontside bus connected to the memory controller at 133MHz. The
processor is capable of addressing 4 Gbytes of physical memory all of which is cacheable, and
64 Terabytes of virtual memory. The Pentium III-M is upwardly code-compatible with the other
members of the x86 family of microprocessors.
The processor has an in-built floating point coprocessor for compatibility with 486 and 386/387
designs.
The processor features Data Prefetch Logic that speculatively fetches data to the Level 2 cache
before a Level 1 cache request occurs. This reduces latency resulting in improved performance.
1.2.2 Cache Memories
The Level 1 and Level 2 caches are both implemented on the processor die for maximum
performance. The Level 1 cache is 32 Kbytes in size and the Level 2 cache is 512 Kbytes.
The Level 1 cache is organized as 4-way set associative with a 32-byte line size. It is split into a
16 Kbyte instruction cache and a 16 Kbyte write-back data cache.
The Level 2 cache is organized as 8-way set associative with a 32-byte line size. It operates at
the core frequency and is based on Intel’s Advanced Transfer Cache architecture. The Level 2
cache data is ECC protected.
1.2.3 Chipset
The VP 110/01x uses the ServerWorks ServerSet™ III LE chipset. This is comprised of the
CNB30LE North Bridge and the CSB5 South Bridge.
The CNB30LE interfaces to the CPU host bus. It provides an SDRAM memory controller and two
PCI bus bridges. It supports concurrent CPU and PCI bus operations. Pentium III burst and
pipelining modes are supported to achieve a transfer rate of up to 425 Mbytes/s from SDRAM.
The CSB5 South Bridge provides a variety of peripheral functions including EIDE controllers,
USB controller, LPC (Low Pin Count) Bus bridge, interrupt controller and other legacy PC-AT
architectural functions. It is connected to the CNB30LE primary PCI bus.
The LPC Bus is used to connect to the PC87417 Super I/O Controller. This device implements
the floppy disk controller, the serial port, keyboard and mouse controller and the real-time clock.
1-2 VP 110/01x
Introduction and Overview

1.2.4 SDRAM
The on-board SDRAM operates at 133MHz and features ECC data protection. The board is
fitted with 512 Mbytes of soldered-on SDRAM. A 144-pin SODIMM socket is provided for
memory expansion. This accepts a standard PC133 SDRAM module having a capacity up to
512 Mbytes. Hence a maximum of 1 Gbyte of SDRAM may be fitted to the board.
1.2.5 PCI Busses
There are two on-board PCI busses supported by the CNB30LE North Bridge. The secondary
PCI bus is 64-bits wide and provides a high performance, up to 528 Mbytes/s, connection
between the CNB30LE controller, the PMC sites and PMC expansion carrier board. The
Primary PCI bus is 32-bits wide and provides a lower performance, up to 132 Mbytes/s,
connection between the CNB30LE, PC-AT peripherals, VME bus, and Ethernet controllers.
1.2.6 EPROM
The board contains two 512 Kbyte Flash EPROMs, one for the BIOS firmware and the other for
the factory test (VSA) firmware. The EPROMs have 8-bit data paths and are connected to the
CSB5 X-Bus interface.
1.2.7 Battery Backed SRAM
The board can be fitted with 512 Kbytes to 2 Mbytes of Static RAM. This SRAM is non volatile as
data is automatically retained via on board battery when the board is not powered. The memory
is connected to the CSB5 X-Bus interface and is accessible via two memory windows; a paged
512 Kbyte window and a full 2 Mbyte window. The 512 Kbyte window is shared with the
StrataFlash, both the page and memory type are selected via dedicated registers.
1.2.8 Application Flash EPROM
Intel StrataFlash memory is provided for use by application software, and has capacities from 16
Mbytes to 64 Mbytes. The memory is connected to the CSB5 X-Bus interface and is accessible
via a paged 512 Kbyte window. This window is shared with the battery backed SRAM, the page
and memory type being selected via dedicated registers.
1.2.9 EIDE Controllers
The VP 110/01x has two EIDE/Ultra ATA100 interfaces. One EIDE interface is available via the
P2 connector, the other via an on-board connector for use by the optional on-board disk drive or
CompactFlash™module.
1.2.10 USB
A USB 1.0 channel is provided via the P2 interface, and associated Breakout Module.
1.2.11 PMC Interface
Two IEEE P1361.1 standard PMC sites are available supporting 64 or 32-bit operation at 66 or
33MHz. A 3.3V or 5V PCI signaling environment is supported.
The PMC interface will also accept dual function PMC modules and Processor PMC modules.
The latter will operate in non-Monarch modes.
1.2.12 Ethernet Controllers
Two independent Intel 82559ER 10/100 Mbit Ethernet controllers are used to provide high
performance PCI to Ethernet interfaces. Both controllers support 10 and 100 Mbits/s operation.
Those interfaces are made available on RJ45 connectors on the front panel.
1.2.13 VME Interface
The VP 110/01x VME interface is provided by a Tundra®Universe II™VME to PCI bridge. The
VME interface supports transfers up to 64-bits wide. Hardware Endian swapping is configurable
under software control.
Introduction and Overview
VP 110/01x 1-3

1.2.14 Floppy Disk
A floppy disk interface is provided by the Super I/O Controller for up to two floppy drives and is
connected via the P2 connector.
1.2.15 Serial Communication
The VP 110/01x has one RS232 serial data communication channel, accessible via a front panel
mounted RJ45 connector. This connects to channel 1 of the Super I/O Controller providing a
16550 compatible Serial Communications Controller.
The baud rate clock is generated internally by the Super I/O Controller.
1.2.16 Keyboard & Mouse
PS/2™type keyboard and mouse interfaces are available via an on board header. See Section
6.2 for more information about these ports.
1.2.17 Real Time Clock (RTC)
A battery backed RTC device provides PC-AT clock, calendar and configuration RAM functions.
The RTC and BIOS are year 2000 compliant.
1-4 VP 110/01x
Introduction and Overview

1.3 Additional Board Options
Two on-board mass storage options are available, namely;
lA 2.5” EIDE hard disk drive of at least 10 Gbyte capacity.
lA CompactFlash carrier that supports the IBM®Microdrive™.
Only one of these mass storage options may be fitted at a time. Refer to the VP 110/01x
datasheet for ordering information.
The VP 110/01x board may be ordered with one of a few different VME P2 and P0 connector
breakout or adapter modules. Appendix B gives details of all these breakout modules.
Table 1-1 summarizes the interfaces available using each of these VME P2 breakouts.
Breakout
VME P2 Connector Pins EIDE Floppy USB PMC Site 1 Rear I/O (P2) PMC Site 2 Rear I/O (P0)
AD VP2/004-10 96 4
AD VP2/004-20 160 4444
AD VP2/005-00 160 44444
Table 1-1 VME P2 Breakout Interfaces
Introduction and Overview
VP 110/01x 1-5

This page has been left intentionally blank
1-6 VP 110/01x
Introduction and Overview

Hardware Installation
2.1 General
This chapter contains general information on unpacking and inspecting the VP 110/01x after
shipment, and information on how to configure board options and install the board into a VME
chassis.
CAUTION It is strongly advised that, when handling the VP 110/01x and its associated
components, the user should at all times wear an earthing strap to prevent
damage to the board as a result of electrostatic discharge.
The list below outlines the steps necessary to configure and install the board. Each entry in the
list refers to a section in this chapter which will provide more details of that stage of the
procedure.
1) Unpack the board - see Section 2.2.
2) Check the board jumper and switch settings match the required operating mode - see
Section 2.3.
3) Locate the board’s indicators and switches - see Section 2.4.
4) Fit any optional mass storage or SDRAM modules - see Sections 2.5 and 2.6.
5) Fit the battery if required - see Section 2.7.
6) Fit PMC modules if required - see Section 2.8.
7) Install the board - see Section 2.9.
VP 110/01x 2-1

2.2 Unpacking and Inspection
Immediately after the board is delivered to the user’s premises the user should carry out a
thorough inspection of the package for any damage caused by negligent handling in transit.
CAUTION If the packaging is badly damaged or water-stained the user must insist on the
carrier’s agent being present when the board is unpacked.
Once unpacked, the board should be inspected carefully for physical damage, loose
components etc. In the event of the board arriving at the customer’s premises in an obviously
damaged condition, Concurrent Technologies or its authorized agent should be notified
immediately.
2-2 VP 110/01x
Hardware Installation