Digital Spectrum TMS320C6413 Use and care manual

TMS320C6413/C6418 EVM
2004 DSP Development Systems
Reference
Technical

TMS320C6413/C6418 EVM
Technical Reference
507265-0001 Rev. B
October 2004
SPECTRUM DIGITAL, INC.
12502 Exchange Drive, Suite 440 Stafford, TX. 77477
Tel: [phone] Fax: [phone]
[email protected] www.spectrumdigital.com

IMPORTANT NOTICE
Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any
product or service without notice. Customers are advised to obtain the latest version of relevant
information to verify that the data being relied on is current before placing orders.
Spectrum Digital, Inc. warrants performance of its products and related software to current
specifications in accordance with Spectrum Digital’s standard warranty. Testing and other quality
control techniques are utilized to the extent deemed necessary to support this warranty.
Please be aware that the products described herein are not intended for use in life-support
appliances, devices, or systems. Spectrum Digital does not warrant nor is Spectrum Digital liable for
the product described herein to be used in other than a development environment.
Spectrum Digital, Inc. assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein. Nor does Spectrum
Digital warrant or represent any license, either express or implied, is granted under any patent right,
copyright, or other intellectual property right of Spectrum Digital, Inc. covering or relating to any
combination, machine, or process in which such Digital Signal Processing development products or
services might be or are used.
WARNING
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of this equipment in other environments
may cause interference with radio communications, in which case the user at his own expense will be
required to take whatever measures necessary to correct this interference.
Copyright © 2004 Spectrum Digital, Inc.

Contents
1 Introduction to the TMS320C6413/C6418 EVM Module . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Provides you with a description of the TMS320C6413/C6418 EVM Module, key features, and
block diagram.
1.1 Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.3 Display/Keypad Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.4 Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.5 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.6 Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.6.1 CLKMODE Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.6.2 CLKINSEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.6.3 Oscillator Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.6.4 Endian Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.7 EMIFA Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.7.1 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.7.2 EMIFA Clock Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.8 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
2 Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Describes the operation of the major board components on the TMS320C6413/C6418 EVM.
2.1 CPLD (programmable Logic) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.1 CPLD Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.2 CPLD Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.3 USER_REG Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.1.4 DC_REG Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.1.5 Version Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.1.6 MISC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.1.7 LCD Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.1.8 C6413/C6418 EVM Interface Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.2 AIC23 Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.3 Synchronous Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.4 Flash ROM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.5 SBRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.6 LEDs and DIP Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.7 Daughter Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.8 TL16550 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
3 Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Describes the physical layout of the TMS320C6413/C6418 EVM and its connectors.
3.1 TMS320C6413/C6418 EVM Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2 Keypad/display Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.3 Connector Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

3.4 Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.4.1 P1, Memory Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.4.2 P2, Peripheral Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3.4.3 P3, HPI Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3.5 Audio Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.5.1 J1, Microphone Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.5.2 J2, Audio Line In Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.5.3 J3, Audio Line Out Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.5.4 J4, Headphone Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.6 Power Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.6.1 J5, +5V Main Power Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.6.2 J6, Alternate Power Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.7. Miscellaneous Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.7.1 J8, RS-232 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.7.2 J7, External JTAG Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.7.3 JP1, PLD Programming Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.8 P5, Keypad/Display Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.9 System LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.10 Reset Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
A Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
Contains the schematics for the TMS320C6413/C6418 EVM and Keypad/display Module
A.1 TMS320C6413/C6418 EVM Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A.2 Keypad/display Module Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-26
B Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1
Contains the mechanical information about the TMS320C6413/C6418 EVM and Keypad/display
Module
B.1 TMS320C6413/C6418 EVM Mechanical Information . . . . . . . . . . . . . . . . . . . . . . B-2
B.2 Keypad/display Module Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3

About This Manual
This document describes the board level operations of the TMS320C6413/C6418
Evaluation Module (EVM). The EVM is based on the Texas Instruments
TMS320C6413/C6418 Digital Signal Processor.
The TMS320C6413/C6418 EVM is a table top card to allow engineers and software
developers to evaluate certain characteristics of the TMS320C6413/C6418 DSP to
determine if the processor meets the designers application requirements. Evaluators
can create software to execute onboard or expand the system in a variety of ways.
Notational Conventions
This document uses the following conventions.
The TMS320C6413/C6418 will sometimes be referred to as the C641x.
The TMS320C6413/C6418 EVM will sometimes be referred to as the EVM.
Program listings, program examples, and interactive displays are shown is a special
italic typeface. Here is a sample program listing.
equations
!rd = !strobe&rw;
Information About Cautions
This book may contain cautions.
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your software,
or hardware, or other equipment. The information in a caution is provided for your
protection. Please read each caution carefully.
Related Documents
Texas Instruments TMS320C64XX DSP CPU Reference Guide
Texas Instruments TMS320C64XX DSP Peripherals Reference Guide

Table 1: Hardware History
Revision History
A Alpha Release
Table 2: Manual History
Revision History
A Alpha Release
B Text Updates

1-1
Chapter 1
Introduction to the
TMS320C6413/C6418 EVM
Chapter One provides a description of the TMS320C6413/C6418 EVM
along with the key features and a block diagram of the circuit board.
Topic Page
1.1 Key Features 1-2
1.2 Functional Overview 1-3
1.3 Display/Keypad Overview 1-4
1.4 Basic Operation 1-4
1.5 Memory Map 1-5
1.6 Jumper Settings 1-6
1.6.1 CLKMODE Multiplier 1-7
1.6.2 CLKINSEL 1-7
1.6.3 Oscillator Disable 1-7
1.6.4 Endian Select 1-8
1.7 EMIFA Configuration Options 1-8
1.7.1 Boot Options 1-8
1.7.2 EMIFA Clock Select 1-9
1.8 Power Supply 1-9

Spectrum Digital, Inc
1-2 TMS320C6413/C6418 EVM Module Technical Reference
1.0 Key Features
The C6413/C6418 EVM is a standalone development platform that enables users to
evaluate and develop applications for the TI C64XX DSP family. The EVM also serves
as a hardware reference design for the TMS320C6413/C6418 DSP. Schematics, logic
equations and application notes are available to ease hardware development and
reduce time to market.
The EVM comes with a full compliment of on-board devices that suit a wide variety of
application environments. Key features include:
• A Texas InstrumentsC6413/C6418 DSP operating at 500/600 MHz
• An TLC320AIC23B stereo codec
• 8 Mbytes of synchronous DRAM
• 1 Mbyte of synchronous Burst RAM
• 1 Mbyte of non-volatile Flash memory
• TL16C550 UART with RS-232 Drivers
• 4 user accessible LEDs and DIP switches
• Software board configuration through registers implemented in CPLD
• 128 LCD display and keypad
• Standard expansion connectors for daughter card use
Figure 1-1, Block Diagram C6413/C6418 EVM
Exte r nal
JTAG
AIC23
Codec
Host Port Int
Peripheral Exp
LED DIP
EMIF
HPI
McBSPs
0 1 2 30 1 2 3
Memory Exp
CLK_SEL OSC ENDIAN
6418
DSP
Sync
DRAM
32
576
Config
32
OPT
8
CPLD
Sync
SRAM
Keypad
Display
CLKM0 CLKM1 CLKM2
CLKM3
RS-232
Flash Flash
32
1324
UART
8
I2C
ROM
PWR
MIC IN
LINE OUT
HPOUT
LINE IN
EXT PWR
I2C Bus
McASPs

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1-3
• JTAG emulation via external emulator
• Single voltage power supply (+5V)
1.2 Functional Overview of the TMS320C6413/C6418 EVM
The DSP interfaces to external SDRAM, SBRAM, Flash memory and an expansion
memory interface connector through its 32-bit External Memory Interface (EMIF). The
SDRAM accesses are in 32-bit mode in chip enable 0 memory space. The EMIF
provides the necessary refresh signals. The Flash accesses are in 8,16, or 32-bit
asynchronous mode in the bottom half of chip enable 1 space. The default mode of the
EVM for CE1 is 8 bit mode. The SBRAM is accessed via chip enable 3, if it is not routed
to the expansion connector which is controlled by the CPLD control register. The EMIF
signals are brought out to the daughter card expansion connectors which use chip
enables 2 and 3.
An on-board AIC23 codec allows the DSP to transmit and receive analog signals.
The I2C bus is used for the codec control interface and McBSP1 is used for data.
Analog I/O is done through four 3.5mm audio jacks that correspond to microphone
input, line input, line output and headphone output. The codec input is software
selectable between the microphone or the line input as the active input. The analog
output is driven to both the line out (fixed gain) and headphone (adjustable gain)
connectors. McBSP1 can be re-routed to the expansion connectors in software.
A programmable logic device called a CPLD is used to implement glue logic that ties
the board components together. The CPLD has a register based user interface that
lets the user configure the board by reading and writing to the CPLD registers. The
registers reside in the upper half of chip enable 1.
The EVM includes 4 LEDs and 4 position DIP switch as a simple way to provide the
user with interactive feedback. Both are accessed by reading and writing to the CPLD
registers.
A separate Keypad/LCD display card is interfaced via CPLD registers and I2C
accesses. This module provides a flexible input/output mechanism for application
programs
An included 5V external power supply is used to power the board. On-board voltage
regulators provide the +1.2V or +1.4V DSP core voltage, +3.3V digital and +3.3V
analog voltages. Voltage supervisors integrated into the regulators monitor voltage
regulation, and will hold the board in reset until the supplies are within operating
specifications and the reset button is released.

Spectrum Digital, Inc
1-4 TMS320C6413/C6418 EVM Module Technical Reference
1.3 Display/Keypad Overview
The universal display/keypad module interfaces to the EVM via a 16 pin 2mm. ribbon
cable.
The display module features a 128 x 64 LCD, 4 I2C A/D converters, 2 potentiometers,
9 user keys, and a jog wheel. All switches are accessed via the I2C A/Ds, while the
display is accessed via an SPI interface generated internally in the CPLD
Figure 1-2 below shows a block diagram of the display/keypad module.
1.4 Basic Operation
The EVM is designed to work with TI’s Code Composer Studio development
environment and is available in an optional package with the board. Code Composer
communicates with the board through the JTAG emulator. To start, follow the
instructions in the emulator’s Quick Start Guide to install Code Composer. This process
will install all of the necessary development tools, documentation and drivers.
Figure 1-2, BLOCK DIAGRAM OF DISPLAY/KEYPAD
I2C
SPI
A/D
JOG WHEEL
DISPLAY
SWITCHES
A/D
POT POT
EVM
Universal Display
A/D
A/D
CPLD

Spectrum Digital, Inc
1-5
1.5 Memory Map
The C64xx family of DSPs has a unified program and data space. Both programs and
data can reside anywhere in the unified memory space.
The address reach of the C6413/C6418 is 32 bits. The external memory interface
controller (EMIF) divides the off chip address space into 4 equally sized chip enable
(CE) spaces when dealing with external memory. The lower 20 address bits are driven
on the EMIF as address lines while the upper addresses are decoded and driven as the
chip enable for that particular region.
The figure above shows a generic memory space map for a C64xx family processor
and a second map specific to the components on a C6413/C6418 EVM. The SDRAM
occupies chip enable 0. The Flash, UART, and memory mapped registers of the CPLD
share CE1. The Flash accesses start at the lower addresses of the CE1, and occupy
locations 0x900000000 to 0x900EFFFF and the CPLD in the bottom half. The last
remaining locations 0x900F0000 - 0x900FFFFF are mapped to the CPLD and UART.
CE2 is used for expansion daughter card access and CE3 is optionally mapped into
SBRAM or expansion connector access.
Internal memory on the C6413/C6418 starts at address 0 and takes precedence over
any external memory.
Figure 1-2, Memory Map, C6413/C6418 EVM
Internal
Memory
Reserved
or
Peripheral
SDRAM
Flash
CPLD
and
UART
Daughter
Card
or
SBRAM
Internal Memory
Reserved Space
or
Peripheral Regs
EMIF CE0
EMIF CE1
EMIF CE2
EMIF CE3
641x EVM
C64xx Family
Memory Type
Address
0x00000000
0x00030000
0x80000000
0x90000000
0xA0000000
0xB0000000
0x900F0000
Daughter
Card

Spectrum Digital, Inc
1-6 TMS320C6413/C6418 EVM Module Technical Reference
1.6 Jumper Settings
TheC6413/C6418 EVM has 7 on-board CPU configuration jumpers that define the
DSP’s boot configuration and reset state along with one OPT jumper for user
implementation. The figure below shows these jumpers for the C6413.
The figure below shows the jumpers for the C6418.
The jumpers drive signals that directly correspond to the input on one of the DSP’s
configuration pins. If the jumper is on, the signal is driven to a logic 0. If the jumper is
off, the signal is driven to a logic 1.
Figure 1-3, JP4, C6413 DSP Boot Configuration - Default Setting
CLKM2
CLKM3
CLKINSEL
CLKM1
CLKM0
OSC *
ENDIAN
OPT
* Always populated
Figure 1-4, JP4, C6418 DSP Boot Configuration - Default Setting
CLKM2
CLKM3
CLKINSEL CLKM1
CLKM0
OSC *
ENDIAN
OPT
* Always populated

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1-7
1.6.1 CLKMODE Multiplier
TheC6413/C6418 has a number of clock multiplier modes that are selected at reset by
sampling the CLKMODE[3-0] pins. These pins can be configured with the on-board
jumpers. The jumper configuration is shown in the table below.
Note: * default on C6413
** default on C6418
1.6.2 CLKINSEL
The C6413/C6418 has the option of using an external clock oscillator or internal
oscillator to operate the PLL which controls the internal CPU clock. This clock is input
is selected at reset by the CLKINSEL pin. The EVM provides a configuration jumper to
select either the internal or external oscillator which controls the PLL. When CLKINSEL
is high (installed) AECLKIN is selected for PLL logic. When CLKINSEL is low
(removed) the internal oscillator controls the PLL clock. On theC6413/C6418 EVM
AECLKIN is driven by an external 25 Mhz oscillator, the internal oscillator is connected
to the external crystal which is 25 Mhz
Table 1: TMS320C6413/C6418 EVM CLKMODE Multiplier
CLKM3 CLKM2 CLKM1 CLKM0 Multiplier
Off Off Off Off x24 **
Off Off Off On x22
Off Off On Off x21
Off Off On On x20 *
Off On Off Off x19
Off On Off On x18
OffOnOnOff x16
OffOnOnOn x12
On Off Off Off x11
On Off Off On x10
On Off On Off x9
On Off On On x8
On On Off Off x7
On On Off On x6
On On On Off x5
On On On On Bypass

Spectrum Digital, Inc
1-8 TMS320C6413/C6418 EVM Module Technical Reference
1.6.3 Oscillator Disable
The OSC_DIS pin is used to enable the on chip oscillator. On the EVM an external
oscillator is used as the default configuration. However, the board is populated with a
25 Mhz crystal which is enabled by populating JP4 (11 to 12).
For proper operation the CLKINSEL jumper needs to be in configured appropriately to
enable the on board oscillator to control the PLL logic when using enabling or disabling
the on chip oscillator.
1.6.4 Endian Select
The C6413/C6418 can be operated in little endian or big endian memory modes. The
default mode on the EVM is little endian (jumper JP4-13 to 14 removed). When the
jumper is installed the board operates in big endian mode.
1.7 EMIFA Configuration Options
External addresses lines A19-A22 are used to configure the boot mode and EMIF
clock selection at reset. Four pull up and four pull down resistor locations are available
on the EVM to control this configuration. The selections are outlined.
1.7.1 Boot Options
At reset address lines A21 and A22 are sampled to determine the boot option of the
processor. although there are four modes available only 2 modes are not reserved.
These are 8 bit boot from CE1 which is the default on the EVM and no boot.
NOTE:
OSC_DIS jumper should always be populated.
Disabling the oscillator is for chip test functions
only.

Spectrum Digital, Inc
1-9
1.7.2 EMIFA Clock Select
Address lines A19 and A20 are sampled at reset and determine the EMIF clock
configuration selection. The EMIF clock is either a divider of the internal CPU clock
controlled by the PLL or is driven directly at the frequency supplied on the AECLKIN
pin.
On the EVM an external PLL is available to drive the AECLKIN pin. The default
frequency of the ICS512 PLL device is 125 Mhz.
Pull ups and pull downs are provided on the EVM to configure the clock selection. The
choices for the EMIF clock configuration are CPUCLK divided by four, CPUCLK divided
by six, AECLKIN. The table below details the choices.
* default
1.8 Power Supply
The EVM operates from a single +5V external power supply connected to the main
power input (J5). Internally, the +5V input is converted into +1.2V or 1.4V and +3.3V
using Texas Instruments voltage regulators. The +1.2V or 1.4V supply is used for the
DSP core while the +3.3V supply is used for the DSP's I/O buffers and all other chips
on the board. The power connector is a 2.5mm barrel-type plug.
There are two power test points on the EVM at JP2 and JP3. All board current passes
through JP2 (the +5V supply). All DSP core current passes through JP3. Normally
these jumpers are both closed. To measure the current passing through remove the
jumpers and connect the pins with a current measuring device.
The EVM also provides +3.3V, supply for the daughter card. It is also possible to
provide the daughter card with +12V and -12V when the optional external power
connector is used.
Table 2: EMIFA Clock Select
A20 A19 R123 R124 R125 R126 Selection
0 0 No-pop 1K No-pop 1K AECLKIN *
0 1 No-pop 1K 1K No-pop CPU/4 Clock Rate
1 0 1K No-pop No-pop 1K CPU/6 Clock Rate
1 1 1K No-pop 1K No-pop Reserved

Spectrum Digital, Inc
1-10 TMS320C6413/C6418 EVM Module Technical Reference

2-1
Chapter 2
Board Components
This chapter describes the operation of the major board components on
the TMS320C6413/C6418 EVM.
Topic Page
2.1 CPLD (Programmable Logic) 2-2
2.1.1 CPLD Overview 2-2
2.1.2 CPLD Registers 2-3
2.1.3 USER_REG Register 2-4
2.1.4 DC_REG Register 2-4
2.1.5 Version Register 2-5
2.1.6 MISC Register 2-5
2.1.7 LCD Interface 2-6
2.1.8 C6413/C6418 EVM Interface Register 2-7
2.2 AIC23 Codec 2-8
2.3 Sychronous DRAM 2-9
2.4 Flash Memory 2-9
2.5 SBRAM Memory 2-9
2.6 LEDs and DIP Switches 2-9
2.7 Daughter Card Interface 2-10
2.8 TL16C550 UART 2-11

Spectrum Digital, Inc
2-2 TMS320C6413/C6418 EVM Module Technical Reference
2.1 CPLD (Programmable Logic)
The C6413/C6418 EVM uses an Altera EPM3128TC100-10 Complex Programmable
Logic Device (CPLD) device to implement:
• Memory-mapped control/status registers that allow software
control of various board features.
• Address decode and memory access logic.
• Control of the daughter card interface and signals.
• SPI for LCD serial interface.
• Assorted "glue" logic that ties the board components together.
2.1.1 CPLD Overview
The CPLD logic is used to implement functionality specific to the EVM. Your own
hardware designs will likely implement a completely different set of functions or take
advantage of the DSPs high level of integration for system design and avoid the use
of external logic completely.
The EMIF on theC6413/C6418 can support several heterogeneous memory types with
a glueless interface. However, to reserve CE2 and CE3 for potential daughter-card use
on the EVM, CE1 is split to include the Flash in its bottom half and the CPLD
memory-mapped registers in its top half. The address decode logic is used to
implement the split.
The CPLD implements simple random logic functions that eliminate the need for
additional discrete devices. In particular, the CPLD aggregates the various reset
signals coming from the reset button and power supervisors and generates a global
reset.
The EPM3128TC100-10 is a 3.3V (5V tolerant), 100-pin QFP device that provides
128 macrocells, 80 I/O pins, and a 10 ns pin-to-pin delay. The device is
EEPROM-based and is in-system programmable via a dedicated JTAG interface
(a 10-pin header on the EVM). The CPLD source files are written in the industry
standard VHDL (Hardware Design Language) and are included with the EVM on the
installation CD-ROM.