DVB SMP137HDT2 User manual

1
DVB-Terrestrial Receiver
SMP137HDT2+SMP012HDT2
Service Manual
This service manual should be used with the User Manual together.
Please read this Service Manual and User Manual carefully before service this product.

2
Contents
Safety Instructions ......................................................................................... 3
Generally Guide .................................................................................................................................. 3
Low Potential Leakage Testing ............................................................................................................................... 3
High Potential Leakage Testing .............................................................................................................................. 3
Protect Electro-Static(ES)-sensitivity Device from Electro-Static
Discharge …………………………………………. ………………………………3-4
Electrical Specifications ................................................................................. 5
Mechanical Exploded View Drawing .............................................................. 6
Mechanical Parts List.......................................................................................................................... 7
Packaging and Accessories ........................................................................ 8-9
Packaging Exploded View Drawing .................................................................................................. 10
Appendix 1 Flowchart and Circuit Diagram ...................................................10
Flowchart........................................................................................................................................... 12
Wiring Diagram ............................................................................................................................ 14-15
Circuit Diagram of Decoding Board ............................................................................................. 16-23
Appendix 2 Silkscreen of PCB ......................................................................24
Silkscreen of Decoding Board Top.................................................................................................... 25
Silkscreen of Decoding Board Bottom.............................................................................................. 26
PCB Diagram of Decoding Board Top .............................................................................................. 27
PCB Diagram of Decoding Board Bottom ........................................................................................ 28
Appendix 3 Component List..........................................................................29
Component List of Decoding Board............................................................................................. 30-36

3
Safety Instructions
Generally Guide
1. Please check electric circuits before maintenance and change the damaged or over heated components if
short-circuit has been found.
2. Please check all protective devices have been installed well after maintenance, like whether insulation
covering and paper has been installed well or not.
3. In order to avoid electric shock ,please proceed following electrical leakage tests after maintenance.
Low Potential Leakage Testing
Take out power cord from an AC outlet and connect a length of wire between the two leads of the plug.
Use Gear R x 10K of the voltmeter to measure the resistance between shorted-out AC plug and exposed
metallic parts like screw cap, control shaft etc. which shall be infinite.
Picture 1
High Potential Leakage Testing
As shown in Picture 1, connect a resistor of 1.5K, 10W and capacitor of 0.15 uF between exposed metallic
part and well grounded devices (water pipe etc.).
Plug AC power cord directly into the AC socket. Do not use insulated transformer to test.
Use 1000 Ohm/V or more sensitive AC voltmeter to measure AC voltage of the resistor.
Turn over the AC jack and plug into the socket again to iterate the inspection as above.
Inspect the voltage of the resistor between other exposed metallic parts and the earth in the same way.
Any parts’voltage of the resistor should not over 0.75Vrms. A leakage testing machine with voltage over
2,500 V can also be used for this inspection in which case the electric leakage should not be over 0.5mA. When
the leakage exceeds that limit, electric shock may occur. Please check and repair again before hand it over to
users.
4. Protect Electrostatic-Sensitive Devices from Electrostatic Discharge
Some solid states made of semiconductors materials can be easily damaged by commonly static charges,

4
those components are usually called electrostatic-sensitive devices. Such like integrated circuits, laser diodes
and field effect devices. The following tips will help you to reduce the impacts on those components while
electrostatic discharging.
1.Please release static which build-up on human body before handling electrostatic-sensitive devices by
using grounded tools. The antistatic strap which can be found in the market will be a good choice.
2.Please install the electrostatic-sensitive devices on conductor products such as aluminum foil to prevent
static build-up after disassembling from this DVT receiver.
3.The soldering iron must be earthed while soldering and unsoldering the electrostatic-sensitive devices.
4.Only antistatic solder can be used for electrostatic-sensitive devices disassembly. The
electrostatic-sensitive devices will be damaged by static without ESD prevention solder while disassembling.
5.Do not use Freon Volatile which may damage the electrostatic-sensitive devices by discharging static.
6.Do not take the new electrostatic-sensitive devices from the antistatic protection package unless you are
ready for installation. (Most electrostatic-sensitive devices will be packed with anti-static foam, foil or similar
conductive materials. And a lead wire to prevent short circuit.)
7.Please contact the core or circuit parts of the device to be installed with ESD protection package before
carry out the new electrostatic-sensitive devices from it. And make sure no power supply on the device and
remember other precautions.
8.Try to reduce body movements while assembling or disassembling electrostatic-sensitive devices. (Clothes
made of fabrics will build-up static by attrition. Feet lifts up from floor will also build-up static.)

5
Electrical Specifications
A Audio Section （MPEG-1 Layer Ⅱ, R. L Track Output）
No.
ITEM
UNIT
REQUIREMENTS
Test Environment
1
Audio Output Level
V
1.0～2.0
Output impedance is 10KΩ 1KHz 0dB
2
Frequency Characteristics
dB
+1/-2.0
20Hz-60Hz
0.5
60Hz-17.5KHz
+1/-3
17.5KHz-20KHz
3
S/N
dB
≥70
1KHz 0dB weighting
4
L/R Channel Separation
dB
≥60
N-CBAR100.TS f= 1KHz
P-CBAR75.TS
5
L/R Channel Level Difference
dB
≤0.5
60Hz-18KHz
6
Audio THD
%
≤1
60Hz-18KHz
7
Digital Coaxial Output Level
Vp-p
0.520%
75Ω Load
B Video (MPEG-2MP＠ML)
1
Output range
Video
Vp-p
1.015%
75Ω Load
Brightness/RGB
0.7±10%
Sync
0.308%
2
Frequency Characteristics (75Ω)
dB
0.5
0.5-4.8MHz
dB
≤+0.5/-1.0
4.8-5.0MHz
dB
≤+0.5/-4
5.0-5.5MHz
3
Brightness S/N
dB
≥56
WTD 5MHz
4
Chromatic S/N
dB
AM≥58
Load 75
PM≥51
5
Differential gain（DG）
%
≤5
Load 75
6
Differential phase（DP）
°
≤5
Load 75
7
Brightness non-linear distortion
%
≤5
Load 75
8
△τchrominance-luminance delay inequality
ns
≤30
Load 75
9
△K Chrominance-luminance Gain Inequality
%
≤5
Load 75
10
Brightness Waveform Distortion
%
≤3
Load 75
11
Chrominance Subcarrier Offset is not more than
Hz
200
Load 75
C Demodulation
1
Input Frequency Range
MHz
174~230MHz,470～862MHz (VHF/UHF)
2
Input Level Range
dBm
-75～-20
3
Frequency Offset
MHz
-0.4MHz~+0.74MHz
DPower Supply (~100-240V)
1
+5V
mA
1500
5%
2
+5V Active Antenna Amplifier
mA
30
5V overload protection
E Others
1
Free Fall
Meets QJ/ET08.02-2005 Standards
2
Remote Control Distance
M
≥8
In line
≥6
With range of 30°
3
Rated Power Consumption
W
8

6
Mechanical Exploded View Drawing

7
Mechanical Parts List
NO.
Part No.
Part Name
Qty
Notes
1
4110-1842-000H
Face-piece
1
Transparent ABS
2
4111-1842-005H
Bottom Cover
1
ABS
3
2104-1847-300H
Decoding Board
1
4
3211-3008-0016
Screws
ST3x8PTTNi
3
Mainboard/ botton cover

8
Packaging and Accessories

9
Packaging Exploded View Drawing
Material List
Appendix 1 Flowchart and Circuit Diagram
Flowchart
Wiring Diagram
Circuit Diagram of Decoding Board
NO.
Material No.
Name
Qty
1
4401-1656-000H
White Box
1
2
User Manual
1
3
2301-1555-000H
Remote Control
1
4
4413-1812-1100
Bubble Bag 180*210mm
1

10

11

12
Flowchart
Wiring Diagram

13
HDMI
FLASH I/F
16:9_EN [5]
FRONT PANEL I/F
AV I/F
.
R13 20K
TP35
1
STD3V3
USB_UPGR ADE
.
R129
0R
XDDR3_BA2
XDDR3_A9
VDDO XDDR3_BA1 XDDR3_A4 XDDR3_A12 XDDR3_A6 XDDR3_A11 XDDR3_A1 XDDR3_A8
VDDO
.
BC40
100NF
.
BC13
10NF
.BC15
100NF
Ferrite
.
FB8
BLM18HK331SN1D
RN5
47R
1 2
3 4
5 6
7 8
Ferrite
.
FB13
BLM18HK331SN1D .
BC39
100NF
.
BC38
100NF
Ferrite
.
FB11
BLM18HK331SN1D
.
BC14
NC/ 4.7U F
.
BC12
1UF
.
BC51
100NF
.
BC17
100NF
.
BC26
100NF
.
BC68
100PF
.
BC69
100PF
AUDI O_DR
.
BC20
NC/ 4.7U F
PLL POWER
.
R2 68R
Crystal
.
BC1 33PF
.
Y1
27M
Ferrite
.
FB9
BLM18HK331SN1D
XSPLLAVDD
REXT
GPIO17
Ferrite
.
FB6
BLM18HK331SN1D
XOUT
USB_AVDD33TX USB2.0_DM0 USB2.0_DP0
.
BC4
100NF
.
C1
10UF
XSPLLAVSS
.
BC2 33PF
.
BC45
100NF
.
R4
NC/ 1M
XSPLLAVSS
.
BC3
NC/ 4.7U F
STD3V3
XIN
IF_AGC
.
BC42
100NF
RXADC_DVD
.
BC22
10NF
ANT_OVERLOAD
.
BC23 100NF
XRXADC_I P
Ferrite
.
FB1
BLM18HK331SN1D
CH1_N
CH0_P
CLK_N
EDDC _SDA
EDDC _SCL
CH1_P
CH0_N
CH2_N
CH2_P
HTPLG
CLK_PSF_SISF_SI
SF_SOSF_SO
SF_CSSF_C S
XRXADC_I N
SF_SCKSF_SCK C EC
XDDR3_DQ6
XDDR3_DQ0
VDDO
IR
VDDC ORE
XDDR3_DQ11
XDDR3_DQ13
XDDR3_DQ4
XDDR3_DQ2
USB2.0_D M0
USB2.0_D P0
XDDR3_DQ15
XDDR3_A3
XDDR3_BA0
XDDR3_WEJ
VDACOU T4
VDDI O
VDDO
XDDR3_A0
XDDR3_A5
XDDR3_DQM1
XDDR3_DQ9
AUDI O_DL
AUDI O_DR
VDDO
XDDR3_A7
XDDR3_A2
XDDR3_CASJ
XDDR3_RASJ
XVDDCORE_D PLL
+TC2
100UF/ 16V
VDDCORE
XVDDO_CLK
XVSSCORE_DPLL
VDDI O
Ferrite
.
FB7
BLM18HK331SN1D
GPIO122
Ferrite
.
FB10
BLM18HK331SN1D
.
BC25
100NF
.
BC24
100NF
.
BC41
100NF
.
BC43
100NF
GND
DDR II _BA1
XVREFVREF
DDR II _A8
XDDRII _A4 XDDR3_A4
DDR II _A11
XDDRII _BA1 XDDR3_A10
RN1
47R
1 2
3 4
5 6
7 8
.
BC27
100NF
DDR II _CK
.
BC5
100NF
XDDR3_WEJXDDRII _WEJ
XDDR3_A7XDDRII _A3
GND
XDDRII _A0 XDDR3_A12
RN8
0R
1 2
3 4
5 6
7 8 XDDRII _CKJ XDDR 3_CKJ
DDR II _DQM1 XDD R3_DQM1XDDRII _DQM1
DDR II _CASJ
GND
DDR II _CKJ
SF_SCK STRAP_8
DDR II _RASJ
.
BC21
1UF
XDDRII _A9 XDDR3_BA2
DDR II _A12
XDDRII _DQ11 XDDR 3_DQ13
DDR II _WEJ
GND
DDR II _DQ6
DDR II _DQ14
DDR II _DQ12 XDDRII _DQ12 XDDR 3_DQ11
DDR II _BA2
DDR II _DQ1
DDR II _DQ9
DDR II _A9
XDDRII _A12 XDDR3_A9
DDR II _A10
DDR II _A1
DDR II _A3
DDR II _A5
DDR II _DQ4
DDR II _BA0
.
BC44
100NF
DDR II _DQ3
DDR II _DQ11
RN7
47R
1 2
3 4
5 6
7 8
.
BC37
100NF
XDDRII _DQ14 XDDR 3_DQ9
.
R42 47R
RN24
47R
1 2
3 4
5 6
7 8
XDDR3_RASJXDDRII _RASJ
XDDR3_A5XDDRII _A10
XDDR3_BA0XDDRII _BA2
XDDR3_A3XDDRII _BA0
XDDRII _DQ4 XDDR 3_DQ2
XDDRII _DQ6 XDDR 3_DQ0
XDDRII _DQ9 XDDR 3_DQ15
XDDR3_A2XDDRII _A5
XDDRII _CASJXDDR3_C ASJ
XDDR3_A0XDDRII _A1
XDDRII _DQ1 XDDR 3_DQ6
XDDRII _A11 XDDR3_A1
XDDRII _CK XDDR 3_CK
GND
XDDRII _DQ3 XDDR 3_DQ4
GND
XDDRII _DQ13 XDDR 3_DQ8DDR II _DQ13
DDR II _DQM0
XDDRII _A7 XDDR3_A11
XVSSPST_CLK
XDDRII _DQS1 XDDR 3_DQS1
XDDRII _DQM0 XDDR3_D QM0
DDR II _DQ10
DDR II _DQS1
DDR II _DQSJ1
XDDRII _DQS0 XDDR 3_DQS0
XDDRII _DQ10 XDDR 3_DQ14
XDDRII _DQ8 XDDR 3_DQ10DDRII _DQ8
XDDRII _DQ15 XDDR 3_DQ12
XDDRII _DQSJ 0 XDD R3_DQSJ 0
XDDRII _DQSJ 1 XDD R3_DQSJ 1
DDR II _DQSJ0
DDR II _DQS0
XDDRII _A8 XDDR3_A8
DDR II _DQ15
XDDR3_A10
DDR II _A0
DDR RS
GND
.
BC84
100NF
VDACOUT4
.
BC78
100NF
.
BC83
100NF
.
BC74
100NF
.
BC86
100NF
place on Top layer，
close to Chip/0402
VDDO
.
BC16
100NF
.
BC70
100NF
.
BC10
NC/ 100NF
DDRII
DDR II _DQS[0. .1]
DDR II _RASJ
DDR II _BA[0.. 2]
DDR II _CASJ
DDR II _CKJ
DDR II _DQM[0.. 1]
DDR II _WEJ
DDR II _DQSJ[ 0..1]
DDR II _CKJ
DDR II _A[0.. 12]
VREF
DDR II _CK
DDR II _DQ[0. .15]
DDR II _DQS[0. .1]
VREF
DDR II _CK
DDR II _WEJ
DDR II _BA[0.. 2]
DDR II _A[0.. 12]
DDR II _RASJ
DDR II _CASJ
STD3V3
DDR II _DQM[0.. 1]
DDR II _DQSJ[ 0..1]
DDR II _DQ[0. .15]
VDDC ORE
XSPLLAVSS
XRXADC_I P
XRXADC_I N
XIN
RXADC_DVD
STD3V3 VDDO
XOUT
PMU_VDDI O
XSPLLAVDD
VDDC ORE
STD3V3
VDDO
STD3V3
VDDC ORE
CEC [4]
SF_SO[4,5]
SF_SCK[4, 5]
SF_SI[4, 5] CLK_P [ 4]
SF_CS[4]
CH0_P [ 4]
CLK_N [4]
DDR II _A4
CH1_P [ 4]
EDDC _SDA [ 4]
CH2_N [ 4]
CH1_N [ 4]
EDDC _SCL [ 4]
CH2_P [ 4]
HTPLG [4]
CH0_N [ 4]
GND
MUTE [4,6]
VDACOU T4 [6]
XDDRII _DQ5 XDDR 3_DQ5
XDDRII _DQ0 XDDR 3_DQ3
DDR II _DQ7
XDDRII _DQ2 XDDR 3_DQ1DDR II _DQ2
AUDI O_DL [ 6]
AUDI O_DR [ 6]
XDDRII _A2 XDDR3_BA1
DDR II _A7
DDR II _DQ5
DDR II _DQ0
XDDRII _DQ7 XDDR 3_DQ7
DDR II _A2
DDR II _A6 XDDRII _A6 XDDR3_A6
USB2.0_D P0 [4]
RN27
47R
1 2
3 4
5 6
7 8
USB2.0_D M0 [4]
IRRX [8]
RXADC_QN [7]
RXADC_QP [7]
IF_AGC [ 7]
XVREF GND
STRAP_19 [4,6]
ANT5V_ON_OFF [ 7]
STRAP_14 [4,6]
STRAP_4 [4,5]
STRAP_8 [4,5]
STRAP_18 [4,5]
VDDIO-5A
EDDC_SDASTRAP_1 HTPLG EDDC_SCLSTRAP_2
S3821-LQFP128-0516
U1
XUSB_DM[0] 1
XUSB_DP[0] 2
XAVDDUSBTX 3
REXT 4
XVDDIO 5
GPIO[14]/XSPD IF _OUT 6
GPIO[15]/PM U_U ART_XUART _RX 7
GPIO[16]/PM U_U ART/XUAR T_T X 8
GPIO[17] 9 XGPIO_2 10
XDFT_TM 11
XDFT_SE 12
XVDDCORE 13
XPMU_DOCD _DAT AI/GPIO[26] /XH DM I_HTPG 14
XPMU_DOCD _DAT AO/GPIO[27]/ XI2C _SDA 15
XPMU_DOCD _CLK/ GPIO[28]/XI 2C_SC L 16
XHDMI_C LK_N 17
XHDMI_C LK_P 18
XHDMI0_N 19
XHDMI0_P 20
XHDMI1_N 21
XHDMI1_P 22
XHDMI2_N 23
XHDMI2_P 24
XVD11_TX 25
XVD33_DRV 26
XVDAC_OUT1 27 XVDAC_OUT2 28
XVDAC_VDDA 29
XVDAC_OUT3 30 XVDAC_OUT4 31
XADAC_OL_P 32
XADAC_VREF
33
XADAC_OR_P
34
XVDD_ADAC_1
35
XVDDCORE
36
XBA[2]
37
XMA[9]
38
XDDR3_RESETJ
39
XMA[2]
40
XMA[7]
41
XVDDO
42
XMA[0]
43
XMA[5]
44
XMA[3]
45
XBA[0]
46
XWEJ
47
XODT
48
XSCASJ
49
XSRASJ
50
XVDDO_RX
51
XVREF
52
XVDDCORE
53
XMD[4]
54
XMD[2]
55
XMD[6]
56
XMD[0]
57
XVDDO_RX
58
XMD[11]
59
XMD[13]
60
XMD[9]
61
XMD[15]
62
XDQM[1]
63
XVDDO_RX
64
XDQS[0]
65
XDQSJ[0]
66
XDQS[1]
67
XDQSJ[1]
68
XVDDO_RX
69
XMD[12]
70
XMD[10]
71
XMD[14]
72
XMD[8]
73
XDQM[0]
74
XVDDCORE
75
XMD[7]
76
XMD[3]
77
XMD[5]
78
XMD[1]
79
XVDDO_RX
80
XMA[12]
81
XBA[1]
82
XMA[4]
83
XVDDO
84
XMA[6]
85
XMA[8]
86
XMA[1]
87
XMA[11]
88
XMA[10]
89
XVSSPST_CLK
90
XDCLKOJ
91
XDCLKO
92
XVDDO_CLK
93
XVDDCORE_D PLL
94
XVD33_DPLL
95
XVDDCORE
96
XSF_CSJ 97
XSF_SCLK 98
XSF_MOSI 99
XSF_MISO 100
XVDDCORE 101
XGPIO[96] 102
XGPIO[99] 103
XVDDIO 104
GPIO[108] /XSC_PRESJ /XEJ_TRSTJ 105
GPIO[111] /XSC_RST/XEJ_TDI 106
GPIO[113] /XSC_DATA/XEJ_TDO 107
GPIO[115] /XSC_CLK/ XEJ_TMS 108
XVDDCORE 109
GPIO[117] /XSC_POWEN J/XEJ_TCLK 110
GPIO[122] /XIF_AGC _QAM 111
XP_CRSTJ 112
GPIO[128] XPMU_GPI O[0] 113
GPIO[129] /XPMU_GPIO[1] 114
XPMU_DOW N 115
XIR_RX 116
GPIO[135] /XPMU_CEC 117
GPIO[130] /XPMU_GPIO[2] /XI2C3_SDA 118
GPIO[131] /XPMU_GPIO[3] /XI2C3_SCL 119
GPIO[130] /XPMU_GPIO[2] /IF _AGC 120
XPMU_VDD IO 121
XP_X27I N 122
XP_X27OU T 123
XSPLLAVSS 124
XSPLLAVDD 125
XRXADC_D VD 126
XRXADC_I P 127
XRXADC_I N 128
DW 129
DW 130
EPAD 131
EPAD 132
GPIO96
STD3V3
DDR POWER
ADAC_VD D
TCLKTCLK
STRAP_14
STRAP_4
STRAP_8
STRAP_19
STRAP_18
VDAC3V3
SF_SI STRAP_18
XVSSPST_CLK
I2C-SD A3
I2C-SC L3
I2C-SD A3 [7]
I2C-SC L3 [7]
I2C-SD A3
I2C-SC L3
IF_AGC
CEC
bottom
UART0_TXSTRAP_16 UART0_RXSTRAP_0
CLK_P CLK_N CH0_N CH0_P
VD33TMDS XVD11_TX
CH2_N CH2_P CH1_P CH1_N
XVREF_AUD
.
R14
15K
REXT
USB
Ferrite
.F B5
BLM18HK331SN1D
USB_AVDD 33TX
.
BC11
100NF
STD3V3
.
C70
10UF
Video DAC
.
R124 0R
.
C6
NC/ 4.7U F
XVREF_AUD
.
C5
4.7UF
.C7
100NF
STD3V3 TVDAC3V3
VDAC3V3
.
BC18
100NF
.
R125 0R ADAC _VDD
.
C4
NC/ 4.7U F
Audio-DAC POWER
STD3V3
ADAC_VD D
SF_CS STRAP_3
SF_SO STRAP_4
USB
IR
CPUR STJ
PMU_STANDBY
XVDDCORE_D PLL XVDDO_CLK XDDR3_CK XDDR3_CKJ
5V_AMP
ANT_OVERLOAD
STRAP PIN
VDDO
STRAP94 [4,5]
STRAP94
VDDI O-5A
TUNER I/F
VDDC ORE
VIDEO
VDD33_DPLL
USB_UPGRADE
GPIO17STRAP_14
AUDIO_DL
VDDC ORE
RXADC
GPIO122STRAP94
16:9_EN
F_STANDBY [ 3,6, 8]
F_STANDBY
UART
.
R3 4.7K
UART0_RX
.
R1 4.7K
CN1
CON1X4(P2.0MM)
1
2
3
4
UART0_TX
XVREF
XVD11_TX
System Reset
.
BC7
1UF
XVSS33_HDMI
.
R11 20K
.
R12 10K
Ferrite
.F B2
BLM18HK331SN1D
HDMI POWER
VD33TMDSVD33TMDS
.
BC6
100NF
CPUR STJ
DFT_TM
.
BC8
100PF
PMU_VDDI O
VDD33
STD3V3
VDDO XDDR3_DQ12 XDDR3_DQS1 XDDR3_DQSJ 1 VDDCORE
.
R10 0R F_STAND BY [3, 6,8]
PMU_STANDBY
XDDR3_DQ14 XDDR3_DQ10 XDDR3_DQSJ 0 XDDR3_DQS0 VDDO
PMU power
F_STANDBY
XDDR3_DQ5 XDDR3_DQ1 XDDR3_DQ3 XDDR3_DQ7 XDDR3_DQM 0 XDDR3_DQ8
ANT_OVERLOAD [7]
VDD33_D PLL
VSS33_DPLL
TMS
TRSTJ
VDDC ORE
TDO
TDI
DDR3
.
R7
NC/ 10K
.
R8
4.7K/N C
TCLK
TMS
TDO
.
R5
10K
.
R9
33R
.
R6
10K
TRSTJ
TDI
CN2
CON1X6(P2.0MM)
1
2
3
4
5
6
STD3V3
EJTAG Connector
DDR RS
VDDCORE
DFT_SESTRAP_19 TV_MOD E
DFT_TM 16: 9_EN
Decoding Board Schematic Diagram (1)

14
STRAP_4
STRAP_8
STRAP_14
STRAP_19
STRAP_8
STRAP_4
STRAP_18
CH0N C H0_N
.
C8
2.2UF
VREF
.
BC90
NC/ 100NF
.
BC89
NC/ 100NF
.
BC82
100NF
.
BC81
100NF
.
BC94
NC/100NF
.
BC9
100NF
.
BC92
NC/ 100NF
.
BC72
100NF
.
BC95
NC/ 100NF
.
BC91
NC/ 100NF
.
BC75
100NF
VDDO
.
BC85
100NF
+
EC2
100UF/ 16V
.
BC53
100NF
.
BC73
100NF
.
BC71
100NF
.
BC93
NC/ 100NF
.
BC
NC/100NF
place on bottom layer，
close to DDR/0603
place on Top layer，
close to DDR/0402
.
BC76
100NF
.
BC87
4.7UF
.
BC80
100NF
.
R341K
.
R16470R
.
BC79
100NF
.
R40
1K/1%
.
R3310K
.
BC77
100NF
.
R3510K
.
BC88
4.7UF
.
R38
1K/1%
NT5TU32M16DG-BE
U5
VDD
A1
NC
A2
VSS A3
VSSQ A7
UDQS
A8
VDDQ
A9
DQ14
B1
VSSQ B2
UDM
B3
UDQS
B7
VSSQ B8
DQ15
B9
VDDQ
C1
DQ9
C2
VDDQ
C3
VDDQ
C7
DQ8
C8
VDDQ
C9
DQ12
D1
VSSQ D2
DQ11
D3 DQ10
D7
VSSQ D8
DQ13
D9
VDD
E1
NC
E2
VSS E3
VSSQ E7
LDQS
E8
VDDQ
E9
DQ6
F1
VSSQ F2
LDM
F3
LDQS
F7
VSSQ F8
DQ7
F9
VDDQ
G1
DQ1
G2
VDDQ
G3
VDDQ
G7
DQ0
G8
VDDQ
G9
DQ4
H1
VSSQ H2
DQ3
H3 DQ2
H7
VSSQ H8
DQ5
H9
VDDL
J1
VREF J2
VSS J3
VSSDL J7
CK J8
VDD
J9
CKE K2
WE K3
RAS K7
CK K8
ODT K9
NC, BA2
L1
BA0
L2
BA1
L3
CAS L7
CS L8
A10/AP M2
A1 M3
A2 M7
A0 M8
VDD
M9 VSS N1
A3 N2
A5 N3
A6 N7
A4 N8
A7 P2
A9 P3
A11 P7
A8 P8
VSS P9 VDD
R1
A12 R2
NC, A14 R3
NC, A15 R7
NC, A13 R8
VDDO
DDR II_D QS[0. .1]
VDDO
VDDO
DDR II_C K
DDR II_C KJ
DDR II_D Q[0. .15]
DDR II_W EJ
DDR II_C ASJ
DDR II_A[ 0.. 12]
VREF
DDR II_D QM[0.. 1]
DDR II_R ASJ
DDR II_BA[ 0.. 2] DDR II_C KE
(1066)
DDR II_D QSJ[ 0..1]
DDR II_C K
DDR II
DDR II_OD T
DDR II_BA[ 0.. 2]
DDR II_D QSJ[ 0..1]
DDR II_D QS[0. .1]
DDR II_C KJ
DDR II_D QM[0.. 1]
DDR II_W EJ
DDR II_C KJ
DDR II_C SJ
CLKN CLK_N
DDR
DDR II_A[ 0.. 12]
DDR II_R ASJ
DDR II_D Q[0. .15]
DDR II_C ASJ
VREF
DDR II_C K
DDR II_D Q15
DDR II_D Q11
DDR II_D Q8
DDR II_D Q5
DDR II_D Q2
DDR II_D Q14
DDR II_BA0
DDR II_D Q3
DDR II_D Q10
DDR II_D Q9
DDR II_D Q6
DDR II_D QSJ0
DDR II_D QM1
DDR II_D Q13
DDR II_D Q12
DDR II_BA2
DDR II_D Q0
DDR II_D Q4
DDR II_D Q1
DDR II_D QM0
DDR II_D QSJ1
DDR II_D Q7
DDR II_BA1
DDR II_A2DDR II_A2
DDR II_A11DDR II_A11
DDR II_D QS0
DDR II_A0DDR II_A0
DDR II_W EJ
DDR II_D QS1
DDR II_A6DDR II_A6
DDR II_A10DDR II_A10
VREF
DDR II_A8DDR II_A8
DDR II_A5DDR II_A5
DDR II_C ASJ
DDR II_A7DDR II_A7
DDR II_A4DDR II_A4
DDR II_A12DDR II_A12
DDR II_A1DDR II_A1
DDR II
DDR II_A9DDR II_A9
DDR II_R ASJ
DDR II_A3DDR II_A3
STRAP[14] _EROM_Enable
0: EROM_disable
1: EROM_Enable (default)
STRAP[8] _CPU_CLK_SEL
{XSF_SCLK}
0,675MHz;(default)
STRAP[18] _SF_Boot Enable
{XSF_MOSI}
0: Sflash boot (default)
STRAP[19] _CPU Probe En
0: Probe disable(Default)
1: Probe enable
STRAP[4] _DRAM clock selection
{XSF_MISO}
0: 528M(default)
USB_5V
.
R39
1.8K
E3
CS0806S
1
1
10 10
22 99 44 77 55 66
3
3
8
8
.
R41
1.8K
.
R43 1.4K/ NC
.
BC67
100NF
.
R45 33R
.
R20 4.7K
.
R25 4.7K
USBPWR 0
E2
CS0806S
1
1
10 10
22 99 44 77 55 66
3
3
8
8
.
R17 4.7K
J2
HDMI
DETECT 19
+5V 18
GND 17
SDA 16
SCL 15
NC. 14
CEC 13
CLOCK- 12
GND 11
CLOCK+ 10
DATA_0- 9
GND 8
DATA_0+ 7
DATA_1- 6
GND 5
DATA_1+ 4
DATA_2- 3
GND 2
DATA_2+ 1
GND
20 GND 21 GND 22 GND 23
.
R18 30K
E6
CS0801S
1
122
J1
USB1(A TYPE)
5V
1
DM
2
DP
3
GND
4
G1
5G2 6
.
R46 0R
STRAP94 [4,5]
STRAP94
STRAP94
.
R50 4.7K
.
R48 NC /4.7K
.
R47
10K
.
R21 4.7K
E5
CS0801S
1
122
SF_SCK
.
R30 4.7K
.
R29 4.7K
.
BC46
100NF
.
R64 4.7K
.
R44 33R
U3
GD25Q32BSIG
CS#
1
SO
2
W#
3
GND
4SI 5
SCK 6
HOLD# 7
VCC 8
.
R23 4.7K
STD3V3
SF_SI
SF_SO
SF_WJ
SF_HOLD J
JP1
1 2
.
R19 NC /4.7K
CK1
NC/ COMMOM CHOKE
1
122
4
433
SF_CS
.
R15 NC /4.7K
HDMI5V
STD3V3
EDDC _SDA[3]
CH2_P[ 3]
CLK_N[ 3]
CH2_N[3]
HTPLG[3]
EDDC _SCL[ 3]
CH0_N[3]
CLK_PCLKP
CH0_P[ 3]
CLK_P[3]
CH1_P[ 3]
CEC[3]
CH1_N[3]
USB2.0_D P0[3]
USB2.0_D M0[3]
EDDC _SCL
EDDC _SDA
CH2P C H2_P
CH2_NCH2N
STRAP_14 [3,6]
STRAP_19 [3,6]
STRAP_8 [3,5]
STRAP_4 [3,5]
STRAP_18 [3,5]
CH1_N
CH2_N
CH1_P
HTPLG
CLK_P
CH2_P
CH0_P
CEC
HTPLG
EDDC _SDA
CLK_N
EDDC _SCL
CH0_N
CH0P C H0_P
CH1P C H1_P
CH1N C H1_N
CLKN CH0N
D_HTPLG
CLKP
CEC
CH1P
CH2P
CH1N CH0P CH2N
USB0-DT
.
R49 0R
.
R68 0R
L34 NC/ FB60R/ 0805
F_STANDBY
STD5V
USB_5V
C73
0.1uF
R92
47K
R69 47K
+
C67
220uF/10V
R74 100R
C10
0.1uF
C220.1uF
SF_SO [3, 5]
SF_SCK [ 3,5]
SF_SCK
U17
SY6288A
OUT
1
GND
2
OCB
3
EN 4
IN 5
SF_SI [3, 5]
SF_CS [ 3]
SF_SI
SF_CS
SF_SO
USB2.0_D P0-DTUSB2.0_D P0
USB 0
JUMPER2 不插 为LCPU_PROBE_EN:default L
STRAP_18
STRAP_19
STRAP_14
Strap_Pin
STRAP[94] _SF_work mode
{XGPIO_8}
0:Normal
Receptacle
HDMI
USB2.0_D M0-DTUSB2. 0_DM0
SFLASH
Decoding Board Schematic Diagram (2)

15
RCA_L_OU T C162
47PF
GND
IO_Mute:0-Mute,1-On
Vout/Vin=-RA20/RA24=-RA29/RA30
AUDIO AMP
AUDI O_DL
AUDI O_DR
AUDI O_DR
MUTE
AUDI O_DL
MUTE
UVP>1.15V
EN>1.2V
UA1
SGM8905
-INR
1
OUTR
2
EN
3
PVSS
4
CN
5CP 6
PVDD 7
UVP 8
OUTL 9
-INL 10
GND
11
.
RA8
9.1K .
CA5
0.33UF
.
RA16 1K
.CA6
2.7NF
.
RA15
620R
R252
10K/NC
12
C209
1000pF
12
RCA_R _OUT
RCA JACK
CVBS_OUTPUT
RCA_L_OU T
JK2
AV3-8.3-11
6
2
1
4
3
5
.
RA9
620R
.
RA4 1K
+ECA1
100UF/ 16V
R253
10K/NC
12
C210
1000pF
12
.
RA17
2K
.
CA11
2.7NF
.
RA10 330R
.
CA4
2.2UF /16V
.
RA7
1.2K
.
RA2 330R
.
RA1
0R
.
RA12
100k
.
RA6
100k
.
RA5
24K
.
CA10
2.2UF /16V
RCA_R _OUT
.C A8
150PF
.
CA7
0.33UF
.
CA2
150PF
.
RA13
24K
.
RA14
9.1K
.
CA1
100NF
STD5V 5V_AMP
AUDI O_DR [ 3]
MUTE [3,4]
AUDI O_DL [ 3]
MUTE [3,4]
.
EV2
ESD5B5V
TV_SB
CVBS_OUTPUT
.
RV1 75R .
EV1
ESD5B5V
+
ECV1
330UF/ 16V
1 2
.
RV2
100K
VDACOU T4[3]
Video
CVBS
TV_M ODE
RGB OUT ( 1-3V)
STB StandBy
1
GPIO
0
CVBS OUT (0V) 0
MODE
P12V
F_STANDBY Q17
2N3904
1
2 3
16:9_EN Q18
2N3904
1
2 3
HIGH: 16:9 OUT(5-8V)
R131
10K
R141
1K
LOW: 4:3 OUT(9.5-12V)
R144 10K
R145
1.8K
F_STANDBY[3,4]
STD12V
Q22
2N3906
1
2 3
TV Drive CTRL
R146
10K
RCA_R _OUT
RCA_L_OU T
16:9_EN
TV_SB
16:9_EN
CVBS_OUTPUT
0
16/9EN
GPIO
(4.5V~7V)
0
TV (0V)
MODE
16:9
TV_DRIVE
JK3
NC/ D21-15(金佳 电子 )TV-SCART
AOR
1
AIR
2
AOL
3
GND
4
GND
5
AIL
6
B
7
FUNC
8
GND
9
DATA 2
10
G
11
DATA 1
12
GND
13
GND
14
R
15
RGB C
16
GND
17
GND
18
VOUT
19
VIN
20
SHIELD
21
GND
22
GND
23
AV
X
1
default
1
0(9.5V~12V)
Decoding Board Schematic Diagram (3)

16
AGC
QN
Close Demod
75 ohm Line
QP
I2C-SD A3
RXADC_QN
Wifi filter
I2C-SC L3
ANT5V_ON_OFF
TUNER INTERFACE
RXADC_QP
IF_AGC
RXADC_QN
.
CT30
100NF
.
CT35
10NF
.
LT3
150nH
.
CT17
1NF
Ferrite
.F B29
SZ1608K102TF
LOOP
LT5 assemble for tuner loop
throngh when standby mode.
LT6 assemble for tuner without
loop throngh when standby
mode.
.
LT6
SPH4012H220MT(22UH)/ NC
.
CT31
100NF
+ECT2
100UF/ 16V/NC
12
RF_3V3
STD3V3
.
C51
4.7UF /10V
RFIN
Q5
MMBT3906
1
23
R184
100K
12
R185
1K
12
R191
10K
12
R189
10K
1 2
Q2
SS8550/PNP/ SOT23
3
1
2
R181
2R2 /0805 R183
1K
1 2
R187
10K
12
C114
100nF/10V
Q3
MMBT3904
32
1
R186
10K
12
GND
STD5V
ANT_OVERLOAD
STD3V3
LOOP
ANTENA 5V CONTROL
ANT5V_ON_OFF
R195
10K
J6
RF_TUN ER
3
4
5
6
2
1
RFIN
GND
I2C-SD A3
I2C-SC L3
I2C-SD A3 [7]
I2C-SC L3 [7]
Title
Size Document N umber Rev
Date: Sheet of
DB-M3821-01V02 V1.02
TUNER
C
6 9Friday , Nov ember 07, 2014
.
RT11
0R
.
RT1
0R
.
CT19
100NF
.
RT9 330R
.
CT9
1NF
Ferrite
.
FBT1
BLM18HK331SN1D
.
CT14
100NF
.
CT6
100NF
.
LT2
1.8NH
.
CT20
NC/ 12PF
.
CT28
10NF
.
RT12
1K/NC
.
RT13 10K
.
LT1
12NH
.
CT16
150PF
.
RT14 200R
TT1
BW21S7511A01TF
12 43
.
CT13
100NF
.
CT25
100NF
.
CT11
2.7PF
.
RT3
4.7K
.
CT29
1UF
UT1
MXL603
GND1
1
LNA_IN P
2
LNA_IN N
3
VDD_1p8_1
4
GPO
5
AGC
6
AS
9
RESET_N
10
VDD_3p3_2
11
VDD_1p8_2
12
VDD_1p2 13
GND_D IG 14
VDD_I O 15
SCL 16
SDA 17
CLK_OUT 18
XTAL_N 19
XTAL_P 20
VDD_1p8_3 21 VDD_3p3_1 22
LT_AC_GND 23
LT_OUT 24
GND2 25
IF_OUTP
7
IF_OUTN
8
.
CT23
NC/ 12PF
.
CT10
4.7NF
.
CT2
15PF
.
CT15
150PF
.
CT22
NC/ 12PF
.
RT8 470K
.
CT26
100NF
.
RT6 100R
.CT8
NC/ 33PF
.
YT1
16M
.
RT4 100R
.
CT27
100NF
.
CT1
15PF
.
CT12
1NF
.
RT10
1K
ET2
BAV99
1 2
3
.
RT2
4.7K
.
CT18
100NF
.
RT7 330R
.
CT5
100NF
.
CT4
560PF
.
CT21
NC/ 12PF
.
CT24
1UF
STD3V3
RF_3V3
RF_3V3
RF_3V3
RF_3V3
RF_1V8
RF_1V8
RF_3V3
RF_1V8
ANT5V_ON_OFF [ 3]
RXADC_QN [3]
RXADC_QP [3]
IF_AGC [ 3]
.
LT4
NC/ 82NH
Ferrite
.FB30
BLM21PG601SN1D
RXADC_QP
Tuner-SCL
AGC
IF AGC
IF_AGC
Low-pass filter for filtering
PWM signal from demod
ANT power control
Tuner-SDA
Ferrite
.
FBT2
BLM18HK601SN1D
Decoding Board Schematic Diagram (4)

17
LED5
G/R
.
R110
0R/NC
Q7
2N3904
1
2 3
Must short the jumper when use IR.
.
R107
33K
.
C17
330PF
IR1
IRM-3638T
OUT 1
GND 2
VCC 3
IRRX
.
R112
10K
Q6
2N3904
1
2 3
VDD33
VDD33
IRRX[3] POWER ON
LED
STANDBY
IR
IRRX
F_STANDBY[5] F_STANDBY
.
R111 10K
.
C16
1UF
.
R108
180R
.
R109
180R
MK6
FIDUCIAL
1
MK11
FIDUCIAL
1
MK10
FIDUCIAL
1
MK12
FIDUCIAL
1
F_STANDBY
Decoding Board Schematic Diagram (5)

18
L28
FB60R/ 0603
DEN-3V3
.
R117
100K
.
C19
100NF
Q10
SI2323DS
1
32
Q11
2N3904
1
2 3
.
CP4
100NF
.RP7
100K
Q8
SI2323DS
1
32
.
R114
100K
.
RP4
51K/1%
.
C26
100NF
.
C27
100NF
.
RP6
62K/1%
.
CP5
0.47UF
.
R119 10K
.
C20
1UF
.
CP2
10UF/ 10V
.
R116
10K
.
CP1
2.2UF /10V
DDR POWER
VDDCORE=1.15V
.L3
10UH
+EC1
220UF/ 16V
12
.
C18
1UF
Ferrite
.
FB26 BLM21PG331SN1D
.
R113
2K
Ferrite
.
FB25 BLM21PG331SN1D
.
C25
100NF
.
R115
10K
Q9
2N3904
1
2 3
.
R118
10K
.C21
100NF
5VVDD 33
P5V
P3V3
HDMI5VSTD5V
5V
STD3V3
VDD33
VDDC ORE
P5V
Ferrite
.FB28
BLM21PG601SN1D
.
CP7
100NF
.
RP9
1M/1%/NC
IO POWER
PGND
.
CP12
4.7UF /10V
.
RP21
68K/1%
.
RP19
1K
UP2
APS2408
EN
1
GND
2
LX 3 VIN
4
FB 5.
CP13
22PF
.
L6
2.2UH .
CP14
100NF +EC3
220UF/ 16V
12
.RP22
2K
.
RP20
300K/1%
.
CP16
100NF
.
CP15
10UF/ 10V
PGND
PGND
P3V3
P5V
PGND
PGND
PGND
PGND
.
RP23
1.6M/1%
TP37
Test Pin
1
.
BC162
4.7UF
U16
LD1117
IN
3
ADJ/GND
1
OUT 2 OUT 4
.
BC142
0.1UF
STD3V3
.
BC161
10UF
VDDO=1.80V
VDDO
U8
AP2972
BS 1
GND
2
FB 3 EN
4
IN
5LX 6
TC19
100UF/ 10V/N C
GND
NC
5V
GND
12V
3.3V
GND
GND
GND
STANDBY _CON TROL
.
D1
1N4148
DEN-3V3
STANDBY _CON TROLF_STAND BY
F_STANDBY[5]
STANDBY POWER
.
R820 1K
CORE POWER
There is leatage current from
PMU 3V3 to STD3V3, this
leatage voltage maybe cause
SY8009 can not shut down at
standby, so need a series
diode to solve this issue.
5V_AMP
Decoding Board Schematic Diagram (6)

19
P12V
PD8
SB360/DO-27
PT3
KB1341-22093
1
3
4
5
6
7
8
9
10
2
PD10
FR104/DO-41/NC
PT2
KB1341-11863A
1
3
4
5
6
7
8
9
10
2
SCREW1
.
1
SCREW2
.
1
SCREW3
.
1
PR1
100K/2W
PC2
2.2nF /630V_tery lene
PDZ1
ZMM5255_24V_1/2W
PD7
FR107/DO-41
PR4
330R
PC1
222/400VAC
PR8
10K
！
PR3
330R
EC17
4.7uF/400V/105C
PR9
200K
PL2
15uH/2A
C81
100nF/16V
PR7
10K
PC5
100nF/10V/0402
U15
TL431/TO-92
1
2 3
PD9
FR104/DO-41
PR2
22R/0603
P5V
！
！
！
U13
PN8136/DIP8
GND
1
VDD
2
CTRL
3
COMP
4NC 5
NC 6
SW 7 SW 8
P5V
PC4
104/50V/0603
EC4
1000uF/10V/105C
P5V
PD6
SB360/DO-27/NC
C82
100nF/16V
EC5
1000uF/10V
PC3
27nF/25V/0603
！
+
EC7
10uF/50V/105C
！
！
！
PX1
3P/3.96
1 2
PL1
UU9.8_68mH±20%
1
32 4
F2
T1AL250V
PR6
10K
PD1
IN4007/DO-41
PD2
IN4007/DO-41
IN4007/DO-41
PD4 PD3
IN4007/DO-41
U14
BPC-817B
1
23
4
EC18
10uF/400V/105C
+
EC8
100uF/25V/NC
PR10
1K
Decoding Board Schematic Diagram (7)

20