Endace DAG 9.2X2 User manual

DAG 9.2X2 Card User Guide
EDM01-36

EDM01-36v10 DAG_9.2X2_Card_User_Guide
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Protection Against Harmful
Interference
When present on equipment this document pertains
to, the statement "This device complies with part 15
of the FCC rules" specifies the equipment has been
tested and found to comply with the limits for a Class
A digital device, pursuant to Part 15 of the Federal
Communications Commission [FCC] Rules.
These limits are designed to provide reasonable
protection against harmful interference when the
equipment is operated in a commercial environment.
This equipment generates, uses, and can radiate
radio frequency energy and, if not installed and used
in accordance with the instruction document, may
cause harmful interference to radio communications.
Operation of this equipment in a residential area is
likely to cause harmful interference in which case the
user will be required to correct the interference at
their own expense.
Extra Components and Materials
The product that this manual pertains to may include
extra components and materials that are not essential
to its basic operation, but are necessary to ensure
compliance to the product standards required by the
United States Federal Communications Commission,
and the European EMC Directive. Modification or
removal of these components and/or materials, is
liable to cause non compliance to these standards,
and in doing so invalidate the user’s right to operate
this equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure
accuracy, neither Endace Technology Limited nor any
employee of the company, shall be liable on any
ground whatsoever to any party in respect of
decisions or actions they may make as a result of
using this information.
Endace Technology Limited has taken great effort to
verify the accuracy of this document, but nothing
herein should be construed as a warranty and Endace
shall not be liable for technical or editorial errors or
omissions contained herein.
In accordance with the Endace Technology Limited
policy of continuing development, the information
contained herein is subject to change without notice.
Website
http://www.endace.com
Copyright 2010 - 2012 Endace
Technology Ltd. All Rights reserved.
No part of this publication may be reproduced, stored
in a retrieval system, or transmitted, in any form or
by any means electronic, mechanical, photocopying,
recording, or otherwise, without the prior written
permission of Endace Technology Limited.
Endace, the Endace logos, and DAG, are trademarks
or registered trademarks in New Zealand, or other
countries, of Endace Technology Limited. All other
product or service names are the property of their
respective owners. Product and company names used
are for identification purposes only and such use does
not imply any agreement between Endace and any
named company, or any sponsorship or endorsement
by any named company.
Use of the Endace products described in this
document is subject to the Endace Terms of Trade
and the Endace End User License Agreement (EULA).

EDM01-36v10 DAG_9.2X2_Card_User_Guide
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Contents
Introduction 1
The Purpose of this User Guide................................................................................................................ 1
Overview ................................................................................................................................................ 2
Card features.......................................................................................................................................... 2
System requirements............................................................................................................................... 3
General ............................................................................................................................................... 3
Operating system ................................................................................................................................. 3
Warning - thermal trip ............................................................................................................................. 3
Card description...................................................................................................................................... 4
DO NOT REMOVE THE BATTERY ........................................................................................................... 4
Card architecture .................................................................................................................................... 5
Line types............................................................................................................................................... 5
Supported Line Types........................................................................................................................... 5
Extended functions.................................................................................................................................. 6
Enhanced Packet Processing v2............................................................................................................. 6
Inline forwarding.................................................................................................................................. 7
Timed Release TERF (TR-TERF) ............................................................................................................ 7
Triggered Timed Release TERF (TR-TERF) ............................................................................................. 7
Installation 9
DAG software package ............................................................................................................................ 9
PCIe Gen 2.0 Slot.................................................................................................................................... 9
Inserting the DAG card .......................................................................................................................... 10
Ports and Status LEDs ........................................................................................................................... 11
Boot jumper settings ............................................................................................................................. 11
Boot LEDs............................................................................................................................................. 12
Pluggable optical transceivers ................................................................................................................ 13
Overview ........................................................................................................................................... 13
Optical modules ................................................................................................................................. 13
Power input ....................................................................................................................................... 14
Splitter losses..................................................................................................................................... 14
Pluggable copper transceivers................................................................................................................ 14
Configuring the DAG card 15
Introduction.......................................................................................................................................... 15
Firmware images................................................................................................................................ 15
Resetting DAG card to Operational Settings ......................................................................................... 15
Differences between Windows and Linux installs .................................................................................. 16
Accessing DAG tools in Windows ......................................................................................................... 16
Before configuring the DAG card ......................................................................................................... 17
daginf................................................................................................................................................ 18
dagdetect .......................................................................................................................................... 18
Setting up the FPGA .............................................................................................................................. 19
Selecting the firmware image to load at power up ................................................................................ 20
Loading new firmware images onto a DAG Card................................................................................... 20
Programming the FPGA ...................................................................................................................... 20
dagrom.............................................................................................................................................. 21
Preparing the DAG card for use.............................................................................................................. 22
DAG card Configuration and Status ........................................................................................................ 23
Display Current Configuration ............................................................................................................. 23
dagconfig tokens explained................................................................................................................. 25
dagconfig options............................................................................................................................... 33
Viewing the DAG card status.................................................................................................................. 34
Interface Status ................................................................................................................................. 34
Universal counters.............................................................................................................................. 35

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Using your DAG card 37
Introduction ..........................................................................................................................................37
Basic data capture .................................................................................................................................37
Starting a capture session ...................................................................................................................37
dagsnap .............................................................................................................................................38
Capturing data at high speed...............................................................................................................39
Viewing captured data ...........................................................................................................................40
dagbits...............................................................................................................................................40
dagbits tests .......................................................................................................................................42
Converting captured data .......................................................................................................................43
dagconvert .........................................................................................................................................43
Using third party applications .................................................................................................................47
Transmitting captured data ....................................................................................................................47
Configuration......................................................................................................................................47
Explicit packet transmission .................................................................................................................47
Trace files ..........................................................................................................................................48
TR TERF .............................................................................................................................................48
Synchronizing clock time 51
Overview...............................................................................................................................................51
DUCK configuration................................................................................................................................51
Common synchronization .......................................................................................................................51
IRIG-B................................................................................................................................................51
Network Time Protocol ...........................................................................................................................52
Timestamps...........................................................................................................................................53
Example .............................................................................................................................................53
Readable DUCK .....................................................................................................................................54
Reading the current DAG time .............................................................................................................54
Performance .......................................................................................................................................54
Dagclock ...............................................................................................................................................55
Card with timing reference .....................................................................................................................59
Overview ............................................................................................................................................59
Pulse signal from external source.........................................................................................................59
Testing the signal ...............................................................................................................................59
Single card no reference.........................................................................................................................60
Two cards no reference..........................................................................................................................61
Overview ............................................................................................................................................61
Synchronizing with each other .............................................................................................................61
Synchronizing with host.......................................................................................................................61
Connector .............................................................................................................................................62
Overview ............................................................................................................................................62
Pin assignments..................................................................................................................................62
Data formats 65
Overview...............................................................................................................................................65
Generic ERF header ...............................................................................................................................66
ERF 2. TYPE_ETH ..................................................................................................................................68
Extension Headers (EH) .........................................................................................................................69
Introduction........................................................................................................................................69
Guidance for stream buffer sizing 71
Selecting stream buffer size....................................................................................................................71
Burst duration.....................................................................................................................................71
Latency ..............................................................................................................................................72
Multiple streams ....................................................................................................................................72
Calculating the stream buffer size ...........................................................................................................72
Example 1 ..........................................................................................................................................73

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Support 75
Requesting assistance ........................................................................................................................... 76
Support script .................................................................................................................................... 76
Required Information ......................................................................................................................... 76
Severity Levels Described ................................................................................................................... 77
Support request form ......................................................................................................................... 77
Contact details ................................................................................................................................... 77
Version History 79

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 1
Introduction
The Purpose of this User Guide
The purpose of this user guide is to provide you with an understanding of the Endace DAG 9.2X2 card
architecture, functionality and to guide you through the following:
•Installing the card software.
•Installing the firmware.
•Installing the physical card.
•Configuring the card for your specific network requirements.
•Running a data capture session.
•Synchronizing clock time.
•Data formats.
You can also find additional information relating to functions and features of the DAG 9.2X2 card in the
following documents which are available from the Support section of the Endace website at
http://www.endace.com:
• EDM04-01 DAG Software Installation Guide
•
EDM04-03 dagflood User Manual
•
EDM04-04 dagfwddemo User Guide
•
EDM04-06 Daggen User Guide
•
EDM04-19 DAG Programming Guide
•
EDM04-21 Libpcap and Third party applications
•
EDM04-25 Counters and Statistics API
•
EDM04-30 dagfilter-loader Software Guide
•
EDM04-31 Enhanced Packet Processing v2
•
EDM04-32 dagmem Software Guide
•
EDM04-33 dag_irigb Software Guide
•
EDM04-34 Configuration & Status API Overview
•
EDM04-37 Windows DAG Software Installation Guide
•
EDM05-01 Time Distribution Server User Guide
•
EDM05-02 TDS 24 Installation Guide
•
EDM11-01 ERF Types
•
PN01-13 DAG Card Quick Start Guide
This user guide and the following installation guides are also available in PDF format on the installation
CD shipped with your DAG 9.2X2 card.
•
EDM04-01 DAG Software Installation Guide
•
EDM04-37 Windows DAG Software Installation Guide

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction
2 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Overview
The Endace DAG 9.2X2 is a two port, PCIe Gen 2.0 card designed for capture and transmission of
network traffic.
It transfers data at the full speed of the network into the memory of the host computer, with zero packet
loss in even worst-case conditions. Unlike a NIC (Network Interface Card), it actively manages the
movement of network data into memory while consuming a minimal amount of the host computer's
resources. The full attention of the CPU remains focused on the analysis of incoming data without a
constant stream of interruptions as new packets arrive from the network. For a busy network link, this
feature has a turbo-charging effect similar to that of adding a second CPU to the system.
The Endace DAG 9.2X2 is designed for use with optical interfaces. The DAG 9.2X2 provides full line rate
capture of 1 Gigabits per second and 10 Gigabits per second Ethernet per port.
Card features
The following features are available on this DAG card.
Note:
Different firmware images may be required. Not all features are available on each firmware image. For
further information on which feature is available in what firmware image, see Firmware images (page
15).
•100% capture into host memory at full line rate for IP packets from 48 to 9600 bytes.
•1GE, 10GE LAN and 10GE WAN.
•Timed Release TERF (TR-TERF) & Triggered Timed Release TERF (TR-TERF).
•Enhanced Packet Processing v2 with 32 Stream buffers.
•IRIG-B (Inter Range Instrumentation Group mod B) decoding.
•Conditioned clock with PPS input and local synchronization capability.
•Two SFP+ ports for 1, 10 Gigabit Ethernet.
•PCIe Gen 2.0 bus, 8 lanes.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 3
System requirements
General
The minimum system requirements for the DAG 9.2X2 card are:
•A computer, with at least a Intel Xeon or AMD Opteron 1.8GHz or faster and a minimum of 1GB
RAM.
•At least one free PCIe Gen 2.0 slot supporting 8-lane operation.
•Ensure good airflow across the DAG 9.2X2 card heatsink, at least 200 meters per minute (656 linear
feet per minute). Also see Warning - Thermal trip (page 3).
•Software distribution requires 60MB free space.
•For details of the supported operating systems, refer either of the following documents.
• EDM04-01 DAG Software Installation Guide .
• EDM04-37 Windows DAG Software Installation Guide .
•The current Release Notes, available on the Endace Documentation and Software CD or the
Endace support website at https://support.endace.com/.
Operating system
This document assumes you are installing the DAG 9.2X2 card in a computer which already has an
operating system installed.
For any queries regarding operating systems, contact Endace Customer Support: [email protected].
Other operating systems
For advice on using an operating system that is substantially different from any of those specified above,
please contact Endace Customer Support at [e-mail].
Warning - thermal trip
In order to prevent damage to the DAG 9.2X2 card, the DAG 9.2X2 card has an emergency thermal
response function (thermal trip). Should the internal temperature of the DAG 9.2X2 card exceed 85 ºC
(185 ºF) or fall below 0 ºC (32 ºF), the FPGA will be unloaded, causing the power utilization of the DAG
card to drop. This action may cause the host system to crash and the system requires a power cycle to
recover.
To display the internal temperature of the DAG card, use the dagconfig -m command, see dagconfig
(page 33).

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction
4 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Card description
The DAG 9.2X2 has two optical 10 Gigabit Small Form Factor Pluggable (SFP+) interfaces. The two
transceivers can be operated simultaneously allowing a single card to monitor one or both directions of a
full-duplex link. SFP+ transceivers are also backwards compatible with standard SFP interfaces in 1GE
mode.
Note:
Performance will be reduced if the DAG 9.2X2 card is inserted in a PCIe Gen 1.0 slot, or if the 8 lane bus
has less than 8 lanes connected. Please check the host computer motherboard specifications.
Note:
For further information on Boot jumpers, see Boot jumper settings (page 11).
DO NOT REMOVE THE BATTERY
Removing the battery from a DAG card voids the DAG card warranty.
If battery is removed then the DAG card must be returned to Endace for servicing.
The battery in this product is expected to last a minimum of 10 years.
Caution:
Risk of explosion if the battery is replaced by an incorrect type.
Dispose of used batteries carefully.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction
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Card architecture
Serial optical data received by the SFP+ optical interfaces flows in to the Field Programmable Gate Array
(FPGA).
The FPGA contains the packet processor and the DAG Universal Clock Kit (DUCK) timestamp engine. The
DUCK provides high resolution per-packet timestamps which can be accurately synchronized to an
external Pulse Per Second (PPS) source.
Note:
For further information on the DUCK and time synchronization see Synchronizing Clock Time (page 51).
Line types
It is important that you understand the physical characteristics of the network to which you want to
connect. If your configuration settings do not match your network, the DAG 9.2X2 card will not function
as expected.
There are various Ethernet line speeds and corresponding protocols which are identified using the IEEE
naming convention. Each line speed has a set of requirements associated with it relating to the type of
cable, maximum allowable distance, etc.
Note:
If you are unsure about which of the following options listed to apply to your network, contact your
Network Administrator for further information.
Supported Line Types
The line types supported by the DAG 9.2X2 card are described below.
Type Description
1000Base-T
1000Mbps over four pairs of balanced Cat5 or Cat6 copper cable.
1000Base-SX
1000Mbps over single mode or multi mode fiber optic cable with short wavelength laser
driver (850nm).
1000Base-LX
1000Mbps over single mode or multi mode fiber optic cable with long wavelength laser
driver (1310nm).
10GBase-SR
10 Gigabit per second over Ethernet multi mode fiber optic cable with short wavelength
laser driver (850nm).
10GBase-LR
10 Gigabit per second over Ethernet single mode fiber optic cable with long wavelength
laser driver (1310nm).
10GBase-ER
10 Gigabit per second over Ethernet single mode fiber optic cable with extended
wavelength laser driver (1550nm).
Note:
For more detailed information regarding Ethernet line types and speeds, please refer to IEEE Standard
802.3AE available from the IEEE website at www.ieee.org.

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6 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Extended functions
Enhanced Packet Processing v2
With the Enhanced Packet Processing v2 capability the following types of enhanced capabilities can be
achieved:
1. Filtering: Filtering compares the fields in the packet's protocol headers to a list of user defined filter
rules. As a result, the packets matching the filter are tagged with a user defined color value. This
color value is subsequently used to steer the packet to specific stream buffer(s) or to drop the
packet.
2. Hash Load Balancing (HLB): The HLB module takes the packets and applies one of a number of
user selectable load balancing algorithms. This results in each packet being tagged with a bin
number. The bin number is used to help determine the stream the packets are sent to. The user can
choose the number of bins used in the packet tagging.
HLB is typically used to optimize the parallel processing done by multi-core servers, since each core
will only see a subset of the full traffic load. The user normally wants to distribute traffic equally (or
roughly equally) across the stream buffers while preserving "flow coherence", meaning, all packets
associated with a single TCP/IP session must always go to the same stream buffer. Hashing is the
tool used to classify the flow coherent streams and mathematically assign a "bin number" to each
packet. Bin numbers are then associated with specific stream buffers to achieve the desired load
balancing. The hashing algorithms are "flow coherent" so all packets that are a part of a particular
session will be tagged with the same bin number.
3. Steering: This is where the results of the previous steps are used to determine which stream the
packet should be steered to. Optionally, the interface / port number the packet originated from can
also be used in the steering process. The rules that determine how the packet steering is
accomplished are defined by the user. This gives a large amount of flexibility in the packet steering
process. The user can choose to use some, all or none of the color, HLB bin value and interface /
port numbers in the steering process.
4. Duplication: One of the unique benefits of the Steering feature is the ability to steer the same
packet to multiple streams. Packet duplication can simplify software architectures where different
applications need to process the same packet. For example, all traffic can be sent to stream buffer 0
for use by a capture to disk application, while only a subset of traffic is sent to stream buffer 2 for
handling by a traffic analysis application. For this document, packet duplication is defined as writing
a single packet into more than one stream buffer. It does not mean writing the packet twice into the
same stream buffer.
For further details refer to the following documents:
•
EDM04-30 dagfilter-loader Software Guide
•
EDM04-31 Enhanced Packet Processing v2
•
EDM04-35 dagcat-setup Software Guide v2

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©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 7
Inline forwarding
The DAG 9.2X2 card supports inline forwarding which enables the card to receive and transmit packets
directly from a single memory buffer. This allows you to forward packets from the DAG card receive
interface(s) to the DAG cards transmit interface(s) without the requirement to copy them. Using inline
forwarding you can receive, inspect, filter and forward packets between ports.
dagfwddemo which is a tool supplied with your DAG card demonstrates how you can apply a user-defined
Packet Filter (BPF) to the traffic forwarded by the DAG card. Packets which match the filter are
forwarded, while packets that do not match are dropped.
For more detailed information on inline forwarding and using dagfwddemo please refer to the EDM04-04
dagfwddemo User Guide
available from the support section of the Endace website at
http://www.endace.com.
Timed Release TERF (TR-TERF)
The Timed Release TERF (TR-TERF) module is an option that enables you to retransmit an ERF packet
trace while reproducing the time intervals of the packets within that stream. It is able to transmit on all
channels.
TR-TERF has two modes of operation.
•No Delay Mode.
•Relative Timed Release Mode.
Triggered Timed Release TERF (TR-TERF)
The Triggered Timed Release TERF (TR-TERF) module extends the functionality of TR-TERF by setting an
absolute time at which to start the transmission is to start. This enables synchronization of multiple
replay sessions across multiple DAG cards and even systems, provided that the DAG card clocks are
synchronized.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Installation
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 9
Installation
Caution:
The DAG 9.2X2 card software must be installed before the card itself is
physically installed into the computer.
DAG software package
The latest DAG Software package must be installed before you install the DAG 9.2X2 card itself. For
details on installing the latest DAG Software package, refer to the following:
•
EDM04-01 DAG Software Installation Guide
•
EDM04-37 Windows DAG Software Installation Guide
PCIe Gen 2.0 Slot
The DAG 9.2X2 card operates on an 8 lane PCIe Gen 2.0 bus and can be installed in any free 8 lane PCIe
Gen 2.0 slot.
The PCIe Gen 2.0 bus architecture allows multiple DAG cards to be installed without affecting the
bandwidth used by each DAG 9.2X2 card.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Installation
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Inserting the DAG card
Warnings:
Electro-Static Discharge (ESD): It is very important to protect both the
computer and the DAG 9.2X2 card from damage by ESD. Failure to do so
could cause damage to components and subsequently cause the card to
partially or completely fail.
DO NOT hold the DAG 9.2X2 card by the battery cage. The battery cage can
be easily damaged and can cause your DAG 9.2X2 to need reprogramming.
DO NOT REMOVE THE BATTERY (page 4).
1. Turn power to the computer OFF.
2. Remove the PCIe Gen 2.0 bus slot screw and cover.
3. Using an approved ESD protection device attach the end with the strap to your wrist and pull or clip
firmly so there is firm contact with your wrist.
4. Securely attach the clip on the other end of the strap to a solid metal area on the computer chassis
as shown below.
5. Hold the DAG 9.2X2 card with one hand on the front bracket and two or three fingers on the card
edge. This ensures damage does not occur to the card or its components.
6. Insert the DAG 9.2X2 card into PCIe Gen 2.0 bus slot ensuring it is firmly seated.
7. If this DAG card requires an external power supply, complete the following steps:
a. Connect the supplied (or equivalent) power cable to the external power connector on the DAG
card.
b. Connect the cable to the appropriate power connector on your server's power supply unit.
8. Check the free end of the card fits securely into the card-end bracket that supports the weight of the
card.
9. Secure the card with the bus slot cover screw.
10. Turn power to the computer ON.
11. Ensure the blue (FPGA successfully programmed) LED on the DAG card illuminates.
Caution:
Ensure good airflow across the DAG 9.2X2 card heatsink, at least 200
meters per minute (656 linear feet per minute).

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Installation
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 11
Ports and Status LEDs
The DAG 9.2X2 card has two industry standard port connectors for network connections.
In addition there is a 4-pin socket located beside the port connectors for connection to an external time
synchronization source.
Warning:
Connect only a PPS input to the 4 pin time synchronization socket.
Connecting anything else to this socket may damage the DAG card.
Boot jumper settings
The DAG 9.2X2 has two sets of jumpers mounted on the DAG card which control the card's boot
behavior:
•IP (Inhibit Program)
•FF (Force Factory)
IP Jumper settings
Jumper set between Definition
1 & 2
Used in development. Do not use.
2 & 3 or jumper not fitted
Normal operation of the DAG card.
FF jumper settings
Jumper set between Definition
1 & 2
Loads the factory image into the FPGA at power on.
2 & 3 (or jumper not fitted)
Loads the user defined image into the FPGA at power on.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Installation
12 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Boot LEDs
The following tables describe the Boot LED configurations of the DAG 9.2X2. The Boot LED's are to the
right of the Boot Jumpers.
Boot LED numbering:
LED Color
3
Green
2
Green
1
Green
0
Red
Notes:
• If the blue 'FPGA programmed' LED (on the front of the DAG card) is off or flashing - contact Endace
Support.
• If the red Boot LED is flashing, contact Endace Support.

EDM01-36v10 DAG_9.2X2_Card_User_Guide - Installation
©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012 13
Pluggable optical transceivers
Overview
The DAG card's SFP+ optical transceivers consist of the following two parts.
•Mechanical chassis attached to the circuit board.
•Transceiver unit which may be inserted into the chassis.
You can connect the transceiver to the network via LC-style optical connectors. For further information on
pluggable optical transceivers please refer to the Endace website at http://www.endace.com.
Caution:
To prevent damage to the DAG card, ensure you select the correct
transceiver type for the optical parameters of the network to which you
want to connect.
Optical modules
The optical power range depends on the particular SFP+ module that is fitted to the DAG card. Optics
modules are supplied in either Single or Multi mode. See the following table for details.
Optical power is measured in dBm, decibels relative to 1 mW where 10 dB is equivalent to a factor of 10
in power. A negative optical power value indicates power that is less than 1 mW. The most sensitive
devices can work at power levels down as low as -30dBm or 1µW.
To confirm card port light levels, use an optical power meter.
Note:
Covering the card ports with LC-style plugs when they are not in use is highly recommended, to prevent
dust and mechanical hazards affecting optics.
Receive Characteristics Transmit Characteristics
Wavelength
(nm)
Sensitivity
dBm (OMA)
Wavelength
(nm)
Tx Power dBm
(OMA)
Product
Number
Network
Support
Min Max Min Max Min Max Min Max
TXR-1000SX
1000BASE-SX
Multi mode
770
860
-20
0
830
860
-9
-3.5
TXR-1000LX
1000BASE-LX
Single mode
1270
1600
-22
0
1270
1360
-9.5
-3
TXR-10G 850 MM
SFP+
10GBASE-SR
Multi mode
840
860
-11.1
0.5
840
860
-5
-1
TXR-10G 1310
SM SFP+
10GBASE-LR/LW
Single mode
1260
1600
-12.6
1260
1355
-5.2
0.5
TXR-1G/10G 850
MM SFP+
1G/10G BASE-SR
Multi mode
840
860
-17
0.5
840
860
-9.5
-1
TXR-1G/10G
1310 SM SFP+
1G/10G BASE-LR
Single mode
1260
1600
-19
1260
1355
-11
-3
TXR-10G 1550
SM SFP+
10GBASE-ER
Single mode
1260
1600
-15.8
-1
1530
1565
-4.7
4
Transmit power and the receive sensitivity is specified as OMA - Optical Modulation Amplitude.

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Power input
Note:
The optical power input to the DAG card must be within the receiver’s dynamic range. See the previous
table for details. If it is slightly outside of this range it will cause an increased bit error rate. If it is
significantly outside of this range the system will not be able to lock onto the signal.
When power is above the upper limit the optical receiver saturates and fails to function. When power is
below the lower limit the bit error rate increases until the device is unable to obtain lock and fails. In
extreme cases, excess power can damage the receiver.
When you set up the DAG card you should measure the optical power at the receiver and ensure that it is
within the specified power range. If it is not, adjust the input power as follows:
•Insert an optical attenuator if power is too high, or
•Change the splitter ratio if power is too high or too low.
Splitter losses
Splitters have the insertion losses either marked on their packaging or described in their accompanying
documentation. General guidelines are as follows:
•A 50:50 splitter will have an insertion loss of between 3 dB and 4 dB on each output.
•90:10 splitter will have losses of about 10 dB in the high loss output, and <2 dB in the low loss
output.
Note:
Endace recommends that you do not use a combination of single-mode and multi-mode fibers and optics
modules on the same link, as the quality of the received signal cannot be guaranteed.
If you have no choice but to mix single-mode and multi-mode, please be aware that a single mode input
connected to a multi-mode fiber will have some attenuation but may still be acceptable. However a multi-
mode input connected to a single-mode fiber will likely have large and unpredictable losses.
Pluggable copper transceivers
The DAG card supports industry standard Small Form-factor pluggable (SFP) copper transceivers.
The transceivers consist of two parts:
•Mechanical chassis attached to the circuit board
•Transceiver unit which may be inserted into the chassis
Endace recommends that you use Cat6 copper cable. The DAG card copper module specification is shown
below:
Part Type Data Rate
TXR-1000TX
1000 Base-T
less than 1.25 Gbps (RJ-45 IEEE 802.3)
Note:
If a copper transceiver is unplugged and then plugged in again you must run dagconfig default to
initialize the transceiver for the link configuration. It also checks the compatibility of all the modules with
the DAG card, and will not power on mismatched modules.