Gigabyte 5SG100 User manual

Table of Contents
30
TABLE OF CONTENTS
1. INTRODUCTION
1.1. PREFACE..................................................................................1-1
1.2. KEY FEATURES........................................................................1-1
1.3. PERFORMANCE LIST...............................................................1-2
1.4. BLOCK DIAGRAM .....................................................................1-3
1.5. INTRODUCE THE PCI - BUS.....................................................1-4
1.6. FEATURES................................................................................1-5
1.7. What is AGP ?...........................................................................1-5
2. SPECIFICATION
2.1. HARDWARE..............................................................................2-1
2.2. SOFTWARE ..............................................................................2-2
2.3. ENVIRONMENT.........................................................................2-2
3. HARDWARE INSTALLATION
3.1. UNPACKING..............................................................................3-1
3.2. MAINBOARD LAYOUT...............................................................3-2
3.3. QUICK REFERENCE FOR JUMPERS & CONNECTORS...........3-2
3.4. DRAM INSTALLATION...............................................................3-6
3.5. SRAM INSTALLATION...............................................................3-6
Sync. SRAM (Pipeline Burst SRAM)...........................................3-6
3.6. CPU INSTALLATION AND JUMPERS SETUP............................3-6
3.7. CMOS RTC & ISA CFG CMOS SRAM........................................3-7
3.8. SPEAKER CONNECTOR INSTALLATION .................................3-7
3.9. ACPI LED & KEY LOCK CONNECTOR INSTALLATION ............3-7

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3.10.HARDWARE RESET SWITCH CONNECTOR INSTALLATION .3-7
3.11. GREEN FUNCTION INSTALLATION........................................3-7
3.12. PERIPHERAL DEVICE INSTALLATION ...................................3-8
4. BIOS CONFIGURATION
4.1. ENTERING SETUP....................................................................4-1
4.2. CONTROL KEYS.......................................................................4-2
4.3. GETTING HELP.........................................................................4-3
4.3.1. Main Menu.......................................................................4-3
4.3.2. Status Page Setup Menu / Option Page Setup Menu........4-3
4.4. THE MAIN MENU.......................................................................4-3
4.5. STANDARD CMOS SETUP MENU.............................................4-5
4.6. BIOS FEATURES SETUP..........................................................4-9
4.7. CHIPSET FEATURES SETUP....................................................4-14
4.8. POWER MANAGEMENT SETUP...............................................4-20
4.9. PNP/PCI CONFIGURATION ......................................................4-23
4.10. LOAD BIOS DEFAULTS...........................................................4-24
4.11. LOAD SETUP DEFAULTS........................................................4-25
4.12. INTEGRATED PERIPHERALS.................................................4-26
4.13. SUPERVISOR / USER PASSWORD ......................................4-32
4.14. IDE HDD AUTO DETECTION...................................................4-33
4.15. SAVE & EXIT SETUP.............................................................4-34
4.16. EXIT WITHOUT SAVING........................................................4-35

Introduction
1-1
1. INTRODUCTION
1.1. PREFACE
Welcome to use the 5SG100 motherboard. The motherboard is a Pipeline
512 KB CACHE PentiumProcessor based PC / AT compatible system with
ISA bus and PCI Local Bus, and has been designed to be the fastest PC / AT
system. There are some new features allow you to operate the system with
the performance you want.
This manual also explains how to install the motherboard for operation, and
how to set up your CMOS CONFIGURATION with BIOS SETUP program.
1.2. KEY FEATURES
qPentiumProcessor based PC / AT compatible mainboard with PCI /
ISA / AGP Bus.
q4 PCI Bus slots, 2 ISA Bus slots, 1 AGP slot.
qSupports PentiumProcessor running at 90-233 MHz, P54CT (150 /
166), MMX (150 / 166 / 200 / 233), P54CTB (150 / 166 / 180 / 200),
AMDK5 (PR133 / PR166), AMD-
K6(166/180/200(2.9V)/233(3.2V)/266/300 (2.2V)), AMDK6-
2(250/266/300/333/350)(2.2V),Cyrix/IBM6x86-120/
133/150(PR150+/PR166+/PR200+), Cyrix / IBM 6x86L (PR150+ /
PR166+/PR200+(2.8V)), Cyrix / IBM 6x86MX (PR166 (60x2.5 2.9V) /
PR200 (66x2.5 2.9V) (75x2 2.9V)/ PR233 (66x3 2.9V) (75x2.5 2.9V)) /
PR266 (66x3.5 2.9V) (75x3 2.9V) (83x2.5 2.9V)),IBM MX PR333
(100*2.5)(2.9V).
qSupports true 64 bits CACHE and DRAM access mode.
qSupports 321 Pins (Socket 7) ZIF white socket on board.
qSupports 512 KB Pipeline Burst Sync. 2nd Level Cache.
qCPU L1 / L2 Write-Back cache operation.
qSupports 8 - 768 MB DRAM memory on board.
qSupports 3*168 pin 64/72 Bit DIMM module.
qSupports 2-channel Ultra DMA/33 Enhanced PCI IDE ports for 4 IDE
Devices.
qSupports 2*COM (16550), 1*LPT (EPP / ECP), 1*1.44MB Floppy port.

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qSupports Green function, Plug & Play function.
qLicensed AWARD BIOS, FLASH RAM for BIOS update.
q22cm*25cm, AT Form factor.
qSupports USB port & PS/2 Mouse port.
qSupports 3 steps ACPI LED.
1.3. PERFORMANCE LIST
The following list of performance data is the testing results of some popular
benchmark testing programs.
These data are just referred by users, and there is no responsibility for
different testing data values gotten by users. (The different Hardware &
Software configuration will result in different benchmark testing results.)
•CPU Intel PentiumProcessor MMX 166MHz , AMD K6-2
300MHz, Cyrix 6x86 MX PR200MHz
•DRAM DIMM, SDRAM 32 MB * 1 pcs. Total 32 MB TOSHIBA
(TC5951608AFT-12A)
•CACHE SIZE 512KB 2nd Level Cache on board.
•DISPLAY GIGABYTE GA-601 (4MB SGRAM).
•STORAGE Onboard IDE port + IBM DHEA-36481
•O.S. Windows95 with Display Driver at 1024 x 768 x 256
colors & SiS IDE Driver (Ultra DMA supported)
×Windows 95Ø-With SiS IDE Driver
Processor
Program Intel Penium MMX
166MHz (66*2.5) AMD K6-2 300MHz (100*3) Cyrix 6x86 MX PR200MHz (75*2)
Winbench98
Business Graphic
WinMark 86.1 143 101
High-End Graphic
WinMark 76.3 147 105
3D Winbench 97
3D WinMark 115 162 73.4
Large Scene 16.9 24 11.4

Introduction
1-3
1.4. BLOCK DIAGRAM

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CPU
Tag RAM
PBSRAM
AGP
DEVICE
Host Address
Host Data Bus
ISA Bus
PCI Bus
PCI
Device PCI Device
PCI
Device
PCI
Device
MD Bus
SiS 5595 Keyboard
GPIO
USB
SiS 5591 SDRAM
MA Bus
IDE DEVICE
BIOS
ISA
Device
ISA
Device
Winbond
I/O
ComA
ComB LPT FDD
66MHz
66MHz
66MHz 66MHz
33MHz
66MHz
33MHz
33MHz
48MHz
24MHz
14.318MHz
14.318MHz
ICS9148BF-
37
1.5. INTRODUCE THE PCI - BUS

Introduction
1-5
Connecting devices to a CPU local bus can dramatically increase the speed
of I/O-bound peripherals with only a slight increase in cost over traditional
systems.
This price / Performance point has created a vast market potential for local
bus products.
The main barrier to this market has been the lack of an accepted standard
for local bus peripherals.
Many mainboard and chipset manufactures developed their own local bus
implementations, but they are incompatible with each other.
The VL (Video Electronics Standards Association) local bus and PCI
(Peripheral Component Interconnect) bus specification was created to end
this confusion.
The PCI - bus standard, under development since Jun. 1992, which is
designed to bring workstation-level performance to standard PC platform.
The PCI - bus removes many of the bottlenecks that have hampered PC for
several years.
On the PCI - bus, peripherals operate at the native speed of the computer
system, thus enabling data transfer between peripherals and the system at
maximum speed.
This performance is critical for bandwidth-constrained devices such as video,
multimedia, mass storage, and networking adapters.
PCI - bus standard provides end-users with a low-cost, extendible and
portable local bus design, which will allow system and peripherals from
different manufactures to work together.
1.6. FEATURES
q32 bits bus transfer mode.
qBus Master or Slave access.
qMemory burst transfer to 132 MB/sec.
q33 MHz operation speed.
q10 device loading ability.
qCPU independent.

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1.7. What is AGP ?
The Accelerated Graphics Port (AGP) is a new port on the Host-To-PCI
bridge device that supports an AGP port. The main purpose of the AGP port
is to provide fast access to system memory.
The AGP port can be used either as fast PCI port (32-bits at 66MHz vs. 32-
bits at 33MHz) or as an AGP port which supports 2x data-rate, a read queue,
and side band addressing. When the 2x-data rate is used the port can
transmit data at 533Mb/sec (66.6*2*4). The read-queue can be used to
pipeline reads –removing the effects of the reads-latency. Side band
addressing can be used to transmit the data address on a separate line in
order to further speed the transaction.
F If you have any problems under some 3D games when using
ATi Rage Pro AGP card, please try to modify the value of
C:\Windows\Regedit.exe\HKEY_LOCAL_MACHINE\Software\ATi
Technologies\3D\ATID3D\Ebmmode (ATi driver ver. 5.20)
from “01”to “00”.

5SG100
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2. SPECIFICATION
2.1. HARDWARE
•CPU −PentiumProcessor 90 - 233 MHz, MMX, P54CT,
P54CTB, AMDK5(PR133 / PR166), AMD-K6 (166 /
180 / 200 (2.9V) / 233 (3.2V)/266/300(2.2V)),
AMD-K6-2(250/266/300/333/350)(2.2V),Cyrix / IBM
6x86 ( PR150+ / PR166+ / PR200+), Cyrix / IBM
6x86L (PR150+/ PR166+/ PR200+( 2.8V)), Cyrix /
IBM 6x86MX (PR166 (60x2.5 2.9V) / PR200
(66x2.5 2.9V) (75x2 2.9V)/ PR233 (66x3 2.9V)
(75x2.5 2.9V) (83x2)/PR266 (66x3.5) (75x3)
(83x2.5), IBM MX PR333 (100*2.5)(2.9V).
−321 pins (socket 7) ZIF white socket on board.
−3.52V / 2.0V-3.5V Dual Power Ready.
•COPROCESSOR −Included in processor.
•SPEED −60 / 66 / 75/ 83 /95 /100MHz system speed.
−60 / 66 MHz AGP-Bus speed.
−30 / 33 MHz PCI-Bus speed.
−7.5 / 8 MHz AT bus speed.
•DRAM MEMORY −3 banks 168 pins DIMM module socket on board.
−Use 8 / 16 / 32 / 64 /128/256 MB DRAM.
−8 ~ 768 MB DRAM size.
•CACHE MEMORY −16 / 24 / 32 / 64KB L1cache included in CPU.
−512 KB 2nd Level cache on board.
−Supports Write Back cache function for both CPU
& on board cache.
•I/O BUS SLOTS −4 xMaster / Slave PCI-BUS Slots.
−2 x16 bits ISA BUS Slots.
−1 xAGP Slot.