Guildline 7620 User manual

Technical Manual
For The
Model 7620 Wideband
Transconductance Amplifier
www.guildline.com
NOTICE
The contents and information contained in this manual are proprietary to
Guildline Instruments Limited. They are to be used only as a guide to the
operation and maintenance of the equipment with which this manual was
issued and may not be duplicated or transmitted by any means, either in whole
or in part, without the written permission of Guildline Instruments Limited.
TM7620-G-00
February 04, 2014

Dwg: 30162-08-64, Rev A
Issue Date: 12/09/06
HAZARDS WARNING!
CURRENT AND VOLTAGE SOURCE INSTRUMENTS
READ THESE SAFETY PRECAUTIONS BEFORE
SETTING UP OR USING THIS INSTRUMENT!
IMPROPER SETUP OR OPERATION OF THIS
INSTRUMENT CAN RESULT IN PERSONAL INJURY,
BURNS OR ELECTRICAL SHOCK!
Precautions, Safety and Preparation for Use
1. Thoroughly read the set up and operating procedures in
this manual before installing or using this instrument.
2. Select the proper line voltage on the back panel and use only the
proper fuse type and rating specified for this product.
3. The line power connection must have an earth ground conductor
and must be connected to the instrument only with the line cord
supplied or a proper line cord specified for the country of use.
Operating this instrument without a proper grounded
line connection can result in electrical shock hazard.
4. Observe all connector and terminal markings and ratings to avoid
any possible shock, or other hazard to the user of this instrument.
5. Under no circumstances should unqualified personnel operate or
service this instrument.
6. Do not connect the line power or operate this instrument with the
covers removed.
7. Do not touch exposed terminal connections or make or break
terminal connections with the instrument operating.
8. Operate this instrument only in a well ventilated and dry
environment.
9. Do not touch or make any type of connection to the
CURRENT OR VOLTAGE OUTPUT connections while
the instrument is in operation, to avoid POSSIBLE
ELECTRICAL SHOCK HAZARD.

i
TABLE OF CONTENTS
INTRODUCTION................................................................................................................................................................. 1-1
1.1 SCOPE .................................................................................................................................................... 1-1
1.2 GENERAL DESCRIPTION............................................................................................................ 1-1
1.3 GENERAL THEORY OF OPERATION ................................................................................... 1-1
1.3.1 GENERAL DESIGN APPROACH ............................................................................ 1-3
1.3.2 7620 FEATURES............................................................................................................... 1-6
1.3.2.1 COMPLIANCE VOLTAGE DISPLAY .................................................. 1-6
1.3.2.2 FREQUENCY MONITOR......................................................................... 1-6
1.3.2.3 4-WIRE INPUT BUFFER AMPLIFIER ................................................. 1-7
1.3.2.4 OUTPUT CURRENT-CELL ARRAY ..................................................... 1-7
1.3.2.5 IEEE-488 INTERFACE (CPU).................................................................. 1-7
1.3.2.6 OVERLOAD PROTECTION ................................................................... 1-7
SPECIFICATIONS ................................................................................................................................................................ 2-1
OPERATING INSTRUCTIONS....................................................................................................................................... 3-1
3.1 INSTALLATION................................................................................................................................. 3-1
3.1.1 RACKMOUNT FEATURE ........................................................................................... 3-1
3.1.2 RECOMMENDED PRACTICE .................................................................................. 3-1
3.2 FRONT PANEL INDICATORS..................................................................................................... 3-2
3.2.1 DISPLAY WINDOW....................................................................................................... 3-4
3.2.2 20 A 100 kHz INDICATOR........................................................................................... 3-4
3.2.3 10 A 750 kHz INDICATOR........................................................................................... 3-4
3.2.4 8 A 1 MHz INDICATOR................................................................................................ 3-4
3.3 FRONT PANEL CONTROLS ........................................................................................................ 3-4
3.3.1 POWER SWITCH............................................................................................................. 3-4
3.3.2 OVERLOAD SWITCH................................................................................................... 3-4
3.3.3 1 V MOMENTARY SWITCH....................................................................................... 3-5
3.3.4 10 V MOMENTARY SWITCH..................................................................................... 3-5
3.3.5 200 µA MOMENTARY SWITCH................................................................................ 3-5
3.3.6 2 mA MOMENTARY SWITCH ................................................................................... 3-5
3.3.7 20 mA MOMENTARY SWITCH................................................................................. 3-5
3.3.8 200 mA MOMENTARY SWITCH............................................................................... 3-6
3.3.9 2 A MOMENTARY SWITCH....................................................................................... 3-6
3.3.10 20 A MOMENTARY SWITCH..................................................................................... 3-6
3.3.11 REMOTE MOMENTARY SWITCH.......................................................................... 3-6
3.4 REAR PANEL CONTROLS............................................................................................................ 3-6
3.4.1 LINE VOLTAGE SELECTION SWITCH............................................................... 3-7
3.4.2 GPIB ADDRESS SELECTION SWITCH............................................................... 3-10
3.5 FRONT PANEL INPUT CONNECTORS................................................................................ 3-10
3.5.1 HI INPUT TERMINAL................................................................................................ 3-11
3.5.2 LO INPUT TERMINAL............................................................................................... 3-11

ii
3.5.3 I+ INPUT TERMINAL ................................................................................................ 3-11
3.5.4 I- INPUT TERMINAL.................................................................................................. 3-11
3.5.5 INPUT GUARD TERMINAL .................................................................................... 3-11
3.5.6 GROUND TERMINAL................................................................................................ 3-12
3.6 FRONT PANEL OUTPUT CONNECTORS........................................................................... 3-12
3.6.1 OUTPUT GUARD TERMINAL................................................................................ 3-12
3.6.2 2 A OUTPUT CONNECTOR .................................................................................... 3-12
3.6.3 20 A OUTPUT CONNECTOR .................................................................................. 3-13
3.7 REAR PANEL CONNECTORS................................................................................................... 3-13
3.7.1 GPIB DATA CONNECTOR...................................................................................... 3-13
3.7.2 POWER INLET CONNECTOR ............................................................................... 3-13
REMOTE CONTROL.......................................................................................................................................................... 4-1
4.1 IEEE-488/1978 (GPIB) INTERFACE .......................................................................................... 4-1
4.2 CONTROLLER.................................................................................................................................... 4-1
4.3 GPIB RESPONSES............................................................................................................................. 4-2
4.4 INTERCONNECTING CABLE AND GPIB CONNECTOR ............................................. 4-2
4.5 TYPICAL SYSTEM............................................................................................................................. 4-2
4.6 GPIB INTERFACE............................................................................................................................. 4-2
4.6.1 GPIB INPUT BUFFERING.......................................................................................... 4-5
4.6.2 GPIB OUTPUT BUFFERING..................................................................................... 4-6
4.6.3 GPIB DEADLOCK ......................................................................................................... 4-6
4.6.4 GPIB DEVICE CLEAR.................................................................................................. 4-6
4.7 COMMAND LANGUAGE.............................................................................................................. 4-6
4.7.1 GENERAL SYNTAX FOR COMMANDS............................................................... 4-7
4.7.2 GENERAL SYNTAX FOR NUMBERS.................................................................... 4-7
4.8 REMOTE AND LOCAL OPERATION...................................................................................... 4-8
4.9 GPIB COMMANDS ........................................................................................................................... 4-9
4.9.1 *ESE - SET STATUS ENABLE REGISTER............................................................ 4-9
4.9.2 *ESE? - EVENT STATUS ENABLE QUERY....................................................... 4-11
4.9.3 *ESR? - EVENT STATUS REGISTER QUERY................................................... 4-11
4.9.4 *IDN? - IDENTIFICATION QUERY..................................................................... 4-11
4.9.5 *OPC - OPERATION COMPLETE......................................................................... 4-11
4.9.6 *OPC? - OPERATION COMPLETE QUERY...................................................... 4-11
4.9.7 *OPT? - REPORT AVAILABLE OPTIONS.......................................................... 4-11
4.9.8 *RST - DEVICE RESET............................................................................................... 4-12
4.9.9 *SRE - SERVICE REQUEST ENABLE COMMAND........................................ 4-15
4.9.10 *SRE? - SERVICE REQUEST ENABLE QUERY............................................... 4-15
4.9.11 *STB? - READ STATUS BYTE QUERY................................................................. 4-15
4.9.12 *TRG - GROUP EXECUTE TRIGGER................................................................. 4-15
4.9.13 *TST? - QUERY RESULTS OF SELFTEST........................................................... 4-16
4.9.14 Date - SET THE SYSTEM DATE ............................................................................. 4-16
4.9.15 Date? - DISPLAY THE 7620 INTERNAL DATE ................................................ 4-16
4.9.16 DER? - DEVICE ERROR REGISTER .................................................................... 4-17
4.9.17 DFR? - DEVICE FREQUENCY REGISTER........................................................ 4-17
4.9.18 Key? - REPORT LAST KEY PRESSED .................................................................. 4-19
4.9.19 Key <keyname> - ENTER A KEYSTROKE.......................................................... 4-20

iii
4.9.20 Range - SELECT OUTPUT CURRENT RANGE................................................. 4-20
4.9.21 Range? - DISPLAY THE CURRENTLY SELECTED RANGE....................... 4-21
4.9.22 RomChecksum? - DISPLAY THE ROM CHECKSUM....................................... 4-21
4.9.23 SInce? - DISPLAY THE TIME THE 7620 WAS LAST RESET........................ 4-22
4.9.24 Serial Number - SET THE 7620 SERIAL NUMBER ............................................ 4-22
4.9.25 TErse - TURN OFF VERBOSE MODE.................................................................. 4-22
4.9.26 TIme - SET THE SYSTEM TIME ............................................................................. 4-23
4.9.27 TIme? - DISPLAY THE SYSTEM TIME................................................................. 4-23
4.9.28 TimeZone - SET THE OPERATIONAL TIME ZONE ..................................... 4-23
4.9.29 UPtime? - DISPLAY HOW LONG THE 7620 HAS BEEN RUNNING
4-24
4.9.30 VErbose - SET VERBOSE MODE............................................................................ 4-24
4.9.31 Voltage - SELECT THE INPUT VOLTAGE RANGE ....................................... 4-25
4.9.32 Voltage? - DISPLAY THE CURRENT INPUT VOLTAGE RANGE............ 4-25
4.10 PROGRAMMING HINTS ............................................................................................................. 4-26
CALIBRATION...................................................................................................................................................................... 5-1
5.1 CALIBRATION EQUIPMENT...................................................................................................... 5-1
5.2 DC CALIBRATION............................................................................................................................ 5-1
5.2.1 EQUIPMENT SET-UP................................................................................................... 5-1
5.2.2 DC OFF-SET CURRENT CHECK............................................................................. 5-2
5.2.2.1 DC OFF-SET CURRENT ADJUSTMENT ........................................... 5-2
5.2.3 DC GAIN CHECK........................................................................................................... 5-3
5.2.3.1 DC GAIN ADJUSTMENT ......................................................................... 5-3
5.2.4 TRANSCONDUCTANCE............................................................................................. 5-4
5.3 FREQUENCY RESPONSE ............................................................................................................. 5-5
5.3.1 EQUIPMENT SET-UP................................................................................................... 5-5
5.3.2 PROCEDURE.................................................................................................................... 5-5
PRINCIPLES OF OPERATION....................................................................................................................................... 6-1
6.1 INTRODUCTION.............................................................................................................................. 6-1
6.2 DUAL LINEAR POWER SUPPLY................................................................................................ 6-1
6.3 DUAL HIGH-CURRENT SWITCHING POWER SUPPLY................................................. 6-2
6.4 CPU ASSEMBLY ................................................................................................................................. 6-2
6.4.1 CENTRAL PROCESSING UNIT ............................................................................... 6-3
6.4.1.1 CLOCK GENERATION ............................................................................ 6-3
6.4.1.2 CONTROL SIGNAL GENERATION................................................... 6-3
6.4.1.3 ADDRESS AND DATA BUFFERS......................................................... 6-3
6.4.1.4 MEMORY AND IO ADDRESS DECODING .................................... 6-3
6.4.1.5 INTERRUPT CONTROLLER.................................................................. 6-4
6.4.1.6 POWER SUPPLIES....................................................................................... 6-4
6.4.2 MEMORY ........................................................................................................................... 6-4
6.4.3 GPIB INTERFACE.......................................................................................................... 6-4
6.4.4 OPTICAL INTERFACE ................................................................................................ 6-5
6.5 FRONT PANEL................................................................................................................................... 6-8
6.5.1 INPUT BUFFER AND DIFFERENTIAL DRIVER............................................. 6-8
6.5.2 INPUT FREQUENCY RANGE DETECTOR ....................................................... 6-9

iv
6.5.3 OVERLOAD DETECT CIRCUIT.............................................................................. 6-9
6.5.4 POSITIVE 200 µA TO 2 A CURRENT-CELL......................................................... 6-9
6.5.5 NEGATIVE 200 µA TO 2 A CURRENT-CELL ..................................................... 6-9
6.5.6 COMPLIANCE VOLTAGE MEASUREMENT AND DISPLAY .................. 6-10
6.6 20 A CURRENT-CELL ARRAY ................................................................................................... 6-10
6.6.1 POSITIVE CURRENT-CELL..................................................................................... 6-10
6.6.2 NEGATIVE CURRENT-CELL ................................................................................. 6-10
6.7 SOFTWARE ....................................................................................................................................... 6-11
TROUBLESHOOTING AND MAINTENANCE....................................................................................................... 7-1
7.1 TROUBLESHOOTING.................................................................................................................... 7-1
7.2 PREVENTATIVE MAINTENANCE........................................................................................... 7-2
PARTS LISTS........................................................................................................................................................................... 8-1
DRAWINGS............................................................................................................................................................................. 9-1

v
LIST OF FIGURES
Figure 1.1 Model 7620 Block Diagram ............................................................................................................. 1-2
Figure 1.2 Multiple Cell Approach..................................................................................................................... 1-3
Figure 1.3 Differential Driver.............................................................................................................................. 1-4
Figure 1.4 Positive Output Current-Mirror Cell.............................................................................................. 1-5
Figure 2.1 General Outline .................................................................................................................................. 2-2
Figure 3.1 Front Panel Controls ......................................................................................................................... 3-3
Figure 3.2 Rear Panel ............................................................................................................................................ 3-8
Figure 3.3 GPIB Address Switch...................................................................................................................... 3-10
Figure 3.4 Typical Input Terminal Connections ........................................................................................... 3-10
Figure 4.1 Event Status Bit Operation ............................................................................................................ 4-10
Figure 5.1 A/C Calibration Test Set-up……………………………………………………..……..5-1
Figure 5.2 A/C Calibration Test Set-up............................................................................................................ 5-5

vi
LIST OF TABLES
Table 2.1 Basic Instrument Specifications....................................................................................................... 2-1
Table 3.1 Recommended Fuses......................................................................................................................... 3-9
Table 3.2 Line Cord Wiring................................................................................................................................ 3-9
Table 4.1 IEEE-488.1 Pin Designations ......................................................................................................... 4-4
Table 4.2 GPIB Device Capabilities................................................................................................................. 4-5
Table 4.3 Remote/Local State Transitions ..................................................................................................... 4-9
Table 4.4 Event Status Register....................................................................................................................... 4-13
Table 4.5 Status Byte Register.......................................................................................................................... 4-14
Table 4.6 Device Error Register...................................................................................................................... 4-17
Table 4.7 Device Frequency Register............................................................................................................. 4-18
Table 4.8 Front Panel Switch Character Designations ............................................................................... 4-19
Table 6.1 Switches and Status Bits.................................................................................................................... 6-6
Table 6.2 Control Bits.......................................................................................................................................... 6-7

Section 1
TM7620-G-00
1-1
INTRODUCTION
1.1 SCOPE
This manual contains technical specifications, detailed description and maintenance information, and
diagrams for the Guildline Instruments Model 7620 WIDEBAND TRANSCONDUCTANCE
AMPLIFIER.
1.2 GENERAL DESCRIPTION
The 7620 WIDEBAND TRANSCONDUCTANCE AMPLIFIER is a high accuracy wideband
transconductance amplifier with excellent long term and short term stability. The 7620 works over a
specified range of DC to 100 kHz with degraded output above 100 kHz to 1 MHz. The two input voltage
ranges accept 1 V (rms) and 10 V (rms) full scale to produce the full scale output of the selected range.
The six output current ranges source currents from 200 µA (rms) to 20 A (rms) full scale with a
compliance voltage of 10 V peak at dc and at least 7 V peak at 100 kHz. All instrument controls are
available over the GPIB except Power ON/OFF. The 7620 operates on line power of 100 V (ac),
120 V (ac), 220 V (ac) and 240 V (ac) (all ±10%) at either 50 Hz or 60 Hz. Power line voltage is selectable
on the back panel.
Uses for the 7620 WIDEBAND TRANSCONDUCTANCE AMPLIFIER include:
•Calibration of alternating and direct current shunts and resistors up to 20 A and 100 kHz
•Calibration of alternating and direct current ranges on analogue and digital multimeters
1.3 GENERAL THEORY OF OPERATION
A transconductance amplifier is a device that produces an output (IOUT) proportional to the input voltage
VIN as follows:
For the 7620
where
T is the traneconductance
R is the input stage resistor used to convert the input voltage to a current used to drive
the output stage (See Figure 1.3)
R1is the output current sensing resistor in the output stage (See Figure 1.4)
R2is the drive current sensing resistor in the output stage (See Figure 1.4)
V
T=
IIN
OUT
R
*RR
=T 1
2

Section 1
TM7620-G-00
1-2
The three resistors which determine the transconductance are selected for their frequency characteristics
and stability.
A block diagram of the Model 7620 WIDEBAND TRANSCONDUCTANCE AMPLIFIER is shown
in Figure 1.1.
VOLTAGE
INPUT
20 AMP
OUTPUT
DIFFERENTIAL
DRIVER
C.P.U.
I EEE-488
INTERFACE
COMPLIANCE
DISPLAY
OVERLOAD
DETECTOR
20 AMP
OUTPUT ARRAY
COMPLIANCE
MEASURING
CIRCUITRY
0-2 AMP
MULTI-RANGE
OUTPUT MODULE
INPUT BUFFER
AMPLIFIER
02 AMP
OUTPUT
FREQUENCY
MONITOR
Figure 1.1
Model 7620 Block Diagram

Section 1
TM7620-G-00
1-3
1.3.1 GENERAL DESIGN APPROACH
The approach used for the 7620 WIDEBAND TRANSCONDUCTANCE AMPLIFIER
is a cell-based design based on the work of Owen Laug
1
of the National Institute of
Standards and Technology. A simplified diagram of the cell-based design is shown in Figure
1.2.
Figure 1.2
Multiple Cell Approach
1
LAUG, OWEN B. A High-Current, Very-Wide-Band Transconductance Amplifier; IEEE Trans. Inst. & Meas. Vol. No.1
Feb. 1990.

Section 1
TM7620-G-00
1-4
The modular design of the high-current output stage of the 7620 allows each of the ten
modules making up the positive and the ten modules making up the negative current arrays
to operate at one tenth of the total current required from the unit. This in turn allows the
use of a higher value resistor for use as the shunt in the output circuit to sense the current.
Using a higher resistor value facilitates the use of bulk metal-foil resistor technology to
minimise temperature coefficients and drift with time, as well as keeping the reactive
component of the shunt to a minimum, thus allowing use of the amplifier to extended high
frequencies.
As shown in Figure 1.2 a differential voltage-to-current convertor circuit converts an input
voltage to a current which is then split into separate positive and negative lines to drive the
two polarity-separated output arrays. The two polarities are also driven with a small
quiescent current (300 A) to lessen non-linearities and crossover distortion as the signal
changes polarity. The overall current gain of this configuration is independent of the
number of cells, but the maximum output current is (n) times the maximum current
capability of a single cell , where (n) is the number of current-cell pairs (n=10 in the 7620
high-current output array, where each cell has a maximum capability of 2 A).
The differential input stage is shown diagrammatically in Figure 1.3. Operation of this stage
is described in the paper by Laug.
TO INPUT OF
CELL ARRAY
TO INPUT OF NEGATIVE
CELL ARRAY
Q1
Q4
R
+15V
-15V
-15V
INPUT
Vi(+)
+15V
+15V
INPUT
Vi(-)
+15V
U1
U2
Q5
Q6
Q2
Q3
-15V
-
+
-
+
+
+
Figure 1.3
Differential Driver
The two operational amplifiers, U1 and U2 are each connected as unity gain amplifiers. An
input voltage Vi, applied to the input terminals is forced across the resistor R, resulting in a
current equal to Vi/R. Depending on the polarity of the input voltage, the current through

Section 1
TM7620-G-00
1-5
R is steered by Q2 and Q3 either to the negative-cell or out of the positive-cell input. Q4
serves as a dc current source to provide a fixed level of equal quiescent current for positive
and negative cells. This feature effectively separates the input-voltage terminal from the
common side of the output load-current terminal and interrupts possible ground loops
when dealing with high output currents at high frequencies.
The output current-cell array consists of pairs of positive and negative current-cells. Figure
1.4 shows the basic version of a positive current-mirror cell used in the output array. The
negative current-cell has the same configuration but uses complementary devices and
reversed power supply voltage polarities.
Figure 1.4
Positive Output Current-Mirror Cell

Section 1
TM7620-G-00
1-6
From Figure 1.4 it is seen that an input current Iin causes a voltage drop across resistor R2,
which in turn causes the operational amplifier U1 to turn on the bipolar power transistor
Q1. Output current Iout through R1 is regulated when the voltage drop across R1 equals the
voltage drop across R2. Q1 is selected for a 7 A maximum continuous drain current rating.
Transistor Q2 serves as a buffer for U1 in order to supply the current necessary to drive
the large inter-electrode capacitances associated with Q1. The transformer in the source
circuit provides stability and is designed to set the upper cut-off frequency of the cell's
current gain. Output compliance voltage is determined primarily by the supply voltage at
the (R1 - R2) node minus the voltage drop across Q1.
1.3.2 7620 FEATURES
1.3.2.1 COMPLIANCE VOLTAGE DISPLAY
The design of the 7620 includes a maximum output compliance voltage ranging
from 10 volts at dc (and low frequencies) to 7 volts at 100 kHz. A 4-digit meter is
fitted to the unit to indicate the compliance voltage level existing at the output
connector. This is achieved by using a commercial rms-to-dc convertor integrated
circuit and a single-chip a/d convertor/digital panel meter.
1.3.2.2 FREQUENCY MONITOR
Since the maximum available current and the compliance voltage are both dependent
to some extent on the frequency of the input, a detector is included to inform the
user of the 7620 of the frequency of operation. For convenience, the operating
frequency spectrum is split into 3 bands: (0 to 100 kHz), (100 kHz to 750 kHz), and
(750 kHz to 1 MHz). A commercial frequency-to-voltage convertor integrated circuit
is used to produce an rms output voltage proportional to the input frequency. This
voltage is fed into a voltage comparator circuit to produce 3 exclusive signals which
drive three Light-Emitting Diodes (LED's) on the front panel and also to provide an
input to the overload detector circuit so that the area of operation can be predicted.

Section 1
TM7620-G-00
1-7
1.3.2.3 4-WIRE INPUT BUFFER AMPLIFIER
The provision is added for a 4-wire input to the unit which allows the use of the
4-wire sensing available on most accurate voltage sources. This enables sensing of
the input voltage directly at the input of the first amplifier in the driver circuitry of
the 7620.
1.3.2.4 OUTPUT CURRENT-CELL ARRAY
The 7620 contains a high output current-cell array assembly that provides a 20 A
output capability. The output current offset exhibited by the 20 A array is of the
order of 2 mA total error which equates to 100 ppm of full scale. For lower value
currents (up to 2 A) a single current-cell configuration is provided at a second output
connector. This lower current-cell configuration includes switchable current shunts
to provide decades of output currents (200 µA, 2 mA, 20 mA, 200 mA, 2 A) for the
same drive from the differential driver assembly. When making measurements of
current, one of the main sources of error is leakage between the "HI" and "LO"
sides of the measurement system before the current reaches the shunt under test. To
help alleviate this problem an "OUTPUT GUARD" terminal is added to the 7620.
This output guard provides a buffered signal whose potential follows that of the
output current "HI" terminal. This buffered guard signal can be used in a triaxial
arrangement to prevent either capacitive or resistive leakage between the
output-signal conductors.
1.3.2.5 IEEE-488 INTERFACE (CPU)
To allow use in automated testing and calibration configurations the 7620 is
controllable via the IEEE-488 bus. A microprocessor-controlled IEEE-488
interface is included to handle the implementation of instructions and the reporting
of instrument status. The microprocessor used is the Intel 80188 with the Texas
Instruments TMS9914 integrated circuit.
1.3.2.6 OVERLOAD PROTECTION
An overload detection circuit block is included in the 7620 to give an indication over
the IEEE-488 bus and on the front panel, of whether the instrument is being used
within its specified operating limits. This function is achieved by using the
microprocessor to monitor information from the frequency monitor, and
compliance voltage display circuitry. The microprocessor block produces an output
logic signal that is set when an operating point outside the designed area is selected.
This signal causes :
- a lamp to light on the front panel
- the unit to disconnect the drive to the current-cell array
- a bit in the status byte to be set
- and an SRQ to be generated on the bus.

Section 1
TM7620-G-00
1-8
To allow use of the amplifier outside its specified operating area (but within its safe
limits), an override overload switch on the front panel is provided. This switch will
allow the user to have continued operation in the unspecified area without the unit
tripping out. However, the status byte and the SRQ will still be generated. If an over
limit situation occurs (110% of input) the 7620 will however disconnect the
current-cell array drive independent of the override switch position.

Section 2
TM7620-G-00
2-1
SPECIFICATIONS
Specifications for Guildline Instruments
7620 WIDEBAND TRANSCONDUCTANCE AMPLIFIER
Operating Temperature
18 -40
64 -104
C
F
Operating Humidity non-condensing
18C to 28C
28C to 40C
<70
<50
% rh
% rh
Storage Temperature
-20 to 60
-4 to 122
C
F
Storage Humidity
15 to 80
% rh
Power Requirements
600
VA
Voltage Requirements
100, 120, 220, 240 ±10%
V (ac)
Line Frequency
50, 60
Hz
Dimensions
(H) 178 (W) 483 (D) 457
(H) 7 (W) 19 (D) 18
mm
in
Weight
20.5
45.0
kg
lbs
Table 2.1
Basic Instrument Specifications

Section 2
TM7620-G-00
2-2
Figure 2.1
General Outline
Maximum Compliance Voltage: 10 V at dc
5 V (rms) at 100 kHz
Peak Output Current (dc):35 A
Maximum Continuous Output Current (dc): 20 A
Maximum ACrms Output Current: 20 A at 100 kHz
Bandwidth: DC to 100 kHz at 20 A
Degraded performance above 100 kHz to 1 MHz
Settling Time: 1 s to full specification
Input Voltage: 1 V input max. = 1 V (rms)
10 V input max. = 10 V (rms)
Offset Current:0.01% of range
Input Impedance:100 k
Load Compliance:Resistive & Capacitive Loads to full V-I compliance
Inductive Loads to 125 H
Short Term DC Stability: ±100 ppm over a 30 minute period, where the absolute
value is defined as 2 times the standard deviation of the
measurement at full scale, excluding noise, at 10 samples
maximum per second.