Highland T560 User manual

T560
DIGITAL
DELAY
GENERATOR
Technical Manual
February 13, 2019

2 T560MANK5.DOCX
Copyright © Highland Technology
650 Potrero Avenue, San Francisco, CA 94110
Phone 415-551-1700 • Fax 415-551-5129
www.highlandtechnology.com
NOTICE
HIGHLAND TECHNOLOGY, INC. PROVIDES THIS PUBLICATION “AS IS” WITHOUT
WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE.
(Disclaimer of expressed or implied warranties in certain transactions is not allowed in
some states. Therefore, the above statement may not apply to you.)
This manual may contain technical inaccuracies and/or typographical errors. Changes are
periodically made to this manual which are incorporated in later editions. Highland
Technology, Inc. may make changes and improvements to the product(s) and/or programs
described in this publication at any time without notice.
The T560 has finite failure rates associated with its hardware, firmware, design, and
documentation. Do not use the product in applications where a failure or defect in the
instrument may result in injury, loss of life, or property damage.
IN NO EVENT WILL HIGHLAND TECHNOLOGY, INC. BE LIABLE FOR DAMAGES,
INCLUDING LOST PROFITS, LOST SAVINGS OR OTHER INCIDENTAL OR
CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF OR INABILITY TO USE
SUCH PRODUCT, EVEN IF HIGHLAND TECHNOLOGY, INC. OR AN APPROVED
RESELLER HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, OR FOR
ANY CLAIM BY ANY OTHER PARTY.

3 T560MANK5.DOCX
TableofContents
1.Introduction ....................................................................................................................6
2.Specifications: T560 Delay/Pulse Generator .................................................................8
3.Overview of the T560...................................................................................................10
3.1.Standard Packaging ..............................................................................................10
3.2.Overall Block Diagram ...........................................................................................10
3.3.Crystal Oscillator Timebase ...................................................................................11
3.4.Trigger Inputs.........................................................................................................12
3.5.Burst Logic.............................................................................................................13
3.6.Pulse Outputs ........................................................................................................14
3.7.Gate I/O .................................................................................................................17
3.8.Communications and Control.................................................................................17
3.9.Connectors ............................................................................................................17
3.10.Power Input ........................................................................................................17
3.11.Custom Logic......................................................................................................18
3.12.Indicators............................................................................................................18
4.Programming ...............................................................................................................19
4.1.General Comments................................................................................................19
4.2.Command Strings ..................................................................................................19
4.3.Command Structure...............................................................................................21
4.4.Realtime Issues .....................................................................................................21
4.5.T560 Command Summary.....................................................................................23
4.6.Command Details ..................................................................................................25
4.6.1.CHANNEL SET COMMANDS.........................................................................25
4.6.2.TRIGGER SETUP COMMANDS.....................................................................26
4.6.3.SYNTHESIZE COMMAND..............................................................................27
4.6.4.BURST COMMANDS......................................................................................27
4.6.5.GATE COMMANDS ........................................................................................27
4.6.6.CLOCK COMMANDS......................................................................................28
4.6.7.FEOD COMMAND ..........................................................................................29
4.6.8.SAVE, RECALL, LOAD COMMANDS.............................................................29
4.6.9.USEC, WAIT, IRQ, SHOTS, TEMP COMMANDS ..........................................29
4.6.10.IDENTIFY COMMAND.................................................................................29
4.6.11.ERRORS COMMAND..................................................................................29
4.6.12.VERBOSE COMMAND................................................................................30
4.6.13.HELP COMMANDS .....................................................................................30
4.6.14.STATUS COMMAND...................................................................................30
4.6.15.RSET COMMAND .......................................................................................31
4.7.Firmware Upgrade Procedure................................................................................31
5.Powerup States and Saved Setups .............................................................................32
6.Xport Ethernet Module Setup.......................................................................................33
6.1.DHCP.....................................................................................................................33
6.2.Static IP Assignment..............................................................................................33
6.3.Factory XPort Settings ...........................................................................................34
7.Jitter Notes...................................................................................................................38
8.Dimensions and Mounting ...........................................................................................41
9.Demo Software ............................................................................................................45

4 T560MANK5.DOCX
10.Versions ....................................................................................................................46
11.Revision History ........................................................................................................47
11.1.Hardware Revisions ...........................................................................................47
11.2.Firmware Revisions ............................................................................................48
12.Accessories...............................................................................................................49

5 T560MANK5.DOCX
TableofFigures
Figure 3-1 T560 Basic Block Diagram ................................................................................11
Figure 3-2 Trigger and Sequencing Logic...........................................................................13
Figure 3-3 Typical T560 channel outputs into 50 ohms. Risetime is 640 ps. .....................14
Figure 3-4 Output rising edge, 100 ps delay steps.............................................................15
Figure 3-5 Trigger and output pulses, widths 4ns, 3 ns, 2 ns, and 1.5 ns ...........................16
Figure 4-1 Typical T560 Status Report ...............................................................................31
Figure 6-1. Lantronix DeviceInstaller Main Screen .............................................................33
Figure 6-2. IP address assignment pane. ...........................................................................34
Figure 6-3. XPort Home Web Page ....................................................................................35
Figure 6-4. XPort Network Settings.....................................................................................35
Figure 6-5. XPort Server Settings .......................................................................................36
Figure 6-6. XPort Serial Settings ........................................................................................36
Figure 6-7. XPort Connection Settings................................................................................37
Figure 7-1 Typical T560 jitter in ps RMS versus delay........................................................39
Figure 7-2 Typical T560 Rising Edge, Externally triggered, delay = 100 ns........................40
Figure 8-1 T560 Outline and Mounting ...............................................................................42
Figure 8-2 Flange Mounting Dimensions ............................................................................43
Figure 8-3 Printed-Circuit Board Dimensions......................................................................44

6 T560MANK5.DOCX
1.
Introduction
The T560 is a small, enclosed digital delay/pulse generator which is intended for use in
embedded OEM applications. Given an internal or external trigger, it outputs four precisely-
timed pulses. The T560-1 is the standard, packaged version, usable directly in many OEM
applications and as the evaluation unit for custom versions.
Features of the T560-1 include:
Four TTL-level pulse outputs, each programmable for delay and width up to 10
seconds each, with 10-picosecond resolution.
DSP phaselock system combines crystal-clock delay accuracy with low jitter from
asynchronous external trigger.
Internal 10 MHz crystal oscillator timebase with external lock capability.
0-16 MHz DDS synthesizer for internal trigger rates.
Programmable-level trigger input with divide/burst features and trigger enable GATE
input.
Needs only +12 volt power from external universal power supply.
Extruded enclosure with removable mounting flange.
RS-232 serial interface.
The T560-2 version includes all the above features and adds a 10/100-mbps Ethernet
interface.
Customizable features include:
Alternate timing algorithms
Number of timing channels, 1 to 8
Packaged or bare-board
Alternate connector types and locations
OCXO timebase
Low impedance outputs, 4 volts min into 50 ohms.
Extended temperature ranges and conformal coating

7 T560MANK5.DOCX
Highland can also provide benchtop pulse/delay generators or OEM timing packages that
include picosecond-resolution time-interval measurement, ultrafast or high-voltage outputs,
optical interfaces, and precision analog measurement.
Since creating new versions of the T560 involves hardware or firmware changes,
customization is normally done under a contractual OEM agreement with associated
purchase commitments. Custom versions will be identified by a "dash" number, starting
with T560-10.

8 T560MANK5.DOCX
2.
Specifications: T560 Delay/Pulse Generator
FUNCTION 4-channel di
g
ital dela
y
and pulse
g
enerato
r
GATE FUNCTION Programmable as level sensitive enable input, edge triggered
burst enable input, or divisor enabled output
GATE INPUT Programmable termination, 50 Ωor 500 Ωto +2.5 V
Logic low -0.3 V min, +0.7 V max
Lo
g
ic hi
g
h +2 V min, +5 V max
GATE OUTPUT Logic low +0.1 V typical, +0.4 V max @ 50 mA
Lo
g
ic hi
g
h +5 V t
y
pical, +4 V min
@
50 m
A
TRIGGER SOURCES Internal DDS: 0 to 16 MHz, 0.02 Hz resolution
Internal clock: 80 MHz
Remote command or External si
g
nal
TRIGGER DIVISOR 1 to 232-1, 125 MHz max input
EXTERNAL
TRIGGER INPUT
Programmable termination, 50 Ωor 10 kΩto ground
Pro
g
rammable tri
gg
er level
(
+0.25 to +3.3 volts
)
and slope
CHANNEL OUTPUTS
A
, B, C, D
Four pulse outputs, 5 V, 50 Ωsource impedance, each
pro
g
rammable for dela
y
, width, polarit
y
DELAY RANGE 0 to 10 seconds, 10 ps resolution
WIDTH RANGE 2 ns to 10 seconds, 10 ps resolution
INSERTION DELAY 21 ns ± 400 ps, external tri
gg
er to an
y
output
DIFFERENTIAL
NONLINEARITY
< 200 ps
JITTER < 35 ps typical (50 ps max) RMS, external trigger to any output or
between any outputs
A
dd clock
j
itter for dela
y
s > 500 μs
TRIGGER RATE 0 to 16 MHz, limited to 1/
(
dela
y
+width+60 ns
)
max
RISETIME 750 ps max
FALLTIME 750 ps max
CLOCK Internal 10 MHz VCXO, 1 ppm initial accuracy, < 2 ppm/year drift
Added jitter below 10 ns per second of delay
TC below 0.2 PPM/°C
Connector provides clock in/out
Locks to external source
Clock jitter and delay errors are zero relative to external source
Optional hi
g
he
r
-performance OCXO
TIMING
A
CCURACY ± 400 ps ± 7.5 ps/°C ± clock accurac
y
BURST Programmable to fire N times out of each M triggers
where N and M are 1 to 232-1
OPERATING
TEMPERATURE
0 to 50°C, non-condensing
STORAGE
TEMPERATURE
-20 to 80°C
CALIBRATION
INTERVAL
One year
POWER +12 ± 0.25 volts, 0.3 amps max; 0.4 amps max with Ethernet
Universal AC adapter supplied with evaluation packa
g
e

9 T560MANK5.DOCX
COMMUNICATIONS RS-232 standard, 38.4 kbaud
Optional 10/100 Ethernet
CONNECTORS 7 SMB for trigger, gate, clock, outputs
2.5 mm stereo jack for RS-232
0.25″power connector
Optional RJ45 for Ethernet
INDICATORS LEDs indicate shot, communications
PACKAGING 4.75”
(
L
)
x 4.0”
(
W
)
x 1.25”
(
H
)
extruded aluminum enclosure
CONFORMANCE OEM product has no UL/FCC/CE compliance requirements
Desi
g
ned to meet UL/FCC/CE requirements

10 T560MANK5.DOCX
3.
Overview of the T560
The T560-1 is an embedded digital delay/pulse generator. It accepts a trigger pulse and
generates up to four output pulses, with each pulse being individually programmable in
delay and width. Triggers may be external, internal, or evoked through the communications
interface. Timing has crystal-clock precision with picosecond jitter relative to an external
trigger.
Each output is user programmable for delay (0-10 seconds) and width (0-10 seconds) with
10 ps resolution. When externally triggered, all delays are relative to the basic 20 ns
insertion delay.
3.1.
Standard Packaging
The standard T560-1 unit is packaged in a small extruded aluminum enclosure. The
Ethernet connector is provided on the T560-2 version. Section 7 of this manual provides
detailed dimensions.
3.2.
Overall Block Diagram
Figure 3-1 T560 Basic Block Diagram is the block diagram of the T560-1. OEM versions
may include various features of the module. The optional Ethernet interface is not furnished
on the standard T560-1 version.
The T560 digital delay generator creates delays by digitally counting a basic clock to create
coarse delays to a resolution of 20 nanoseconds, and then adding a fine analog delay to
interpolate the final times to picosecond resolution. The timing clock is derived from a 50
MHz gated oscillator which is started when an internal or external trigger is received. A
DSP-based phaselock system digitizes and compares the waveforms generated by this
oscillator to that of a precision 10 MHz crystal oscillator and servoes the gated oscillator to
be as accurate as the crystal while still maintaining the timing relationship to the original
trigger.
The T560-1 supplies four TTL pulse outputs, each programmable in delay and width.
Custom versions of the T560 can provide up to eight independent delay outputs.
Because the all-digital phaselock system uses no drift-prone analog signal storage
elements, long-delay accuracy and jitter depend only in the quality of the internal or
external 10 MHz timebase.

11 T560MANK5.DOCX
3.3.
Crystal Oscillator Timebase
The standard T560 includes a 10 MHz VCXO crystal oscillator timebase. It is factory-set to
an accuracy of ±1 PPM and may be expected to drift less than 2 PPM per year. A trim DAC
is provided to allow user commands to readjust the oscillator frequency as desired, with the
setting stored in nonvolatile memory.
A connector is provided which allows the internal oscillator to provide a 10-MHz output, or
allows an external 10-MHz source to be accepted. This allows multiple T560s to be
synchronized to each other or to an external 10-MHz reference. The external clock levels
are 3.3 volt square-wave CMOS logic levels. The T560 can lock to an externally-applied
square wave of 10 MHz +-50 PPM, 3.3 to 5 volt positive logic levels, or to a 1 volt RMS sine
wave.
The long-delay (millisecond range) jitter performance of the T560 is dominated by the
phase noise of the internal crystal oscillator or the equivalent phase noise of a user-
provided external reference.
Custom versions may include a higher-precision OCXO timebase. Multiple T560 units may
be locked to one another to ensure timing coherence.
Fi
g
ure 3-1 T560 Basic Block Dia
g
ram

12 T560MANK5.DOCX
3.4.
Trigger Inputs
Figure 3.2 is a simplified diagram of the T560 trigger and sequence logic. Any one of five
available trigger sources may be selected to fire the system: External+, External-, an
internal 80-MHz clock, the internal 0-16 MHz DDS synthesizer, and the user software
trigger. The selected trigger is divided by a programmable factor K from 1 to 2^32-1 and
supplied to the cycle-start HIT flipflop. The hit flopflop is enabled by the gating/burst logic.
Once the flipflop is fired, eight identical timing blocks generate delays A1 through D2, each
programmable from 0 to 20 seconds in 10-ps steps. Pairs of delays are combined to result
in four outputs, each a pulse whose delay and width are programmable with respect to the
common trigger. When all delay blocks have timed out, the EOD (end-of-delay) logic resets
the hit flipflop for about 50 ns, after which the system is enabled to accept another trigger.
The standard external trigger is a positive level, with trigger threshold programmable from
+0.25 to +3.3 volts and selectable rising/falling edge. The trigger input may be programmed
to be high impedance or a 50-ohm termination to ground. Maximum safe input levels are -
0.3 to +5.0 volts.
The maximum allowed trigger rate is
R = 1 / (D + W + 60 ns)
where D + W is the greatest channel sum of programmed delay plus width, and R is limited
to 16 MHz max. If a channel is programmed OFF, its time settings are not relevant. If the
T560 receives an internal or external trigger while a timing cycle is still busy, that trigger will
be ignored.
An internal 80 MHz clock (exactly 8x the main 10 MHz clock) may also be selected as the
trigger source. When it is used, a trigger divisor K must be programmed to keep the trigger
rate at or below 16 MHz.
The internal DDS synthesizer allows internal triggering at rates from 0 to 16 MHz with 0.02-
Hz resolution. The DDS synthesizer has a period jitter of about 1 part in 20,000, which can
be substantial in absolute terms at lower requested frequencies. Both period jitter and
resolution can be improved by keeping the DDS frequency in the 2-10 MHz range and
using the internal trigger divisor facility to get lower trigger rates.
External triggers up to 125 MHz can be accepted, given that a programmed divisor or the
inherent busy-cycle limitation will restrict the actual trigger rate to some countdown fraction
of the input frequency below 16 MHz.

13 T560MANK5.DOCX
3.5.
Burst Logic
The burst logic allows the user to define two integers N and M, each in the range of 1 to
2^32-1. The T560, when triggered, will respond to a burst of N triggers every M triggers.
For example, if N = 2 and M = 5, trigger response will be Fire, Fire, Skip, Skip, Skip,
repeated indefinitely. N/M is thus the trigger duty cycle.
If either N or M is programmed to be 0, the burst logic is disabled.
Burst cycles may "free run", continuously generating N of every M possible cycles. The
internal burst logic may be reset by a user command, so that the next trigger will start a
new burst of N outputs.
A single burst of N cycles may be started under control of the GATE input or on software
command. If GATE mode is set to BURST ( command GAte BUrst), the next active edge
of the GATE input will enable a single burst of N cycles. Similarly, the GAte REmote mode
enables a user-fired burst, started by the GAte FIre serial command. In both cases, M
must be set greater than or equal to N. If M is greater than N, additional burst starts will be
locked out until a full M triggers have been received.
Fi
g
ure 3-2 Tri
gg
er and Sequencin
g
Lo
g
ic

14 T560MANK5.DOCX
3.6.
Pulse Outputs
Four pulse outputs are provided, called channels A, B, C, and D. Outputs are +5 volt
CMOS levels with a 50-ohm source impedance. They can drive 5 volts into a non-
terminating load, or 2.5 volts into a 50-ohm load. Because they are source terminated, they
may drive a 50-ohm coaxial cable any distance into any termination impedance without
significant reflection problems. For example, a 100 ohm termination will provide a clean 0 to
+3.3 volt logic swing. External passive components can be used to convert to ECL or PECL
levels.
Each output is programmable for pulse delay and width relative to the trigger. If an output is
programmed for delay D, the actual output pulse will occur at D + 20 ns after the external
trigger, where 20 ns is the basic insertion delay of the T560. Pulse outputs are normally
active-high, but may be programmed to operate active-low.
Figure 3-3 Typical T560 channel outputs into 50 ohms. Risetime is 640 ps.

15 T560MANK5.DOCX
Figure 3-4 Output rising edge, 100 ps delay steps

16 T560MANK5.DOCX
Figure 3-5 Trigger and output pulses, widths 4ns, 3 ns, 2 ns, and 1.5 ns

17 T560MANK5.DOCX
3.7.
Gate I/O
A GATE coaxial connector is provided; it is pulled up to +5 volts through a 1K resistor or
may, under software control, be terminated at 50 ohms to ground. GATE may be
programmed as an input or as an output. As an input, it may be programmed to enable
triggers, with high or low being the active level. As an output, it will go true (selectable high
or low) to indicate that the HIT flipflop is armed and ready to accept triggers. The gate logic
may also be used to enable a single burst of N pulses, with the burst being evoked by a
rising edge at the GATE connector input or by remote command.
3.8.
Communications and Control
The standard T560-1 is equipped with a 38.4-kbaud RS-232 interface. The T560-2 version
adds a 10/100 Ethernet interface. If the Ethernet option is installed, both the Ethernet and
RS-232 ports will be functional, but commands should not be sent to the T560 through both
ports simultaneously.
3.9.
Connectors
Standard logic-level connectors are right-angle SMBs.
Other connector types are available on OEM versions. Connectors may be straight or right-
angle, SMB, MCX, or LEMO, mounted topside or bottom. Hirose H.FL or U.FL surface-
mount connectors can also be provided on either side of the circuit board. Because of the
close spacing of the connectors, SMA types are not recommended.
A three-foot SMB-to-BNC cable is available as Highland part number J53.
A miniature 2.5-mm stereo phone jack is used for the RS-232 serial interface; a mating
connector and cable is available, terminated with a female D9 connector, and may be
plugged into the serial port of a standard PC. The cable assembly is Highland Part Number
T565.
Pinout of the serial connector is:
Tip RXD serial data to T560 to PC D9-3
Rin
g
TXD serial data from T560 to PC D9-2
Ground to PC D9-5
3.10.
Power Input
The T560 requires +12 volts DC at 0.3 amps max, 0.4 amps for the Ethernet version. A
wall-plug universal power supply is furnished with the evaluation kit, or users may supply
+11.75 to +12.25 VDC power. The evaluation power supply with US plug is Highland part
number J12. The international AC plug adapter kit is part number J14.

18 T560MANK5.DOCX
The standard power connector is a 2.1 x 5 mm coaxial power type, center positive. OEM
versions can alternately be provided with a Phoenix terminal block for power input, or a D9
combined power/RS232 connector.
The T560 power input is protected by a self-resetting polyfuse and a transzorb zener diode,
and will withstand reasonable overvoltage or polarity reversal.
3.11.
Custom Logic
Custom logic functions are available. Since the T560 incorporates eight internal delay
generators, up to eight delay-only or delay-plus-fixed-width outputs can be provided.
3.12.
Indicators
Three LED indicators are provided:
The green PWR LED indicates that power is available. It also blinks at a 1-Hz rate to
indicate CPU heartbeat. Its color changes to yellow if any an internal error conditions are
sensed.
The blue TRIG LED flashes whenever the T560 is triggered.
The COMM LED flashes yellow when any serial character is received and green when the
T560 formats a reply.

19 T560MANK5.DOCX
4.
Programming
4.1.
General Comments
The T560 accepts ASCII serial commands from the standard RS-232 interface or from the
optional 10/100 Ethernet adapter. Refer to Section 6 for details about configuring the
Ethernet interface.
For evaluation, serial commands may be typed using any common serial communications
program, for example HyperTerminal (for RS-232) or the standard "Telnet" utility for the
Ethernet version. A family of HElp commands is available, summarizing serial commands
and operating modes. The STatus command will send back a summary of T560 settings.
The standard baud rate is 38,400. The receive buffer is limited to 256 bytes, and the T560
ignores serial input while it is processing the current command line.
In the following section, text using this font...
TLevel <cr>
represents a command string sent to the T560, terminated with a carriage return character
<cr>, and italic text...
1.25 <cr> <lf>
represents the reply from the T560. All commands must be terminated with semicolon or
<cr>, and all reply lines are terminated by <cr> <lf>.
4.2.
Command Strings
Users send serial ASCII command strings to the T560, to which the T560 immediately
replies. Because the standard baud rate is high, and because the T560 may spend a
millisecond or more to process commands, user software must wait for a response to each
command line before sending another command.
Each command consists of a command keyword, followed by an optional alpha or numeric
argument. Multiple commands may be sent in a single line, separated by semicolons.
When a full line is received, indicated by the final <cr> character, the buffered line is
executed, in the order received.
Keywords may be fully spelled out, or may be sent as their first two letters; only the first two
letters are significant. In this documentation, a word that has two possible forms is written
with the short form capitalized, and the rest of the word in lower-case letters. The actual
T560 protocol is case insensitive.
For example, TRigger indicates that the short form is TR, and the long form is TRIGGER,
both of which are recognized commands.

20 T560MANK5.DOCX
All forms are case insensitive. One or more spaces are required to separate keywords from
arguments.
A delay or width is sent as
ADelay 23.5u
CWidth 40n
Acceptable suffixes are:
p - pico (1E-12)
n - nano (1E-9)
u - micro (1E-6)
m - milli (1E-3)
and exponential notation is not supported. Default is nanoseconds.
Trigger levels are sent in volts, as TLevel 1.50
Most value-setting commands may be sent without an argument, in which case they
become queries of the associated value.
ADelay (no argument)
evokes the reply
02.123456789123
which represents the delay setting for the rising edge of the A output in seconds.
Since such long strings of numbers are difficult to read, a "verbose" mode is available,
which will send times and other long numbers in the form
02.123,456,789,123
Certain incoming ASCII characters are treated specially:
All lowercase letters are converted to uppercase
TAB is treated as a space
ETX, ESC, and DEL are equivalent to BS, command line abort.
Colon is translated to semicolon, the command separator
Most other characters, including + - , * ? and linefeed, are ignored.
A "blank" input line, <cr> only, evokes the response T560 <cr> <lf>
The T560 does not support hardware or software flow control. Other baud rates are
available on special order.
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