JRC JRL-2000F User manual

HF LINEAR AMPLIFIER
Manual

Preface
This manual providesinformationrequiredfor maintenanceand troubleshootingproce-
dures of the
JRL-2000F. Referto the instructions manualfor operation.

Contents

1 .Specifications
Operatingfrequency
bands
:I .8 MHz band 1.a00 to 2.000
3.5
MHz band 3.500 to 4.000
7 MHz band 7.000 to 7.300
10
MHz band 10.100 to 10.150
14
MHz band 14.000 to 14.350
18
MHz band 18.068 to 18.168
21
MHz band 21.000 to 21.450
24
MHz band 24.890 to 24.990
28
MHz band 28.000 to 29.700
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Ratedoutput power
:SSB 1 kW PEP* 100°' duty cycle; 24 hour.
CW 1 kW* 100% duty cycle, 24 hour.
FSKISSTV 1 kW 100% duty cycle, 114 hour.
Output impedance
:50 R unbalanced, VSWR 3.0 (1 6.7 to 150 Q)
Harmonics :-60 dB or less
Intermodulation
distortion(IMD)
:-35 dB or less below PEP (at 1kW output)
Input impedance :50R unbalanced
Excitingpower
:100W max.
Frequencyswitching
time
: Lessthan 0.1 sec.
Powersupply voltage : 85 to 264 V AC, single-phase
Powerconsumption
:2.5 kVA or less (at 1 kW output)
lnput powerfactor
:95% or more (at 1 kW output)
Temperature range
:-10°C to 40°C
Protectioncircuits :PA excesscurrent; PA overheat; PA abnormal load;
AC power supply excess voltage; power supply overheat;
PA failure; excessive antenna
VSWR; excitingpower
excess; and antenna matchinganomaly.
Dimensions
:430(W) X 300(h) X 402(D) mm
Weght
: Approx. 28Kg
* Note :Rated output on 200 to 240V AC. The rated output power on 100 to 120V AC is 750W PEP.
3

2. Circuit Description
2.1 Configuration and Outline
The cabinet of the JRL-2000Fconsists of a front panel, a top cover, a bottomcover, a
rear panel and a mainchassis.
.
The equipment of the cabinetconsists of the followingfive units:
The operation of each unitwill be described below. Refer to the ExternalView (page
30) for the general configuration and Print Circuit Board Layout (page 55) for the parts
layout of the unit, respectively.
Unit Name
Power amplifier
Power supply unit
Matchingcircuit
Antenna switch
Control
Switch panel
Display
2.2 NAH-232 Power Amplifier Unit
Installation Position
At the bottom of the main chassis onthe righted side
At the bottom of the main chassisonthe left-handside
Upper part of the main chassis
Upperpart of the rear panel
Upper part
of the main chassis
Front panel
This unit is attachedto the lower part of the main chassis onthe righthandside. It
amplifiesthe drive inputpower sent from the exciter upto the rated output power by
the wide-bandlinear power amplifiers.
This unit consists of two CAH-377power amplifiers attachedto each heat sink respec-
tively, a CCB-367
PA control circuit attachedto the upper side of the heatsink, a CFF-
361 power combiner circuit attached to the bottom side of the heat sink, and a cooling
fan.
2.2.1 CAH-377 Power Amplifier
CAH-377power amplifier consists of two identicalwide-band linear ampliferswhich
operate independentlyof each other on the printed circuit board. Eachwide-band
amplifier has 12RFpower MOSFETsand amplifies a 20
W PEP input powerto 250W
PEP.
The RF power MOSFETis new generation's power device which has excellent resis-
tance to thermal stress and reflected power, a high linearity and a low high-order
intermodulationdistortion(lMD), as compared with the conventional bipolar transistor.
As the two wide-band linear amplifiers havethe same circuit, the circuit operationwill
be describedfor the left part of the connection diagram on page
39.
The input power signal from J1 is sent to the input transformer TI,and divided into
two signals with 180" phasedifference.
4

C1, C2, C5, R1 and R2compose of a circuit which matches an inputimpedance.
TI1andT21 are transformers which insulatethe excitation signal from ground level.
Thetwo excitationsignals are consumed by R17to R20and R27 to R30which are the
gateterminating resistors of the RFpower MOSFET.
As a
RF hasthe insulatedgate, itcan be assumedthat only the equivalent input
capacitanceexists between gate and source.
The gate terminating resistorshunts this inputcapacitance.
The RFpower MOSFETTRI1to TRI
6 are connectedparallel.They are excited by
the signalvoltage at bothends of the gate terminating resistor and they amplifythe
output current in a half cycle. On the other hand, TR21 to TR26 amplifythe output
current inanother half cycle. These output currents of half-cyclesare fed to the pri-
mary winding of the output transformer T5 andthe current waveform of full-cycle is
composed. These output currents flow to the loadcircuit via output terminal
J4.
As a result,the upper part of the output voltage waveform isamplifiedby TRI1to
TR16,and the lowerpart by TR21 toTR26.
The SEPP circuit, incontrast to the transformer-coupledpush-pullcircuit, seldom
generatesa phasedifference when composingoutput waveforms. Therefore, a wave-
form with less distortion can be obtained.
Thetransformer
T3 provides a gate-biasvoltage to the RFpower MOSFETfor the
operation inclass
AB.
A DC biasvoltage of approx. 2.5 V is providedthrough T3 to each RFpower MOSFET
from CCB-367 PA control circuit. The resistors
R61 and R62,connectedbetweenthe
4
thirdwinding of T3 and the second winding of the inputtransformer TI, work as a
negativefeedback.
(Note):The chips with same charasteristicsare packagedto the RFpower MOSFET
2SK408 and 2SK409. However, the lead layoutdiffers.

2.2.2 CCB-367 PA Control
CCB-367PA control isattachedto the upper side of the power amplifier unitand is
equippedwith a bias voltage control circuit for the two power amplifiers, a coolingfan
control circuit, protectioncircuits and an input power splitter.
1)PowerAmplifier Bias Voltage Control Circuit -
As the RFpower MOSFETof CAH-377 power amplifier operates in class AB, the DC
bias voltage which determines the operating point current (idling current) is essential.
The gain of the power amplifier can bechanged bychanging the DC bias voltage.
The normal bias voltage is about 2.5V DC
. However,the bias voltage varies accord-
ingto the
KEY signal state or the temperature change of the heat sink to get the
optimum gain of the power amplifier.
IC4(1/4to 414) and IC5(1/4to 414) are DC amplifierswhich send out a bias voltage to
the RFpower MOSFETblock of each SEPP circuit. This bias voltage can be adjusted
with variable resistors RV11 to RV14and RV21 to RV24. The reference voltage for
this bias voltage is obtained from the developed voltage between the base and the
emitter of TRI and TR2. TRI and TR2 are attachedtothe side part of the heat sink of
CAH-377power amplifier. As the base-emitter is driven by a constant current,the
base-emittervoltage depends onthe temperature of the heat sink.
The base-emittervoltage is amplified by the DC amplifier IC3 (414) and sentto each
power amplifier block as a biasvoltage
.
As the RFpower MOSFET, employed inthe JRL-2000F, has a negativethermal
coefficient,the gain decreases when the temperature of the heat sink rises. To com-
pensatethis, TRI and TR2 check the temperature of the heat sink and operateto
keepthe gain constant, regardlessof the temperature change, by controllingthe bias
voltage.
The comparator IC3 (314) controls the bias voltage by referencingthe
KEY signal.
Fig.2 shows each waveform of the signal voltage.
KEY
& PTT signal @ from outside, passes the time-constant circuit composedof C1
and R2, and is switchedby the comparator. The comparator output @, sent out from
No.14 pinof lCl , passesthe time-constant circuit composedof R5, CD14 and C2, and
the
DC amplifier IC3 (414) and then isformed to a signal voltage waveform G.
The signal voltage waveform @ isapplied to the DC amplifiers IC3 (314) and IC (4/4),
and controls the bias voltage of each power amplifier block.The bias voltage @varies
accordingto the KEY & PTT signal.

OFF
H
OFF
@ KEY & PTT signal
L ON ON
@ No.14 pin of ICI (314)
5v
ov
2.5V
@ Biasvoltage of
each PA OV
Fig .2
2)APC (AutomaticPower Control) Circuit
The APC circuit prevents excessive output by controllingthe bias voltage of the power
amplifierwhen the outputof the linear amplifier exceedsthe ratedvalue.
The output power signal
Vf, detected bythe CFG-111 matchingcircuit, isfed to the
comparator IC1 (414) and comparedwith the referencevoltage adjusted by the vari-
able resistor RV3.
When the Vf signal exceedsthe ratedvalue, the comparator
is turnedon andthe
comparator output voltage controls IC3(314) and IC3 (414) (DCamplifier to control the
biasvoltage). As a result, the bias voltage drops andthe output power is controlledto
beconstant incase of excessive output.
When the comparator is on, the OVER DRIVEsignal is sent to the switchpanelvia
diode CDI, and lights upthe DRIVE LED
in red.
3)TemperatureDetector Circuit.
The base-emittervoltage of the temperature detector transistor TRI and TR2 attached
to eachof the two heatsinks is comparedby the comparator IC6 (114) and IC6(214),
and IC6 (314) and IC6 (4/4),respectively.
As TR1 and TR2 have a negative temperature coefficknt of about
-4.5 mV1"C (de-
gree centigrade)the base-emittervoltage drops when the temperature of the heat
sink rises.
Variable resistors RV1 and RV2set the referencevoltage of the comparators IC6 (214)
and IC6 (414) to the base-emitter voltage which corresponds to the temperature of 80
"C of the heat sink.
At this time, the referencevoltage of the comparators IC6 (114) and IC6 (314) is the
same as that which correspondsto the voltage when the temperatureof the heatsink
is
50 "C. Therefore, whenthe temperature of the heat sink exceeds 50 "C, the com-
parator IC6 (114) or IC6 (314) is turned on, and "High" levelvoltage is applied.

to turn on the transistor TR3 andthe cooling fan starts to rotate.
Whenthe temperature of the heat sink exceeds
80 "C, the comparator IC6 (214) or
IC6(4/4)turns on.
At this time a Low level PA HEAT alarm signalis sent to the CDJ-1143 control circuit
via diode CD7.
When the PA HEATalarm is issued,the JRL-2000F displays "A3".
4)PA UNBLAlarm Detector Circuit
The CFF-361 power combiner is equipped with a sensor R7which detects unbalanced
power when the power is combined.
This sensor detects the unbalancedpower and when the terminal voltage
of the sen-
sor increases,the comparator IC1 (214) turns on, and the PA BL alarm signal is gener-
ated.
When the
PAL alarm is issued, the JRL-2000F displays "A4".
5)PA LOADAlarm Detector Circuit.
The CFF-361power combiner is equipped with a circuit which detects Vf and Vr of
the PA outputterminal.
Vf and Vr are comparedby the comparator IC2(214).
When the VSWR value exceeds 3.0 at the PA output terminal because of a poor
matching situationwith the matchingcircuit, the ratio VrIVf exceeds 0.5 andthe com-
parator IC2 (214) changes from Low level to Highlevel.
This comparator output signaltriggers the flip-flop circuit composed of IC2(314) and
IC2(414),and turns over the output voltage to issuethe PA LOAD alarm signal.
When the PA LOADalarm is issued,the JRL-2000F displays "A9".
IC2(114) and the peripheraldevices compose of a circuit which resets the flip-flop.
6)PA OFF Circuit
When one of the three alarm signals of the PA control becomes Low level, or when
PA OFFsignal which forcedly turns off the power amplifier becomes Low level be-
cause of the operationof the other protection circuit, a Low level signal is sent tothe
inputterminal of the comparator IC1 (414) via CD4 or CD6 diode OR circuit andthe
output of lCl (1/4) turns from Low levelto High level.
;
This signal is appliedto the DC amplifier which controls the bias voltage of the power
amplifiers IC3 (314) and IC3 (4/4), and the bias voltage of the power amplifiers is set to
-9v.
If the bias voltage becomes -9V, the RFpower MOSFET of the power amplifier is cut
off andthe output power becomes 0
W, regardlessof the existence of the excitation
power.

7)Power Splitter Circuit
The excitationpower suppliedto J201 terminalfrom the exciter is appliedto the RF
transformer TI via-2dB attenuator circuit.
.
TIis an impedance convert transformer (50ohms : 12.5 ohms).
The excitationpower is distributedto each terminal P21 to P24.
2.2.3 CFF-361 Power Combiner
The CFF-361power combiner is attachedto the bottom of the power amplifier unit.
This circuit generates a 1
kW PEP bycombining the output power from the power
amplifier of the four SEPP circuits.
These power amplifier output currents are combined bythe
RF transformers TI and
T2, andfinally combinedbyT3.
As the output impedanceof
T3 is 12.5 ohms, the step-up transformer T4 is converted
to 50 ohms.
Resistors R1, R2 and R3 absorbthe unbalancedpower generated at both ends of
each combiningtransformer.
R3 is equipped with a sensor R7which detectstemperature.
When a large unbalancingpower is generatedamongthesefour power amplifier, R3
produces heatto increasethe resistanceof R7 and the
PA BL alarm circuit is acti-
vated.
The circuit, consistingof a current transformer T5, diodes CD1 and CDI, capacitors
C1 to C4 and resistors R51 to R54, detects Vf and Vr of the power combiner output
terminal.
Vf and Vr issuethe PA LOAD alarm when the VSWR of the power combiner output
terminal is 3.0 or more.RelayK4 isturned on when the
PA switch is on, andthe corn-
binedpower is sent to the matchingcircuit throughthis relay
.
2.3 NBL-169 Power Supply Unit
The NBL-169power supply unit is a regulatedswitching power supply whose power
output of
DC 80 V is generated using AC 100V to 240 V. Becausethe pulse-shaped
currentflows to capacitors ina smothing circuit ina power supply unit with a capaci-
tor-input type smothing circuit,the power factor of
AC input is, in general, about 0.5 to
0.6.
The JRL-2000Fhas employeda powerfactor corrector circuit inthe former stage of
the switching regulatorcircuit to obtain a powerfactor of approx.1.
The CBB-13powerfactor corrector is attachedto one side of the heatsink which is in
the center of the unit, and the CBG-68main PS unit is attachedto the other side. The
unit also incorporatesa switchingpower supply unit which generates a DC
+I2 V (4A)
power supply for the control circuit.

Fig.3 Block Diagramof NBL-169 Power Supply Unit
2.3.1 CSA-222 Relay Circuit
The CSA-222relay circuit consists of a relay which turns on/off the AC power supply
and a noisefilter circuit.
The AC inputvoltage is applied to the terminal boards TBI and TB2 and sent to the
NBL-169power supply unit via K1-1 and K1-2 relays.
As the relay K2 is activatedby the DC 13.8 V providedfrom the exciter, the JRL-
2000F can beturned on/off bythe exciter main switch.
2.3.2 CBB-13 Power Factor Corrector
The CBB-13power factor corrector converts AC100 to 240V to DC 350 V by a DC-DC
converter inserted inthe smothing circuit.
Inthis DC-DCconverter,a PFC exclusive control IC of IC1 corrects the line current
waveform to a sine-curvedwaveform.
Resistor R1 absorbsthe rash current generated at the re!ay K1 when the AC power is
turned on.
The MOSFETsTRI to TR3 controlled by IC1
, switchthe current which flows through
choke coils L1 and L2with a frequency of about 90 kHz.
The switchedMOSFETdrain voltage charges the capacitors C1 to C3via diode CD2.
As a result
,a DC350 V voltage develops at the output terminal of TE3.
The current transformer TI measuresthe MOSFET switching current value and de-
tects the excessive current by the feedback of the value to ICI.
The circuit composedof Rl1to R13detects an AC voltage waveform and sends itto
IC1. The IC1 controls the current waveform basedonthis waveform.
Resistors R25to R27 feed backthe output voltage to IC1
.

The comparator IC5detectsan exccessive output voltage and sends out the
PSALM signal via CD4 photocoupler.
R30is a sensor which detects a MOSFEToverheat. When the temperature of the FET
case exceeds 80 "C, the terminal voltage of R30 increases and the transistor TR8 is
turned on.
The circuit composed of IC2, TR6, TR7, T2 and IC4 is a switching regulator which
generates a DC-12 V voltage.
2.3.3 CBG-68 Main PS Unit
The CBG-68 main PS unit is a regulator which generates a regulatedoutput of DC 80
V(30A) based onthe CBB-13 power factor corrector output of DC 350 V.
lC201 is a control ICand it sends out pulses for the 150kHz switching controlcircuit .
MOSFETsTR205 and TR206 and transformes T202 and T203 compose a MOSFET
drive circuit for a main switchingcircuit and amplify two phase switching pulses from
IC201.
TR201 to TR204 are power MOSFETsfor a main switchingcircuit and compose of a
full-bridge switching circuit with an output transformer 1201.
The output pulsefrom the secondary winding of T201 is rectifiedto DC by diodes
CD301 and CD302, and smothed by capacitor C206.
R232is a sensor which detects a power MOSFEToverheat of the mainswitching
circuit-Whenthe temperature of the MOSFET case exceeds 80 "C, the terminal volt-
age of R232 increasesand transistor TR 209 turns on.
TS201 is a thermostat which detects overheat of the heatsink. It turns on at
45 "C and drives the coolingfan.
R231 is a resistorwhich detects a DC output current. The voltage detected by this
resistor is amplified
by IC202amplifier and it moves the pointer of the ammeter (ID) on
the front panel and at the same time detects an excessivecurrent of the comparator
lC203.When the output current exceeds 30A, IC203is turned on and it triggers the
control lC201 viathe time constant circuit made up of TR207 and TR208 to terminate
switchingoscillation
.
At this time, the output of the transistor TR208 is appliedto No.8 pinof IC203which
then issuesan over current alarm.
The output voltage is dividedby the variable resistor RV201and resistors R233to
R235 and the constant-voltagecontrol by IC201 is achieved by the feedback of the
dividedvoltage to IC201.
The output voltage can bechanged between DC 50V to 80V by adjusting RV201.
Resistors R236to R238 divide the output voltage and the divided voltage movesthe
pointer of the voltmeter (VD)on the front panel and activates the excessive voltage
detector circuit after entering No.10 pin of IC203.
Whenthe output voltage exceeds 90 V, No.13 pinof IC203becomes Low level and an
alarm signal for an excessive voltage is issued. At the same time, the divided voltage
is also appliedto No.6 pinof IC203which then sends out the VPA ON RESPsignal
indicatingthat the comparator output voltage isturned on.

The start circuit of the JRL-2000Fconsists of transistors TR210 to TR212 and periph-
eral parts.
When the PA switchon the front panel isturned on, the VPA ON CONTsignal
changes from Highto Low level andthe collectorvoltage of TR210 increases.
This voltage turns on TR211 via the time-constantcircuit and also turns on the relay
K1 of the CBB-13power factorcorrector. TR211 also turns on TR212 and activates
IC201 by providing itwith a DC power supply.
2.3.4CFW-102 Noise Filter
The CFR-102noisefilter is attached inside of the power supply unit.
The noisefilter circuit is composedof an L-Ccircuit and it preventsthe switchingnoise
component generatedinside of the power supply unit from leakingout.
2.4 CFG-I11 Matching Circuit
The CFG-111 matchingcircuit is attachedto the upper part of the mainchassis.
Itattenuatesthe unwantedharmonics components contained inthe output of the
poweramplifier and matchesthe antenna impedance to
50 ohms.
The matchingcircuit consists of an RF matching circuit, an impedancedetector circuit,
a relay drive circuit and an output power detector circuit.
The blockdiagram is shown in Fig.4.
Input
I
RELAYS
m m I
-
I
CONTROL CIRCUIT
I
IMP
Fig.4 Block DiagramCFG-111 MatchingCircuit
(1)RFMatching Circuit
.,A .,A -
Output
PWR
DET DET
This circuitconsists of inductorsand capacitors which are binary-combinedby relay
contacts, forming an
L-n-L low pass filter as shown inFig.5.
Eachrelay is controlledbythe control programand activatedby
CPU intructions.
-
. .
, , , .
I I

Fig.5 L-n-LLow Pass Filter.
(2)lmpedanceDetector Circuit
The impedancedetector circuit detects the impedanceof the matchingcircuit input
terminal and the output signals are sent to the CDJ-1143control CPU.
,
The circuit made up of diodes CD401 and CD402, IC403and peripheral parts mea-
sures impedance.
The voltage at the input terminal
is detected bycapacitors C401 and C402 and diode
CD401. On the other hand, the current at the inputterminal is detected by the current
transformer TI and diode CD402.
The detectedvoltage and current are compared by IC403comparator.
The LOADsignal changes to Low levelwhen the impedanceat the input terminal is
over
50 ohms, and the signal changesto High level when it is below 50 ohms.
The circuit made upof IC401, IC402and IC403and peripheral parts detectsthe
phase of the impedance.
After the voltage and current at the inputterminal are wave-shaped by IC401,they are
appliedto IC402where the D-typeflip-flop detectsthe phase of the voltage and cur-
rent.
Whenthe phase of the current is advancedto that of the voltage, the TUNE signal is
Highlevel, and it changesto Low levelwhen the phase is behindthe voltage phase.
The circuit made upof diodes CD421, CD441, IC404, IC405and peripheral circuit
partsdetects the VSWR value of the input terminal.
Diode CD421 detectsthe forward voltage (Vf) and diode CD441 detects reflected
voltage (Vr).Vf and Vr are comparedby IC404 comparator andthree output signals,
SWRI
.I , SWRI .5 and SWR2.0 are obtained. The Lowlevelof SWRI .I signal means
that the VSWR value of the inputterminal is below 1
.I.
(3)RelayDriveCircuit
The circuit made upof IC301to IC304drives relays.
Each IC receives serial input data and sends out an 8-bit latched parallel signal. The
CDJ-1143control CPU sends 32-bit relay data to the ICs inserialsignals.

(4)OutputPower Detector Circuit
The output power detector circuit detects Vf and Vr of the matching circuit output
terminal.
Capacitors C201 and C202 detectthe voltage of the outputterminal and transformer
T2 detects current.
Diodes CD201 and CD202 detect the forward voltage (Vf) and the reflectedvoltage
(Vr)
Vf and Vr are sent to the CDJ-1143control circuit where the VSWR value is calcu-
lated, andthen they are displayed inthe voltmeter on the front panel.
2.5 CSC-433Antenna Switch
The CSC-433 antennaswitch is a relaycircuit which switches RFsignals and is con-
trolled by the CDJ-1143control CPU. Connector J1 is an input terminal of the RF
powerwhich is sent from the exciter.J2-1 to J2-4 are the output terminals to which
four antennas can beconnected.
Resistors R1 and R2detect the exciter output power and send it to the CDJ-1143via
J303.
The contact of the relay K8 becomesopen state during receivingstate.
Dependingon the mode used, each relay operates as follows.
(1) Inthe Antenna Switch Mode

(2) Inthe Antenna Tuner Mode
(3) Inthe LinearAmplifier Mode
\~:~ransrni$n
AMU
>
2.6 CDJ-1143 Control Circuit
The CDJ-1143control circuit is on the printedcircuit bo'ardattached to the upper part
of the JRL-2000F. It incorporatesan 8-bit microprocessorand controls the JRL-2000F
and monitors its operation.
(1)MicroprocessorCircuit
IC1is an 8-bit single-chipCPU and equippedwith IID ports, a timer, random access
memoriesand serial communication terminals.
Control programs are stored in ROMI
.

IC3is a memory IC which supports electricalwritelerase, and the tuning date of each
bandis stored in it. Switch S1 provides initialconditionsto the
CPU of the JRL-2000F.
IC2, TR3, TR4, S2 and peripheralparts compose of a CPU reset circuit, and IC2
detectsthe drop of the CPU operating voltage
bC 5V.
(2)Descriptionof VO Signals
Referto the instructions manualfor the connectingsignals with the exciter.
Signal
name
PSALM
VPA ON RESP
VPA ON CONT
MAIN ON
-
K1
-
K2
-
K3
ANTI
ANT2
ANT3
ANT4
S-DATA
LATCH
ENABLE
-
K4
PA KEY ON
PA OFF
PA HEAT
PA BL
PA LOAD
110
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Description
Alarm from NBL-169
Responseof PA power supply voltage
Truns on CBG-68
Truns on the relay which provides
NBL-169with AC power supply
Truns on K1 of CSC-433
Truns on K2of CSC-433
Truns on K3of CSC-433
Truns on ANTI of CSC-433
Truns on ANT2 of CSC-433
Truns
on ANT3 of CSC-433
Truns on ANT4 of CSC-433
Sendsdatato the relay IC of CFG-I
11
LatchesS-DATA signal inthe IC memory
Enableoutput of the relay drive IC of CFG-111
Truns on relays in CFF-361
Truns on PA bias circuit
Truns PA biasvoltage to minusvoltage
Alarmfor overheat of PA heat sink
Alarm for PA unbalanced
Alarmfor PA abnormal load impedance

(3)SWRDetector Circuit
Vf and Vr detected by the output power detector circuit of CFG-111 are comparedby
comparator IC15.
Whenthe VSWR value which is a ratio of Vf to Vr, exceeds 3.5, No.4 pinof IC15
becomes Low levelto inform CPU of the SWR alarm (A8).
Onthe other hand, Vf and Vr are appliedto the SWR operating circuit made up of
IC14, IC17and peripheralparts.The calculatedSWR is indicatedinthe voltmeter on
the front panel.
The circuit madeup of IC15, CD6,
R54, R55 and C67 holds the peak of Vf.
Dataselector IC of lC10 selects signals which are connected to the front panel meter.
Comparator IC16which has an output terminal (No.8 pin) compares Vf with the refer-
ence voltage adjusted bythe variable resistor RV1
. If Vf exceedsthe referencevolt-
age, an ALC voltage is generated.
The ALC voltage movesthe pointer of the voltmeter via diode CD5 and it is inversely
amplifiedto a negativevoltage by IC17operational amplyfier and then sentto the
exciter.
(4)FrequencyMeasurement Circuit
The RF signalfrom the exciter,which is detectedbythe CSC-433 antennaswitch
circuit,is appliedto J410, and isthen amplified by transistor TR2.
The signal is wave-shapedto the rectangularwave bythe IC23two-stage buffer
amplifier.
After the divider of IC11 dividesthis signal ten times, it is appliedto the timer IC of
IC4.
IC4is controlled by CPU and measuresfrequency of the exciter output signal by
countingthis signal.
2.7 Automatic Tuning
The CDJ-1143control CPU of the JRL-2000Fautomaticallytunes the antenna by
controllingrelays of the CFG-111 matching circuit accordingto the programwritten to
ROMI . \
SET and TUNE operations will be described here.
When the SET switch is pressed, No.11 pin (SELBK)of the CDJ-1143 controlJ3
changes to Low level and requirespowerfrom the exciter.

The exciter enterstransmit state and the LED of XMT on the front panel lights upfor
as longas the signal lineof No.11 pin (SELBK)of J3 is correctly connectedto the
exiter. The power from the exciter is dividedby R1 and R2of the CSC-433antenna
switch circuit and R61 of the CDJ-1143controlcircuit, and the frequency of the signal
is measured.
Referto "2.6 CDJ-1143 control (4)"for the frequency measurement.
IC16of CDJ-1143control circuit checksthe dividedsignal level and if the inputpower
istoo small (belowabout 20
W), No.7 pinof IC16changesto Highlevel. If it istoo
large(over about 150W), No.1 pin of IC16 changesto Low level. CPU checks the
stateof the signalat times and displays Powith the seven-segment
LED on the front
panelwhen the inputis too small, and
A6 when it is too large. After frequency mea-
surement is completed,the dataof EEPROM is checked inrelationwith the obtained
frequency. In EEPROM,the data is memorizedin a matrix as shown in Fig.9. For
example, assumethat the frequency is 14.020MHz. As the relateddata exists inthe
No.2 antennacolumn, the antenna circuit is switchedto No.2 antennaand relaysof
the CFG-I11 matchingcircuit are preset accordingto the data. The frequency display
is also switched. Inaddition, the antenna number last used is stored in RAM incorpo-
ratedinCPU and it will be selectedif two or more data exist for one frequency.
The data capacity of 30-bit is requiredfor one cell becausethere are 30 relays in
CFG-111matching circuit and one more bit is added to indicatethat there is dataor
not. The bit is set to "no data"for all cellson shipping. When the automatictuning is
completed,the bit changes to "dataexists" state. As the 8-biUl word EEPROM is used
here, four words will be assignedto
a matrix.
All the data is set to FFFFFFFFon shipping.
Freguency
1.600- 1.61 0MHz
14.000- 14.080MHz
29.900-30.000MHz
Fig. 9 Memory Map
18
Antenna number
1
FFFFFFFF
FFFFFFFF
FFFFFFFF
2
FFFFFFFF
0543F2D6
FFFFFFFF
3
FFFFFFFF
FFFFFFFF
\
FFFFFFFF
4
FFFFFFFF
FFFFFFFF
FFFFFFFF

When the TUNE switch is pressed, the LED of the TUNE switch lights up.
Ifan exciter other than JST-135 is used, proceedto the step of "Operationof fre-
quency measurement". The state of relays is preset accordingto the measuredfre-
quency without the steps of read-outof the memory and selectionof the antenna.
When theJST-135Dexciter is used, the proceduresdescribedabove are omitted.
Then the JRL-2000Freturns to receive state and K1 of the antenna switch unit is
switched.The
JRL-2000F returns again to transmit state and changes SELBK signal
to Low level.The LOAD signal of the impedancedetected by the impedancedetector
of the CFG-111 matchingcircuit is checked andthe relay state is changedby one bit.
Then TUNE signal of the impedancephase is checked andthe relaystate is changed
again by one bit. Again the LOAD signal is checkedand the relay state ischanged by
one bit. The state where the LOAD and TUNE signals are reversedis searchedfor by
repeatingthese procedures. If the SWR value of the impedancedetector circuit is less
than 1
.I, the automatic tuning is thought to becompleted. During automatictuning, the
7-segment LED isshown as in Fig.10 and the sound of when relays are switching is
heard. Also during automatic tuning, the dividedsignal levelis checkedat times and
"Po" isdisplayedwhenthe input power istoo small and
"A6" when it is too large, as is
the same inthe SET operation, and automatictuning is stoppedtemporarily. When the
automatictuning is completed,the data is written to EEPROM. The -/-segmentLED on
the front panel isshown as in Fig.11 for an instant,andthen the frequency is dis-
played. If the automatic tuning has failed,
"A7" isdisplayed.