Lumistar LS-44-QBS Series User manual

LS-44-QBS Series Rackmount
Multi-channel Digital Bit Synchronizer
Hardware and Software User’s Manual
Lumistar, Inc.
2270 Camino Vida Roble, Suite L
Carlsbad, CA 92011
[phone]
www.lumistar.net
Document: U44000101
Date: November, 2013
Release: R3

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© 2013 Lumistar, Inc. All rights reserved.
Lumistar, Inc.
2270 Camino Vida Roble, Suite L
Carlsbad, CA 92011
[phone]
[phone] Fax
www.lumistar.net

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1. INTRODUCTION ........................................................................................................................................ 5
1.1 GENERAL .................................................................................................................................................. 5
1.2 MANUAL FORMAT ...................................................................................................................................... 5
2. PRODUCT OVERVIEW AND TECHNICAL SPECIFICATIONS ............................................................... 6
2.1 PRODUCT OVERVIEW................................................................................................................................. 6
2.2 TECHNICAL SPECIFICATIONS ...................................................................................................................... 8
3. HARDWARE CONFIGURATION / INSTALLATION ................................................................................. 9
3.1 HARDWARE CONFIGURATION ..................................................................................................................... 9
3.2 INSTALLATION.......................................................................................................................................... 10
4. SOFTWARE APPLICATION.................................................................................................................... 13
5. MAINTENANCE ....................................................................................................................................... 22

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List of Figures
Figure 2-1: LS-40 Block Component Layout Diagram........................................................................................... 6
Figure 2-2: LS-44 Front and Rear Panel Views .................................................................................................... 7
Figure 3-1: Configuration Shunt Blocks............................................................................................................... 10
Figure 3-2: LS-44 connections to AC power and PC peripherals ......................... Error! Bookmark not defined.
Figure 3-3: LS-44 Primary PCM Processing Engine Interface Connections....................................................... 11
Figure 3-4: LS-44 Auxiliary PCM Processing Engine Interface Connections ..................................................... 12
Figure 4-1: LS-44 QBS Host Software Status Display ........................................................................................ 13
Figure 4-2: LS-44 QBS Host Software Status ..................................................................................................... 14
Figure 4-3: Bit Sync Setup Display...................................................................................................................... 15
Figure 4-4: Bitsync FSP History Display ............................................................................................................. 18
Figure 4-5: BERT Pattern Disabled ..................................................................................................................... 19
Figure 4-6: BERT Pattern Source - Internal ........................................................................................................ 19
Figure 4-7: LS-44 QBS Remote Software Status Display................................................................................... 20
Figure 4-8: Network Management Host .............................................................................................................. 21
List of Tables
Table 2-1: LS-44 Technical Specifications ............................................................................................................ 8
Table 3-1: PCM Channel Configuration Shunt Block Reference Designators ...................................................... 9
Table 3-2: LS-44 Auxiliary PCM Processing Engine Signal Definitions .............................................................. 11
Table 4-1: LS-40 Supported PCM Input Codes (normal or inverted) .................................................................. 16
Table 4-4-2: LS-40-DB Supported PCM Output Codes ...................................................................................... 16
Table 4-3: Extended Functions LED Meanings................................................................................................... 19

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1. Introduction
1.1 General
This document is the Hardware and Software User’s Manual for the Lumistar LS-44-QBS Series
1U Rackmount Multi-channel Bit Synchronizer chassis. The intent of this document is to provide
unit specifications, operational information, and maintenance instructions for the end user.
The Lumistar LS-44-QBS Multi-channel Digital Bit Synchronizer chassis provides a means of
obtaining correlated clock and data recovery from up to four independent PCM streams. For
each PCM input stream, the unit provides independently controllable translation of various PCM
formats and provides a user programmable PCM output format, which may be used for tape
storage or as a means of providing PCM format translation. Each PCM processing channel may
be programmed to receive inputs from 100bps to 20Mbps for NRZ PCM codes and 100bps to
10Mbps for all other support PCM codes.
The LS-44-QBS enclosure is a space saving, 1U, 19-inch rackmount chassis. The unit can be
purchased with an optional 1U rackmount monitor/keyboard drawer that contains a built-in 8-
channel keyboard/video/mouse switch. The optional keyboard would allow a single point of
control for up to eight separate LS-44 chassis’.
1.2 Manual Format
This manual is separated into the following sections:
Chapter 1 provides an introduction to this manual
Chapter 2 provides a brief product overview and technical specifications
Chapter 3 provides hardware configuration and installation instructions
Chapter 4 provides software application instructions
Chapter 5 provides maintenance instructions

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2. Product Overview and Technical Specifications
2.1 Product Overview
The LS-44 is a self-contained PCM recovery system. The core PCM processing engine contains
up to four Lumistar LS-40 Digital Bit Synchronizers. Control and status of the PCM processing
engine is provided by an internal 586-class Single-Board Computer (SBC). Power is converted
and supplied to both the SBC and the PCM processing engine by an ATX-style power supply.
Filtered cooling air is supplied to internal components via four 10.8 CFM fans. Evacuation airflow
is provided via the sides and the rear of the unit. To allow for future upgrades, the unit also
contains a CD/DVD drive which is accessible from the front panel. BNC jacks are provided on
the rear panel for primary PCM engine interfaces. Auxiliary PCM interfaces are provided through
two D-style 37-pin rear panel connectors. Figure 2-1 provides a block component layout diagram
of the internal components of the LS-44 system. Figure 2-2 shows a front and rear panel view of
the LS-44 chassis.
Figure
2
-
1
: LS
-
40 Block Component Layout Diagram

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Figure
2
-
2
: LS
-
44 Front and Rear Panel
Views

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2.2 Technical Specifications
The table below provides technical specifications for the LS-44 system.
Table
2
-
1
: LS
-
44 Technical Specifications
Category:
Specifications:
Details:
Mechanical
Chassis Dimensions 19”(W) x 21”(D) x 1.75” (H)
Form Factor 1U Chassis
Weight Approx. 35lbs/15.9Kg
Electrical
Supply Voltage 100-120/200-240VAC (Auto switched)
AC Supply Frequency 47-63 Hz
Total Power < 300W
PCM Input Channel Characteristics (1-4 channels)
Quantity 1 SE/Differential Input; Jumper Selected
Impedance 50, 75 or 1K ; Jumper Selectable
Rates 50-20Mbps NRZ Codes; 50-10Mbps others
Polarity Normal or Inverse; Software Programmable
Signal Amplitude 0.1V to 10V p-p
Maximum Voltage permissible 25V RMS
Loop Bandwidth (LBW) settings 0.01 to 2% (data rate dependent)
Acquisition Range +/- (4 x LBW Setting)
Tracking Range +/- (10 x LBW Setting)
Mean Acquisition Time 100-150 bits
PCM Output Channel Characteristics (1-4 channels)
NRZ-L Data Output +TTL, -TTL
0Clock Output +TTL, -TTL
PCM Output 1V p-p @ 50 ; Programmable Line Codes
PCM PRN Output (future) +TTL, -TTL; Programmable Line Codes
PCM PRN Patterns (future) 2
11
-1, 2
15
-1; Programmable
PCM Line Codes
Non-return to Zero Codes NRZ-L, NRZ-M, NRZ-S
Bi-Phase Codes Bi-L, Bi-M Bi-S
Delay Modulation (Miller) Codes DM-M, DM-S, M
2
M, M
2
S
Return to Zero Codes RZ
Randomized Codes RNRZ-L, RNRZ-S, RNRZ-M
Randomizing Sequences 2
11
-1, 2
15
-1, 2
17
-1, 2
23
-1
PC Control/Status
Display Up to UXGA (1600x1200)
Keyboard/Mouse USB 2.0 x4
Environmental
Temperature, Operational 0to 70C (Commercial)
Temperature, Storage -20to 70C
Humidity, non-condensing <40C 0-90%, >40C 0 to 75%

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3. Hardware Configuration / Installation
3.1 Hardware Configuration
The LS-44 has been shipped with the internal hardware configuration set for the most common
operating environments. The LS-44 does not require access of any internal configuration settings
under normal circumstances. However, in situations where differential inputs are required for one
or more PCM processing channels, it is necessary to remove the top cover of the unit and adjust
internal configuration jumpers.
The top cover of the unit is attached with eight (8) #4, flathead, Philips screws. Remove and
retain these screws to expose the interior of the unit.
Once the cover has been removed, the interior will appear as shown in Figure 2-1. Viewing the
unit from the front panel of the chassis, four groups of configuration blocks will appear along the
right-hand edge of the PCM Processing Engine motherboard assembly. Silk-screen
nomenclature will appear along the right-hand chassis wall identifying which channel each
individual PCM processor is controlling. Each PCM processor has a respective configuration
header. Table 3-1 identifies the configuration jumper headers for each PCM processing channel.
Table
3
-
1
: PCM Channel Configuration Shunt Block Reference
Designators
PCM Channel Number
Ref. Designator
1 JP1
2 JP2
3 JP3
4 JP4
A silk-screened reference designator will appear next to each PCM processor configuration shunt
block indicating the Pin 1 location of each header. These headers are used to route various
signals to and from the rear panel interface connectors, to configure the input source selection,
and to adjust termination values for the differential input signals.
Figure 3-1 provides a detailed drawing of the configuration shunt blocks. Default jumper
configurations are shown. The user should not alter the first nine installed shunts. Shunts
designated with an asterisk in Figure 3-1 are user configuration items.

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Figure
3
-
1
: Configuration Shunt Blocks
The LS-44 is shipped with the PCM input selection for each channel set to “single-ended” mode.
To configure a particular PCM processing channel to utilize differential inputs, the shunt
connecting pins 31 and 34 should be moved to connect pins 34 and 37. The unit is shipped with
differential input termination impedances of 100 ohms. Removing the shunt between pins 29 and
32, and the shunt between pins 35 and 38 will allow the differential input impedance to be loaded
with 7.5K ohms.
3.2 Installation
The LS-44 assembly is provided with removable mounting flanges. In the event that the unit will
not be installed in a 19” rack, the mounting flanges may be removed by extracting three mounting
screws on each flange.