Microchip Technology dsPIC33 series User manual

2018 Microchip Technology Inc. DS70005340A-page 1
HIGHLIGHTS
This section of the manual contains the following major topics:
1.0 Introduction ....................................................................................................................... 2
2.0 CAN FD Message Frames................................................................................................ 5
3.0 Control Registers .............................................................................................................. 9
4.0 Modes of Operation ........................................................................................................ 51
5.0 Configuration................................................................................................................... 57
6.0 Message Transmission ................................................................................................... 67
7.0 Transmit Event FIFO – TEF ............................................................................................ 76
8.0 Message Filtering............................................................................................................81
9.0 Message Reception ........................................................................................................ 86
10.0 FIFO Behavior................................................................................................................. 92
11.0 Timestamping................................................................................................................103
12.0 Interrupts....................................................................................................................... 104
13.0 Error Handling................................................................................................................111
14.0 Related Application Notes............................................................................................. 113
15.0 Revision History ............................................................................................................114
CAN Flexible Data-Rate (FD) Protocol Module

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1.0 INTRODUCTION
CAN Flexible Data-Rate (FD) addresses the increasing demand for bandwidth on CAN buses.
The two major enhancements over CAN 2.0B consist of:
• Increased data field up to 64 data bytes (currently 8 bytes)
• Option to switch to faster bit rate after the arbitration field
Figure 1-1 shows the possible increase in net bit rate due to the higher Data Bit Rate (DBR) and
increased data bytes per frame (© Robert Bosch GmbH).
Figure 1-1: Net CAN FD Bit Rate
The CAN FD protocol is defined to allow CAN 2.0 messages and CAN FD messages to co-exist
on the same bus. This does not imply that non-CAN FD controllers can be mixed with CAN FD
controllers on the same bus. Non-CAN FD controllers will generate error frames while receiving
a CAN FD message.
1.1 Features
The CAN FD module has the following features:
General
• Nominal (Arbitration) Bit Rate up to 1 Mbps
• Data Bit Rate up to 8 Mbps
• CAN FD Controller modes:
- Mixed CAN 2.0B and CAN FD mode
- CAN 2.0B mode
• Conforms to ISO11898-1:2015
Message FIFOs
• 31 FIFOs Configurable as Transmit or Receive FIFOs
• One Transmit Queue (TXQ)
• Transmit Event FIFO (TEF) with 32-Bit Timestamp
Message Transmission
• Message Transmission Prioritization:
- Based on priority bit field and/or
- Message with lowest ID gets transmitted first using the TXQ
• Programmable Automatic Retransmission Attempts: Unlimited, 3 Attempts or Disabled
Frame ID: 11-Bit, Bit Rate Arbitration: 1 Mbit

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CAN FD Protocol Module
Message Reception
• 32 Flexible Filter and Mask Objects
• Each Object can be Configured to Filter either:
- Standard ID and first 18 data bits or
- Extended ID
• 32-Bit Timestamp
• The CAN FD Bit Stream Processor (BSP) implements the Medium Access Control of the
CAN FD protocol described in ISO11898-1:2015. It serializes and deserializes the bit
stream, encodes and decodes the CAN FD frames, manages the medium access,
Acknowledges frames, and detects and signals errors.
• The TX handler prioritizes the messages that are requested for transmission by the
transmit FIFOs. It uses the RAM interface to fetch the transmit data from RAM and provides
it to the BSP for transmission.
• The BSP provides received messages to the RX handler. The RX handler uses an
acceptance filter to filter the messages that shall be stored in the receive FIFOs. It uses the
RAM interface to store received data into RAM.
• Each FIFO can be configured either as a transmit or receive FIFO. The FIFO control keeps
track of the FIFO head and tail, and calculates the user address. In a TX FIFO, the user
address points to the address in RAM where the data for the next transmit message is
stored. In an RX FIFO, the user address points to the address in RAM where the data of the
next receive message will be read. The user notifies the FIFO that a message is written to
or read from RAM by incrementing the head/tail of the FIFO.
• The TXQ is a special transmit FIFO that transmits the messages based on the ID of the
messages stored in the queue.
• The TEF stores the message IDs of the transmitted messages.
• A free-running Time Base Counter (TBC) is used to timestamp received messages.
Messages in the TEF can also be timestamped.
• The CAN FD controller module generates interrupts when new messages are received or
when messages are transmitted successfully.

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Figure 1-2 shows the System Block Diagram.
Figure 1-2: System Block Diagram
TX Handler
TX Prioritization
RX Handler
Filter and Masks
Timestamping
Interrupt Control
Error Handling Diagnostics
CxTX
CxRX
Device RAM
TEF
Message
Object 0
Message
Object 31
•
•
•
TXQ
Message
Object 0
Message
Object 31
•
•
•
FIFO 1
Message
Object 0
Message
Object 31
•
•
•
FIFO 31
Message
Object 0
Message
Object 31
•
•
•
•••

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CAN FD Protocol Module
2.0 CAN FD MESSAGE FRAMES
The ISO11898-1:2015 describes the different CAN message frames in detail. Figure 2-1
through Figure 2-6 explain and summarize the construction of the messages and fields.
There are four different CAN data/remote frames (see Figure 2-2):
•CAN Base Frame: Classic CAN 2.0 frame using Standard ID
•CAN FD Base Frame: CAN FD frame using Standard ID
•CAN Extended Frame: Classic CAN 2.0 frame using Extended ID
•CAN FD Extended Frame: CAN FD frame using Extended ID
There are no remote frames in CAN FD frames; therefore, the RTR bit is replaced with the RRS
bit (see Figure 2-2). The RRS bit in the CAN FD base frame can be used to extend the SID to
12 bits. When enabled, it is referred to as SID11, it is the LSB of SID<11:0>.
Figure 2-3 specifies the control field of the different CAN messages. Before CAN FD was added
to the ISO11898-1:2015, the FDF bit was a reserved bit. Now the FDF bit selects between
Classic and CAN FD formats.
The BRS bit selects if the bit rate should be switched in the data phase of CAN FD frames.
Figure 2-6 illustrates the error and overload frames. These special frames do not change.
2.1 ISO vs. NON-ISO CRC
To support the system validation of non-ISO CRC ECUs, the CAN FD controller module sup-
ports both ISO CRC (according to ISO11898-1:2015) and non-ISO CRC (see Figure 2-4 and
Figure 2-5). The CRC field is selectable using the ISOCRCEN bit (C1CONL<5>). The ISO CRC
field contains the stuff count. This count was not included in the original CAN FD specification; It
was added to fix a minor issue in the error detection of the original specification.
CAN FD frames use two different lengths of CRC: 17-bit for up to 16 data bytes and 21-bit for
20 or more data bytes. Technically, there are a total of six different CAN data/remove frames in
the CAN FD.
Figure 2-1: General Data Frame
Note: If an error is detected during the data phase of a CAN FD frame, the bit rate will be
switched back to the Nominal Bit Rate (NBR). Error frames are always transmitted
at the arbitration bit rate.
IFS
(= 3b)
SOF
(1b) ARBITRATION (12/32b) CTRL (6/8/9b) DATA (0 to 64b)
CRC (16/18/22b)
CRC (16/22/26b) ACK (2b) EOF (7b) IFS (= 3b)
DATA FRAME

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Figure 2-2: Arbitration Field
Figure 2-3: Control Field
Figure 2-4: ISO CRC Field
ARBITRATION (12/32b)
SID<10:0> RTR
SID<10:0> RRS
SID11
EID<28:18> SRR IDE EID<17:0> RTR
EID<28:18> SRR IDE EID<17:0> RRS
CAN Base
CAN FD Base
CAN Ext.
CAN FD Ext.
CTRL (6/8/9b)
IDE FDF
IDE ESI
FDF DLC<3:0>
FDF ESI DLC<3:0>
CAN Base
CAN FD Base
CAN Ext.
CAN FD Ext.
DLC<3:0>
FDF BRS DLC<3:0>
r0
res BRS
CRC (16/22/26b)
CRC (15b)
CRC (15b)
CAN Base
CAN FD Base
CAN Ext.
CAN FD Ext.
CRC
CRC (17/21b)
BRS
DEL
CRC
DEL
STUFF
CNT (4b)
CRC
DEL
STUFF
CNT (4b)
CRC
DEL

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CAN FD Protocol Module
Figure 2-5: NON-ISO CRC Field
Figure 2-6: Error and Overload Frame
CRC (16/18/22b)
CRC (15b)
CRC (15b)
CAN Base
CAN FD Base
CAN Ext.
CAN FD Ext.
CRC
CRC (17/21b)
CRC (17/21b)
DEL
CRC
DEL
CRC
DEL
CRC
DEL
ANYWHERE WITHIN DATA FRAME ERRFLAG (6b) ERRDEL (8b) IFS (= 3b) or OVL
EOF or ERRDEL or OVLDEL OVLFLAG (6b) OVLDEL (8b) IFS (= 3b) or OVL
ERROR
OVERLOAD

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2.1.1 DLC ENCODING
The Data Length Code (DLC) specifies the number of data bytes a message frame contains.
Table 2-1 illustrates the encoding.
Table 2-1: DLC Encoding
Frame DLC Number of Data Bytes
CAN 2.0 and CAN FD 0 0
11
22
33
44
55
66
77
88
CAN 2.0 9-15 8
CAN FD 9 12
10 16
11 20
12 24
13 32
14 48
15 64

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CAN FD Protocol Module
3.0 CONTROL REGISTERS
CAN FD operations are controlled using the following Special Function Registers (SFRs). The
following registers are described later in this section:
•Register 3-1: C1CONH
•Register 3-2: C1CONL
•Register 3-3: C1NBTCFGH
•Register 3-4: C1NBTCFGL
•Register 3-5: C1DBTCFGH
•Register 3-6: C1DBTCFGL
•Register 3-7: C1TDCH
•Register 3-8: C1TDCL
•Register 3-9: C1TBCH
•Register 3-10: C1TBCL
•Register 3-11: C1TSCONH
•Register 3-12: C1TSCONL
•Register 3-13: C1VECH
•Register 3-14: C1VECL
•Register 3-15: C1INTH
•Register 3-16: C1INTL
•Register 3-17: C1RXIFH
•Register 3-18: C1RXIFL
•Register 3-19: C1RXOVIFH
•Register 3-20: C1RXOVIFL
•Register 3-21: C1TXIFH
•Register 3-22: C1TXIFL
•Register 3-23: C1TXATIFH
•Register 3-24: C1TXATIFL
•Register 3-25: C1TXREQH
•Register 3-26: C1TXREQL
•Register 3-27: C1FIFOBAH
•Register 3-28: C1FIFOBAL
•Register 3-29: C1TXQCONH
•Register 3-30: C1TXQCONL
•Register 3-31: C1TXQSTA
•Register 3-32: C1FIFOCONxH
•Register 3-33: C1FIFOCONxL
•Register 3-34: C1FIFOSTAx
•Register 3-35: C1TEFCONH
•Register 3-36: C1TEFCONL
•Register 3-37: C1TEFSTA
•Register 3-38: C1FOUAxH
•Register 3-39: C1FOUAxL
•Register 3-40: C1TEFUAH
•Register 3-41: C1TEFUAL
•Register 3-42: C1TXQUAH
•Register 3-43: C1TXQUAL
•Register 3-44: C1TRECH
•Register 3-45: C1TRECL
•Register 3-46: C1BDIAG0H
•Register 3-47: C1BDIAG0L
•Register 3-48: C1BDIAG1H
•Register 3-49: C1BDIAG1L
•Register 3-50: C1FLTCONxH
•Register 3-51: C1FLTCONxL
•Register 3-52: C1FLTOBJxH
•Register 3-53: C1FLTOBJxL
•Register 3-54: C1MASKxH
•Register 3-55: C1MASKxL

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Register 3-1: C1CONH: CAN Control Register High
R/W-0 R/W-0 R/W-0 R/W-0 S/HC-0 R/W-1 R/W-0 R/W-0
TXBWS3 TXBWS2 TXBWS1 TXBWS0 ABAT REQOP2 REQOP1 REQOP0
bit 15 bit 8
R-1 R-0 R-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-0
OPMOD2 OPMOD1 OPMOD1 TXQEN
(1)
STEF
(1)
SERRLOM
(1)
ESIGM
(1)
RTXAT
(1)
bit 7 bit 0
Legend: S = Settable bit HC = Hardware Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-12 TXBWS<3:0>: Transmit Bandwidth Sharing bits
1111-1100 = 4096
1011 = 2048
1010 = 1024
1001 = 512
1000 = 256
0111 = 128
0110 = 64
0101 = 32
0100 = 16
0011 = 8
0010 = 4
0001 = 2
0000 = No delay
bit 11 ABAT: Abort All Pending Transmissions bit
1= Signals all transmit buffers to abort transmission
0= Module will clear this bit when all transmissions are aborted
bit 10-8 REQOP<2:0>: Request Operation Mode bits
111 = Sets Restricted Operation mode
110 = Sets Normal CAN 2.0 mode; error frames on CAN FD frames
101 = Sets External Loopback mode
100 = Sets Configuration mode
011 = Sets Listen Only mode
010 = Sets Internal Loopback mode
001 = Sets Disable mode
000 = Sets Normal CAN FD mode; supports mixing of full CAN FD and Classic CAN 2.0 frames
bit 7-5 OPMOD<2:0>: Operation Mode Status bits
111 = Module is in Restricted Operation mode
110 = Module is in Normal CAN 2.0 mode; error frames on CAN FD frames
101 = Module is in External Loopback mode
100 = Module is in Configuration mode
011 = Module is in Listen Only mode
010 = Module is in Internal Loopback mode
001 = Module is in Disable mode
000 = Module is in Normal CAN FD mode; supports mixing of full CAN FD and Classic CAN 2.0 frames
bit 4 TXQEN: Enable Transmit Queue bit
(1)
1= Enables TXQ and reserves space in RAM
0= Does not reserve space in RAM for TXQ
Note 1: These bits can only be modified in Configuration mode (OPMOD<2:0> =
100 ).