Pentland Mpv905 User manual

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PENTLAND SYSTEMS LIMITED

OPERATING MANUAL

MPV905

Pentland Systems Limited

1 Cochrane Square

Brucefield Industrial Park

LIVINGSTON

West Lothian

Scotland

EH54

9DR

Telephone:

(0506)

464666

Fax

No:

(0506)

463030

Additional

copies

of

this manual are available at a nominal

charge

from

Pentland

Systems

Limited at the above address. Please state clearly which manual(s) you require.

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PEN1LAND SYSTEMS LIMITED

MPV905 OPERATING MANUAL

Pentland Systems is committed providing products

of

the highest quality that meet

or

exceed

customers' requirements.

We

have taken great care to ensure that this product will perform

satisfactorily.

If

you should have any difficulty, Pentland Systems Applications Engineers are

available to assist you. Our address, fax and phone numbers are on the preceeding page.

The information provided in this manual is believed to be helpful, accurate and reliable; however

Pentland Systems Limited assumes no responsibility for errors

or

omissions. Pentland Systems

has no control over the use

of

this information, and all such use shall be entirely at the users own

risk. Prices and specifications are subject to change without notice. No patent rights

or

licences

to

any

of

the cirucits

described

herein are

implied

or

granted

to

any

third party.

Pentland Systems Limited does not authorize or warrant any Pentland Systems product for use in

life support devices and/or systems.

Should it become necessary to return this product for repair, please refer to the return procedures

at the end

of

this manual.

CHANGE HISTORY

CN

No.

240

120

147

805

10967

DATE

MAR'85

JUN'86

NOV'86

JUL'87

SEP'90

REVISION

1.0

1.1

-

l.A

l.B

**

THIS MANUAL APPLIES TO

THE

MPV905 -Rev 1 ONLY**

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TABLE

OF

CONTENTS

Page

Chapter

1 -

GENERAL

INFORMATION

1

101

Introduction

oooooooooooooooooooooooooooooooooooooooooooooo 1

1o2

General

Description

ooooooooooooooooooooooooooooooooooooooo 1

1o3

Specification

ooooooooooooooooo00oo000oooooooooo. ooooooo. oo 2

Chapter

2 -

INSTALLATION

INSTRUCTIONS

3

>'

2 o1

Introduction

oooooooooooooooooooooooooooooooooooooooooooooo 3

202

Preparing

the

board

ooooooooooooo• oooooooooooooooooooooooo• 3

2.201

Base

Address

Selection

0000000000000000000000000000000 6

2o2o2

Output

Current

Range

Selection

ooooooooooooooooooooooo 7

2o2o3

Address

Modifier

Code

Response

ooo•oooooooooooooooo•oo 7

2 02 o3 o1 Programming

the

PROM

ooooooooooooooooooooooooooooo 8

2.2.3.2

Programming Examples

.............................

9

Chapter

3 -

OPERATING

INSTRUCTIONS

11

3.

1

Introduction

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

11

3o1o1

Jumpers

Setting

Checklist

oooo•ooooooooooooooooooooooo

11

3 02

Operating

Procedure

oooooooooooooooooooooooooooooooooooooo

11

302 01 Programming ooooooooooooooooooooooooooooooooooooooooo

11

3o2 o1o1

Address

Map

ooooooooooooooooooooooooooooooooooooo 12

3o2o2

CoPoUo

Instructions

000000000000000000000000000000000 12

3o2o3

Analog

Output

Section

00 00

oo

00

.....

00 00

..

13

3o2o3o1

Analog

Output

Current

&

Converter

Input

Codes

000

13

« 3o2o3o 1

Calculating

Output

Current

from

Input

Code 000000 14

3o2o3o3

Output

Range

Selection

• ooo0000o0

00

o

00000

00

000

o 14

30

2.

3 o4

Out

put

Check oooooooooooooooo0• ooooooo0oooooooooo 14

3o2o4

Output

Calibration

0000

00 00

00 00 00

00

00 00

00

0000

15

3o2o5

Output

Loading

00

oo

00

000000 o0

00

00000o

00 00

000000000

00

o

16

3o3

Analog

Connector

ooooooooooooooooooooooooooooooooooooooooo 17

3o4

Factory

Set

Configuration

•ooooooooooooooooooooooooooooooo 17

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Chapter 4 -

FUNCTIONAL

DESCRIPTION

18

4.

1

Introduction

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

4.2

General Information

...................................•..

18

4.

3 Theory

of

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

4.3.

1

Address/AM

Decoder

...............................••.

18

4.

3.

2

Memory

Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

19

4.3.3

Timing

and

Control Logic

...................•....•••.

19

4.3.4

Analog Output

.......................................

19

Chapter 5 -

PROGRAMMING

EXAMPLES

20

5.

1

Introduction

.............................................

20

5.

2

Static

Analog Output

Check

. . . . . . . . . . . . . . . . . . . . . . . . . . . . ••.

20

5.

3

Dynamic

Analog Output

Check

..............................

21

Chapter 6 -

SUPPORT

INFORMATION

22

6.1 Components

List

6.2

Board Layout

6.3

VMEbus

Spec -Address Modifier

Codes

6.4

Digital

to

Analog Converter

DAC800

Data Sheet

Precision

Voltage

to

Current

Converter/Transmitter

XTR110

6.5

Circuit

Diagram

Appendix A -

VMEbus

Backplane Connectors

and

VME

Board Connectors

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S06J\dY-;

L

·L

0Jn~u

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Chapter 1 -

GENERAL

INFORMATION

1.1

INTRODUCTION

This

manual

provides

general

information,

installation

instructions,

operating

instructions,

functional

description

and

applications

software

examples

for

the

MPV905

analog

output

board

(current

source).

1.2

GENERAL

DESCRIPTION

The

MPV905

analog

output

board

is

electrically

and

mechanically

compatible

with,

and

interfaces

directly

to

the

VMEbus.

·

The

features

of

the

MPV905

include:-

- 8

current

source

output

channels.

-

12

bit

resolution.

- 3

output

ranges

covering

standard

industrial

requirements.

-Address block

selectable

in

16

Mbyte

memory

space.

Dynamic

analog

outputs

(using

a

single

digital

to

analog

converter

to

drive

all

8 channels)

allow

the

MPV905

to

provide

high

channel

density

on

a

single

board. This approach

frees

system space

for

other

peripherals

and minimizes per channel power

requirement.

Digital

output

data

for

each

channel

is

stored

in

on-board

RAM

and

the

corresponding

analog

output

voltage

of

the

DAC

is

stored

in

separate

sample

and

hold

circuits.

These

circuits

are

continually

updated

by

refresh

circuitry.

A

voltage

to

current

converter

on

each channel

then

provides

the

current

output.

The

host

CPU

changes

data

in

the

on-board

RAM,

and

therefore

the

output

current,

by a

write

operation

to

the

appropriate

channel.

Glitch

free

operation

is

ensured

as

the

refresh

circuitry

is

disabled

while

new

data

is

being

written

to

the

RAM.

At

power up,

all

outputs

are

set

to

minimum

current

output

for

the

selected

range.

Address

and

Address

Modifier

(AM)

decoding

are

jumper programmable

in

the

16Mbyte

memory

space.

An

on-board

DC

to

DC

converter

powers

the

MPV905

from

the

+5V

system

supply,

the

current

source

outputs

being powered from a

user

supply.

...

/

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1.3

SPECIFICATION

ELECTRICAL

Typical

at

+25°C

and

rated

power

supplies

unless

otherwise

stated.

OUTPUT

CHARACTERISTICS

Number

of

Channels

Output Curent Ranges (Jumper

Selectable)

Short

Circuit

Protection,

Duration

ACCURACY

Total

Error

Max

[1]

Linearity

Gain

Error

Offset

Error

ACCURACY

OVER

TEMPERATURE

Accuracy

Drift

8

0

to

20mA,

4

to

20mA,

5

to

25mA

Indefinite

to

Common

+0.05%

FSR

[2]

"+0.03%

FSR

+0.6%

FSR

"+0.4%

FSR

+60ppm

of

FSR/°C

------------------------------------------------------------------------------

~,'

TRANSFER

CHARACTERISTICS

Resolution

Settling

Time,

max

To

0.1%

of

FSR

To

0.01%

of

FSR

POWER

REQUIREMENTS

From

VMEbus

From

user

supply

(Vee)

ENVIRONMENTAL

Operating Temperature

Storage Temperature

Relative

Humidity

[1]

Gain

and

offset

adjusted

to

zero.

[2]

FSR

means

full

scale

range.

MECHANICAL

12

bits

3.5ms

5.0ms

+5V

+5%

at

1.5A

max

13.5V

to

40V

at

250mA

max

o0c

to

+

60°C

-25°c

to

+85°C

5%

to

90%

noncondensing

Compatible with double-height

VMEbus

card-racking

systems.

Minimum

card spacing

20.34mm

(0.8")

(VNIEbus

specification

compatible).

One

37-pin 'D' type connector

on

board

for

analog

outputs.

Use

Cannon

'D' type connector

part

number

DC37P/1A1N

or

equivalent.

2

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Chapter 2 -

INSTALLATION

INSTRUCTIONS

2.1

INTRODUCTION

This

chapter

provides

installation

instructions

and

an

overview

of

the

user

selectable

options

on

the

MPV905.

2.2

PREPARING

THE

BOARD

This

section

describes

the

hardware

preparation

of

the

MPV905

prior

to

installation

in

a

VMEbus

system. Following

the

instructions

described

in

this

section

will

ensure

that

the

board

is

configured

as

desired

and

will

function

as

expected

when

installed.

MPV905

boards

are

factory

calibrated

and

tested

prior

to

shipment

with>

jumpers

in

pre-determined

positions.

Figure

2.1

indicates

the

physical

position

of

the

jumpers

on

the

board.

Table

2.1

lists

each

jumper,

its

function

and

the

factory

set

position.

A

detailed

description

of

each jump2r

is

given

in

sections

2.2.1

through

2.2.3.

To

alter

the

address

modifier

code response from

the

factory

set

values,

the

user

must

program

the

decoding

PROM

as

described

in

section

2.2.3.1.

Before

installation,

the

user

should

verify

the

configuration

of

the

jumpers

and,

if

necessary,

alter

the

configuration

to

suit

particular

system

requirements.

The

board

should

not

be

installed

or

removed

while

power

is

applied

to

the

VMEbus

system.

3

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Figure 2.1

Position

of

Jumpers

and

Pots

RV1

Gain Adjust

RV2

Offset

Adjust

~----,,--,

I I I I

Channel 7

Ill

~

__

JL_=

__.

Channel 5

r---~r--1

II

I

,,

!_-

-~L--

_j

r--1

I

Channel 3 I

Ill

~

__

.J

Channel 2

Channel 1

r---,

I

L

__

....J

r-

-i

~---

1

I I I

1-

jll

\_I

L

__

'--

_.

IC9

AM

Response

PROM

J4

Response

J3

Base Address

(A16-A23)

J2

u I

r-

Base Address

L-

(A08-A15)

J1

Base Address

"·

(A04-A07)

Channel 6

--Channel

4

Spare

Jumpers Channel 0

I

CHANNEL

JUMPER

GAIN

OFFSET

--------

ADJUST

I

ADJUST

:e:

l

GAIN

l 0 J10

RV10 RV20

11

00

13 l

~ADJUST

l 1 J

11

RV11 RV21

I I I

JUMPERS

-:co:

2 I I I I 2 J12

RV12

RV22

I I I I

I

10::::0L..1

:s:

OFFSET

: 3 J13

RV13 RV23

11

__

1 l -:--i

ADJUST

l 4 J14

RV14 RV24

I I I 5 J15

RV15 RV25

I I I I

6 J16

RV16

I

RV26

I

--------

7 I I

RV27

J17 I

RV17

I

4

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Table 2.1

Jum2er

Functions

&Factory

Settings

JUMPER

I I

I

FUNCTION

I

FACTORY

SET

CONDITON

DESIGNATION

: I

I

I I

J1

I Base Address

Selection

I 4 3 2 1

I I

(A04-A07)

I

IIIIIJ.Iil

I

-

J2 I Base Address

Selection

I 8 7 6 5 4 3 2 1

I I

(A08-A15)

I

1:1:1:1

:I

:lfll/

fl

I

J3 I Base Address

Selection

I 8 7 6 5 4 3 2 1

I I

(A16-A23)

I I

:I

:1:1

:I

:1:1

:I

:1

I ;

"'

I I

J4 I

AM

Code

Response I 2 1

I I

[[J

J10-J17 I Output

Range

Selection

I 3 2 1

I I

'

em

UU

Jumper

Inserted

5

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2.2.1

Base Address

Selection

The

base

address

of

the

MPV905

can be

set

to

any

value

by

selecting

the

appropriate

combination

of

positions

on

jumpers

J1,

J2

and

J3.

The

factory

set

configuration

is

FFF800H.

To

change

the

sense

of

a

bit

simply

change

the

jumper

setting

for

that

bit.

The

MPV905

occupies

8

successive

memory

locations

(word

locations)

within

the

system

memory

map.

Figure

2.2

shows

the

location

and

factory

set

configuration

of

the

jumpers

J1,

J2

and

J3.

Table

2.2

lists

the

jumper

positions

that

determine

which

base

address

is

selected.

Figure

2.2

Base Address

Selection

Jumpers

8 7 6 5 4 3 2 1

I

:I

:I:I:I

:I

:IJ3

8 8 7 6 5 4 3 2 1

c I

:I

'I

!IiIJ2

4 3 2 1

lililtlil

J1

Table

2.2

Base Address Jumper

Selection

ADDRESS

FACTORY

I

JUMPER

LINE

SET

A04

0

J1

Position

1

A05

0 2

A06

0 3

A07

0 4

A08

0 J2

Position

1

A09

0 2

A10

0 3

A

11

I 1 4

A12

I 1 5

I

A13

I 1 I 6

I

A14

I 1 7

I

A15

I 1 8

I

A16

I 1 J3

Position

1

A17

1 2

A18

1 3

A19

1 4

A20

1 5

A21

1 6

A22

I 1 I 7

A23

I 1 I 8

I I

NOTE:

0 =Jumper

Inserted

1 =Jumper

Removed

6

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2.2.2

Output

Current

Range

Selection

Jumpers J10

to

J17

are

used

to

set

the

output

current

range

of

the

analog

outputs.

Each

output

is

set

at

the

factory

for

4

to

20mA

operation

(complementary

straight

binary

coding).

When

changing

the

output

current

range

first

remove

all

the

jumper

links,

then

insert

those

required

for

the

desired

range.

Table

2.3

lists

the

available

analog

output

ranges

and

the

appropriate

jumper

settings.

Figure

2.3

shows

the

factory

set

condition

for

the

jumpers

of

all

channels.

Refer

to

Figure

2.1

for

the

appropriate

channel

and

corresponding

jumper number.

Figure

2.3

Analog Output Range

Selection

Jumper

~

3

JUMPERS

2

1

Table

2.3

~

L-.1

GAIN

ADJUST

OFFSET

ADJUST

Analog Output Range

Selection

RANGE

0

to

20rnA

* 4

to

20mA

5

to

25rnA

I

JUMPER

SELECTION

INSERT

I

REMOVE

2,3

1

'3

1

2,3

2

-=~~~~~~'---------

---------

*

NOTE:-

Factory

Set

Condition

2.2.3

Address

Modifier

Code

Response

IC9

is

a

PROM,

which

in

conjunct

ion

with

jumper

J4,

positions

1 and

2,

allows

the

response

to

address

modifier

codes

to

be

varied

to

suit

user

requirements.

The

PROM/jumper

combination

offers

the

options

shown

in

Table 2.4.

The

PROM

program which

enables

this

response

is

shown

in

the

programming

chart

of

Figure

2.5,

at

the

end

of

this

chapter.

7

!>,'

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The

positions

of

IC9, jumper J4

and

its

factory

set

condition

are

shown

in

Figure

2.4

below:- Figure

2.4

Table

2.4

2 1

[[]

J4

IC9

AM

Response

PROM

Address/Address Modifier

(AM)

Res22nse

J4 I J4

AM

I

ADDRESS

I I

Position

2 I

Position

1 I

CODES

I

DECODING

I

I I I

1 I

Insert

I

Insert

I

N/A

I

A01-A15

I I I

* 2 I

Insert

I

Remove

I

N/A

I

A01-A23

I I I

3 I

Remove

I

Remove

I

3D,

39

I

A01-A23

I I I

I I

*

NOTE

:-

Factory

set

condition

A

new

PROM

can

be

programmed

to

provide

an

alternative

AM

code response.

The

PROM

is

a 256 x 4

bit

open-collector

82S126

type.

The

following

section

explains

the

interaction

between jumper J4

and

the

codes

stored

in

the

PROM.

An

understanding

of

this

section

should allow

the

user

to

select

the

correct

jumper/PROM

code combination

for

a given response.

A

list

of

VMEbus

address

modifier

codes

is

given

in

section

6.3.

2.2.3.1

Programming

the

PROM

There

are

three

allowable

combinations

of

the

J4

jumper

links.

These

combinations

are

given

in

Table

2.4 and

are

referred

to

as

(1),

(2),

(3).

It

is

intended

that

combinations

(1) and (2) be

reserved

for

the

responses

detailed

in

Table

2.5,

ie,

short

addressing

with

no

AM

codes

and

standard

addressing

with

no

AM

codes

respectively.

Combination

(3)

ho\o~ever,

(both

links

removed),

in

conjunction

with

the

information

stored

in

the

PROM,

is

designed

to

allow

the

response

to

address/AM codes

to

be

modified,

to

suit

system requirements,

as

shown

in

Table

2.5.

Setting

the

two

most

significant

data

bits

(D3

and

D2)

to

a

low

level

allows responses

(1)

and

(2)

as

shown

in

Table 2.5. With

both jumper

links

removed

it

is

the

setting

of

data

bits

DO

and

D1

which

determines

the

response.

8

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The

following

section

(2.2.3.2)

illustrates

the

method

to

be

used

when

programming

the

PROM

to

produce a given

response.

Table

2.5

Address/AM Response

Options

with

Jumper Links

Removed

AM

CODE

I

DATA

BIT

I I

RESPONSE

NOTE

(

1)

:

D3

D2

D1

DO

.

XY

: 0 0 0 0 I

Short

addressing

with

AM

I

XY

: 0 0 0 1 I

Short

addressing

with

AM

I

XY

: 0 0 1 0 I

Standard

addressing

with

AM

I

XY

: 0 0 1 1 I

No

response

to

address/AM

I

-===~~-~~~~--~~

NOTE:

The

AM

code

indicated

as

XY

can

take

any

of

the

possible

values

defined

in

the

VMEbus

specification

Revision

B. (See

Section

C).

2.2.3.2

Programming Examples

The

Factory

Response

Referring

to

Table 2.4,

the

programming

of

the

PROM

to

give

the

factory

set

response

is

as

follows.

1.

Decide

upon

STANDARD

or

SHORT

addressing-

STANDARD

(ie,

A01-A23

decoded)

2.

Decide upon

AM

codes

to

which

the

board

will

respond -

3D,

39.

3. Refer

to

Table 2.5

and

under

"response"

heading look

for

"Standard

addressing

with

AM".

The

data

to

be

stored

at

the

relevant

memory

addresses

can

then

be read from

the

table

(in

this

case

0010 (02H)).

4.

Place

the

code

obtained

in

(3),

(ie

02H),

at

memory

locations

3D

and

39.

5.

Refer

to

Table

2.5 and

under

"response"

heading

look

for

"No

response

to

address/AM".

The

data

to

be

stored

at

the

relevant

memory

addresses,

(in

this

case

all

locations

other

than

3D

and 39),

can

then

be read from

the

table,

(in

this

case

0011

(03H)).

6.

Place

the

code

obtained

in

(5),

(ie,

03H),

at

all

memory

locations

other

than

3D

and 39.

9

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Short

Addressing With

AM

Assume

that

the

following

response

is

desired

-

Short

Address decoding,

(ie,

A01

-A

15

decoded)

and

AM

codes

20 and 29*

to

be

responded

to.

The

following

steps

would

yield

the

data

to

be

placed

in

the

PROM.

1. Addressing

mode-

SHORT.

2.

Code

response -20 and 29.

3.

Refer

to

Table

2.5 and

under

"response"

heading

look

for

"Short

addressing

with

AM"

(Note

-

there

are

two

entries

under

this

heading).

The

data

to

be

stored

at

the

relevant

memory

address

can

then

be read from

the

table,

(in

this

there

is

a

choice

of

two codes

-0000

(OOH)

or

0001 (01H)).

4.

Place

either

of

the

codes

obtained

in

(3),

(ie,

OOH

or

01H),

at

memory

locations

20 and 29.

5.

Refer

to

table

2.5 and

under

"response"

heading

look

for

"No

response

to

address/AM".

The

data

to

be

stored

at

the

relevant

·

memory

addresses

(in

this

case

all

locations

other

than

20 and

29),

,.

can then be read from

the

table,

(in

this

case

03H).

6.

Place

the

code

obtained

in

(5),

(ie,

03H)

at

all

memory

locations

other

than

20 and 29.

Similar

reasoning

applies

to

any

other

combination

of

address/AM

response.

*Any

number

and

combination

of

AM

codes

may

be

catered

for.

10

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;~

Chapter 3 -

OPERATING

INSTRUCTIONS

3.1

INTRODUCTION

This

chapter

provides

the

necessary

information

to

allow

the

use

of

the

MPV905

in

a

VMEbus

system.

3. 1.1 Jumper

Setting

Checklist

Before plugging

the

board

into

a

VMEsystem

and

applying

power, check,

to

ensure

proper

system

operation,

that

the

following

options

have

been

correctly

set.

1. Base Address.

Has

the

Base

Address

of

the

board

been

set

to

suit

system

requirements?

(Section

2.2.1)

2.

Address Modifier Response.

Has

Address

Modifier

Response been

correctly

set?

(Section

2.2.3)

3. Output Range.

Has

the

correct

current

output

range

been

selected?

(Section

2.2.2)

3.2

OPERATING

PROCEDURE

The

board

is

shipped from

the

factory

in

a

calibrated

condition

and

ready

for

use.

Installation

only

requires

plugging

the

card

into

an empty

slot

in

the

V'1Ebus

card

cage

and

wiring

the

analog

connector.

However,

the

board can be adapted

to

suit

user

requirements

therefore,

some

features

of

the

board

are

jumper

selectable.

These

features

are

covered

in

chapter

2

which

should

be

referred

to

before

using

the

board

or

if

a

configuration

other

than

the

factory

set

condition

is

desired.

3.2.1

Programming

The

board

is

programmed

as

8

successive

memory

locations

(word

locations),

jumper

selectable

within

the

16

Mbyte

address

range,

in

8

word

blocks,

commencing

at

address

OOOOOOH.

The

analog

output

has

a

resolution

of

12-bits

and

therefore

word

accesses

are

required

for

each

channel.

11

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3.2.

1.1 Address

Map

(Memory

Map)

The

address

map

(memory

map)

for

the

MPV905

board

is

shown

in

Figure

3.1.

The

base

address

is

jumper

selectable.

(Section

2.2.1)

Output

data

(i.e.

data

to

set

an

analog

output

to

a

particular

value)

is

transferred

to

the

board

from

the

CPU

with

MOVE

instructions

to

the

appropriate

addresses.

8

consecutive

addresses

are

used,

starting

from

the

base

address

XXXXXO,

(the

X-states

are

selected

as

previously

described).

As

each

operation

is

a

word

access,

word

addressing

must be

used (even

addresses

only).

NOTE

: A

read

operation

to

a

channel

results

in

the

channel

being

reset

to

the

lowest

current

output

in

the

selected

range.

·

Figure

3.1

MPV905

Address

(Memory)

Map

Factory

Set

WRITE

READ

Address

D15

D11

DO

D15

D11

DO

FFF800l/////////

OUTO

l

l/////////1

RESET

OUTO

FFF802l/////////

OUT1

l

l/1///////l

RESET

OUT1

FFF804l/////////

OUT2

l

l///////1/l

RESET

OUT2

/IIIII/I/

• l

/////////'

/II/IIIII

• l

/////////

ll/1/////

. l

/////////

Ill//////

. l

/////////

• l/11111111 l

/////////.

FFF80E

lII II II II I

OUT7

l I II I III I I

l--.,-RE"""s=E=T.....,O"""u=T=7---

3.2.2

CPU

Instructions

The

CPU

transfers

data

to

the

MPV905

by

using

MOVE

instructions,

using

the

addresses

and

data

lines

shown

in

the

address

(memory)

map

of

Figure

3.1. These

instructions

are

described

in

the

following

1

ist.

The

selected

base

address

of

the

board

is

XXXXXO

(factory

set

to

FFF800H).

The

CPU

register

Dn

is

used

as

the

data

register

(and

may

be any

of

the

allowable

registers

within

the

CPU).

MOVE.

W

Dn,

FFF800

-

This

instruct

ion

moves

the

contents

of

data

register

Dn,

within

the

CPU,

to

analog

output

OUT0.

MOVE.W

Dn,FFF802

-

This

instruction

moves

the

contents

of

data

register

Dn,

within

the

CPU,

to

analog

output

OUT1.

MOVE.W

Dn,FFF80E

-

This

instruction

moves

the

contents

of

data

register

Dn,

within

the

CPU,

to

analog

output

OUT7.

This

illustrates

the

procedure

for

transferring

data

to

the

MPV905

to

allow

each

output

to

be

individually

set.

12

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3.2.3

Analog Output

Section

3.2.3.1

Analog Output

Current

and Converter

Input

Codes

The

digital

input

value

of

a

selected

output

is

converted

to

a

current.

The

digital

to

analog

converter

gives

an

output

coding

scheme

of

complementary

straight

binary.

Table

3.1

illustrates

the

full-scale

negative,

mid-scale

and

full-scale

positive

output

currents

for

the

three

output

ranges

with

the

corresponding

digital

input

codes

of

the

digital

to

analog

converter

and

the

value

of

the

least

significant

bit

(LSB).

Figure 3.2 shows,

in

graphical

form,

the

relationship

between

the

digital

input code

and

the

output

current.

e.g.

In

Table

3.2

a

digital

input

code

of

(X)FFFH

corresponds

to

an

output

current

of

4mA

in

the

range

4

to

20mA.

In

the

same

range

a

value

of

(X)OOOH

will

produce

an

output

current

of

19.996mA.

Table 3.1

Complementary

Straight

Binary

SELECTED

:

NEGATIVE

:

MIDSCALE

:

POSITIVE

1

RESOLUTION

RANGE

:

FULL

SCALE

: :

FULL

SCALE

.

OUTPUT

CODE

: :

(X)FFFH

:

(X)7FFH

:

(X)OOOH

0

to

20mA!

O.'OOmA

:

+10.0mA

!

+19.995mA

:-

4

.88uA

____

I

__

_

4

to

20mA!

4.00mA

:

+12.0mA

:

+19.996mA

: 3.91uA

I

~------

--.-...,....,...

5

to

25mA:

5.00mA

!

+15.0mA

!

+24.995~~

: 4.88uA

I I

NOTE:-

x-indicates

don't

care

states

Figure

3.2

Complementary

Straight

Binary

Output

Current

25mA

20mA

5mA

4mA

OmA

13

X)OOOH

Digital

Input

Code

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PENTLAND MPV905 User manual

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