Philips ISP1122A Operation manual

ISP1122A
Universal Serial Bus stand-alone hub
Rev. 03 — 30 October 2001 Product data
1. General description
The ISP1122A is a stand-alone Universal Serial Bus (USB) hub device which
complies with USB Specification Rev. 1.1 . It integrates a Serial Interface Engine
(SIE), hub repeater, hub controller, USB data transceivers and a 3.3 V voltage
regulator. It has a configurable number of downstream ports, ranging from 2 to 5.
The ISP1122A can be bus-powered, self-powered or hybrid-powered. When it is
hybrid-powered the hub functions are powered by the upstream power supply (VBUS),
but the downstream ports are powered by an external 5 Volt supply. The low power
consumption in ‘suspend’ mode allows easy design of equipment that is compliant
with the ACPI™, OnNow™ and USB power management requirements.
The ISP1122A has built-in overcurrent sense inputs, supporting individual and global
overcurrent protection for downstream ports. All ports (including the hub) have
GoodLink™ indicator outputs for easy visual monitoring of USB traffic. The ISP1122A
has a serial I2C-bus interface for external EEPROM access and a reduced frequency
(6 MHz) crystal oscillator. These features allow significant cost savings in system
design and easy implementation of advanced USB functionality into PC peripherals.
2. Features
■High performance USB hub device with integrated hub repeater, hub controller,
Serial Interface Engine (SIE), data transceivers and 3.3 V voltage regulator
■Complies with Universal Serial Bus Specification Rev. 1.1 and ACPI, OnNow and
USB power management requirements
■Configurable from 2 to 5 downstream ports with automatic speed detection
■Internal power-on reset and low voltage reset circuit
■Supports bus-powered, hybrid-powered and self-powered application
■Individual or ganged power switching for downstream ports
■Individual or global port overcurrent protection with built-in sense circuits
■6 MHz crystal oscillator with on-chip PLL for low EMI
■Visual USB traffic monitoring (GoodLink™) for hub and downstream ports
■I2C-bus interface to read vendor ID, product ID and configuration bits from
external EEPROM
■Operation over the extended USB bus voltage range (4.0 to 5.5 V)
■Operating temperature range −40 to +85 °C
■8 kV in-circuit ESD protection for lower cost of external components
■Full-scan design with high test coverage
■Available in 32-pin SDIP, SO and LQFP packages.

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 2 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
3. Ordering information
4. Block diagram
Table 1: Ordering information
Type number Package
Name Description Version
ISP1122AD SO32 plastic small outline package; 32 leads; body width 7.5 mm SOT287-1
ISP1122ANB SDIP32 plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1
ISP1122ABD LQFP32 plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm SOT358-1
This is a conceptual block diagram and does not include each individual signal.
Fig 1. Block diagram.
pagewidth
MBL169
I2C-BUS
INTERFACE
HUB
REPEATER
ISP1122A
ANALOG
Tx/Rx
D+D−overcurrent
detection
downstream
port 1
LED/
power switch
GoodLink/
POWER SWITCH/
OC DETECT
ANALOG
Tx/Rx
D+D−overcurrent
detection
downstream
port 2
LED/
power switch
GoodLink/
POWER SWITCH/
OC DETECT
ANALOG
Tx/Rx
D+D−overcurrent
detection
downstream
port 3
LED/
power switch
GoodLink/
POWER SWITCH/
OC DETECT
ANALOG
Tx/Rx
D+D−overcurrent
detection
downstream
port 4
LED/
power switch
GoodLink/
POWER SWITCH/
OC DETECT
ANALOG
Tx/Rx
D+D−
full
speed
upstream
port
LED
HUB
GoodLink
ANALOG
Tx/Rx
D+D−overcurrent
detection
self/bus
powered
downstream
port 5
LED/
power switch
GoodLink/
POWER SWITCH/
OC DETECT
HUB
CONTROLLER
PACKET
GENERATOR
GENERAL
PORT
CONTROLLER
END OF
FRAME
TIMERS
PHILIPS
SIE
BIT CLOCK
RECOVERY
PLL
6 MHz
SUPPLY
REGULATOR
VCC
3.3 V
5 V
Vreg(3.3)
SDA
INDV
OPTION
SCL

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 3 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
5. Pinning information
5.1 ISP1122AD (SO32) and ISP1122ANB (SDIP32)
5.1.1 Pinning
5.1.2 Pin description
Fig 2. Pin configuration SO32. Fig 3. Pin configuration SDIP32.
handbook, halfpage
ISP1122AD
MBL163
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vreg(3.3)
GND
DM3
DP3
VCC
DM4
DP4
DP2
DM2
DP0
DP1
DM1
DM0
DP5
DM5
INDV/SDA
OPTION/SCL
XTAL2
XTAL1
PSW1/GL1
RESET
PSW5/GL5/GPSW
PSW4/GL4PSW3/GL3
HUBGL
SP/BP
OC5/GOC
PSW2/GL2
OC1
OC2
OC3
OC4
handbook, halfpage
ISP1122ANB
MBL164
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vreg(3.3)
GND
DM3
DP3
VCC
DM4
DP4
DP2
DM2
DP0
DP1
DM1
DM0
DP5
DM5
INDV/SDA
OPTION/SCL
XTAL2
XTAL1
PSW1/GL1
RESET
PSW5/GL5/GPSW
PSW4/GL4PSW3/GL3
HUBGL
SP/BP
OC5/GOC
PSW2/GL2
OC1
OC2
OC3
OC4
Table 2: Pin description for SO32 and SDIP32
Symbol[1] Pin Type Description
Vreg(3.3)[2] 1 - regulated supply voltage (3.3 V ±10%) from internal
regulator; used to connect pull-up resistor on DP0 line
PSW2/GL2[3] 2Omodes 4 to 6: power switch control output for downstream
port 2 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 2 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
GND 3 - ground supply
DM3 4 AI/O downstream port 3 D−connection (analog)[4]
DP3 5 AI/O downstream port 3 D+connection (analog)[4]
VCC 6 - supply voltage; connect to USB supply VBUS (bus-powered or
hybrid-powered) or to local supply VDD (self-powered)
OC1 7 AI/I overcurrent sense input for downstream port 1 (analog[5])
OC2 8 AI/I overcurrent sense input for downstream port 2 (analog[5])

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 4 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
OC3 9 AI/I overcurrent sense input for downstream port 3 (analog[5])
OC4 10 AI/I overcurrent sense input for downstream port 4 (analog[5])
OC5/GOC[3] 11 AI/I modes 5, 7: overcurrent sense input for downstream port 5
(analog[5])
modes 0, 1, 3: global overcurrent sense input (analog[5])
DM4 12 AI/O downstream port 4 D−connection (analog)[4]
DP4 13 AI/O downstream port 4 D+connection (analog)[4]
SP/BP 14 I selects power mode:
self-powered: connect to VDD (local power supply); also use
this mode for hybrid-powered operation
bus-powered: connect to GND; disable downstream port 5 to
meet supply current requirements[4]
HUBGL 15 O hub GoodLink LED indicator output (open-drain, 6 mA);
to connect an LED use a 330 Ωseries resistor; if unused
connect to VCC via a 10 kΩresistor
PSW3/GL3[3] 16 O modes 4 to 6: power switch control output for downstream
port 3 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 3 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
PSW4/GL4[3] 17 O modes 4 to 6: power switch control output for downstream
port 4 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 4 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
PSW5/GL5/
GPSW[3] 18 O mode 5: power switch control output for downstream port 5
(open-drain, 6 mA)
modes 3, 7: GoodLink LED indicator output for downstream
port 5 (open-drain, 6 mA); to connect an LED use a 330 Ω
series resistor
modes 0 to 2: gang mode power switch control output
(open-drain, 6 mA)
XTAL1 19 I crystal oscillator input (6 MHz)
XTAL2 20 O crystal oscillator output (6 MHz)
RESET[2] 21 I reset input (Schmitt trigger); a LOW level produces an
asynchronous reset; connect to VCC for power-on reset
(internal POR circuit)
OPTION/SCL 22 I/O mode selection input; also functions as I2C-bus clock output
(open-drain, 6 mA)
INDV/SDA 23 I/O selects individual (HIGH) or global (LOW) power switching
and overcurrent detection; also functions as bidirectional
I2C-bus data line (open-drain, 6 mA)
DM5 24 AI/O downstream port 5 D−connection (analog)[4]
DP5 25 AI/O downstream port 5 D+connection (analog)[4]
DM1 26 AI/O downstream port 1 D−connection (analog)[6]
DP1 27 AI/O downstream port 1 D+connection (analog)[6]
Table 2: Pin description for SO32 and SDIP32 …continued
Symbol[1] Pin Type Description

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 5 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
[1] Symbol names with an overscore (e.g. NAME) indicate active LOW signals.
[2] The voltage at pin Vreg(3.3) is gated by the RESET pin. This allows fully self-powered operation by
connecting RESET to VBUS (+5 V USB supply). If VBUS is lost upstream port D+ will not be driven.
[3] See Table 4 “Mode selection”.
[4] To disable a downstream port connect both D+and D−to VCC via a 1 MΩresistor; unused ports must
be disabled in reverse order starting from port 5.
[5] Analog detection circuit can be switched off using an external EEPROM, see Table 23; in this case,
the pin functions as a logic input (TTL level).
[6] Downstream ports 1 and 2 cannot be disabled.
DM0 28 AI/O upstream port D−connection (analog)
DP0 29 AI/O upstream port D+connection (analog)
DM2 30 AI/O downstream port 2 D−connection (analog)[6]
DP2 31 AI/O downstream port 2 D+connection (analog)[6]
PSW1/GL1[3] 32 O modes 4 to 6: power switch control output for downstream
port 1 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 1 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
Table 2: Pin description for SO32 and SDIP32 …continued
Symbol[1] Pin Type Description

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 6 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
5.2 ISP1122ABD (LQFP32)
5.2.1 Pinning
5.2.2 Pin description
Fig 4. Pin configuration LQFP32.
i
dth
ISP1122ABD
MBL165
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
DM3 GND PSW2/GL2 Vreg(3.3) PSW1/GL1 DP2 DM2 DP0
DP4
SP/BP
HUBGL
PSW3/GL3 PSW4/GL4
PSW5/GL5/GPSW
XTAL1 XTAL2
DP3
VCC
OC1
DM4
DM0
DP1
DM1
DP5
DM5
INDV/SDA
OPTION/SCL
RESET
OC2
OC3
OC4
OC5/GOC
Table 3: Pin description for LQFP32
Symbol[1] Pin Type Description
Vreg(3.3)[2] 29 - regulated supply voltage (3.3 V ±10%) from internal
regulator; used to connect pull-up resistor on DP0 line
PSW2/GL2[3] 30 O modes 4 to 6: power switch control output for downstream
port 2 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 2 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
GND 31 - ground supply
DM3 32 AI/O downstream port 3 D−connection (analog)[4]
DP3 1 AI/O downstream port 3 D+connection (analog)[4]
VCC 2 - supply voltage; connect to USB supply VBUS (bus-powered or
hybrid-powered) or to local supply VDD (self-powered)
OC1 3 AI/I overcurrent sense input for downstream port 1 (analog[5])
OC2 4 AI/I overcurrent sense input for downstream port 2 (analog[5])
OC3 5 AI/I overcurrent sense input for downstream port 3 (analog[5])
OC4 6 AI/I overcurrent sense input for downstream port 4 (analog[5])

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 7 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
OC5/GOC[3] 7 AI/I modes 5, 7: overcurrent sense input for downstream port 5
(analog[5])
modes 0, 1, 3: global overcurrent sense input (analog[5])
DM4 8 AI/O downstream port 4 D−connection (analog)[4]
DP4 9 AI/O downstream port 4 D+connection (analog)[4]
SP/BP 10 I selects power mode:
self-powered: connect to VDD (local power supply); also use
this mode for hybrid-powered operation
bus-powered: connect to GND; disable downstream port 5 to
meet supply current requirements[4]
HUBGL 11 O hub GoodLink LED indicator output (open-drain, 6 mA);
to connect an LED use a 330 Ωseries resistor; if unused
connect to VCC via a 10 kΩresistor
PSW3/GL3[3] 12 O modes 4 to 6: power switch control output for downstream
port 3 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 3 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
PSW4/GL4[3] 13 O modes 4 to 6: power switch control output for downstream
port 4 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 4 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
PSW5/GL5/
GPSW[3] 14 O mode 5: power switch control output for downstream port 5
(open-drain, 6 mA)
modes 3, 7: GoodLink LED indicator output for downstream
port 5 (open-drain, 6 mA); to connect an LED use a 330 Ω
series resistor
modes 0 to 2: gang mode power switch control output
(open-drain, 6 mA)
XTAL1 15 I crystal oscillator input (6 MHz)
XTAL2 16 O crystal oscillator output (6 MHz)
RESET[2] 17 I reset input (Schmitt trigger); a LOW level produces an
asynchronous reset; connect to VCC for power-on reset
(internal POR circuit)
OPTION/SCL 18 I/O mode selection input; also functions as I2C-bus clock output
(open-drain, 6 mA)
INDV/SDA 19 I/O selects individual (HIGH) or global (LOW) power switching
and overcurrent detection; also functions as bidirectional
I2C-bus data line (open-drain, 6 mA)
DM5 20 AI/O downstream port 5 D−connection (analog)[4]
DP5 21 AI/O downstream port 5 D+connection (analog)[4]
DM1 22 AI/O downstream port 1 D−connection (analog)[6]
DP1 23 AI/O downstream port 1 D+connection (analog)[6]
DM0 24 AI/O upstream port D−connection (analog)
DP0 25 AI/O upstream port D+connection (analog)
Table 3: Pin description for LQFP32 …continued
Symbol[1] Pin Type Description

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 8 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
[1] Symbol names with an overscore (e.g. NAME) indicate active LOW signals.
[2] The voltage at pin Vreg(3.3) is gated by the RESET pin. This allows fully self-powered operation by
connecting RESET to VBUS (+5 V USB supply). If VBUS is lost upstream port D+ will not be driven.
[3] See Table 4 “Mode selection”.
[4] To disable a downstream port connect both D+and D−to VCC via a 1 MΩresistor; unused ports must
be disabled in reverse order starting from port 5.
[5] Analog detection circuit can be switched off using an external EEPROM, see Table 23; in this case,
the pin functions as a logic input (TTL level).
[6] Downstream ports 1 and 2 cannot be disabled.
6. Functional description
The ISP1122A is a stand-alone USB hub with up to 5 downstream ports. The number
of ports can be configured between 2 and 5. The downstream ports can be used to
connect low-speed or full-speed USB peripherals. All standard USB requests from
the host are handled by the hardware without the need for firmware intervention. The
block diagram is shown in Figure 1.
The ISP1122A requires only a single supply voltage. An internal 3.3 V regulator
provides the supply voltage for the analog USB data transceivers.
The ISP1122A supports both bus-powered and self-powered hub operation. When
using bus-powered operation a downstream port cannot supply more than 100 mA to
a peripheral. In case of self-powered operation an external supply is used to power
the downstream ports, allowing a current consumption of max. 500 mA per port.
A basic I2C-bus interface is provided for reading vendor ID, product ID and
configuration bits from an external EEPROM upon a reset.
6.1 Analog transceivers
The integrated transceiver interfaces directly to the USB cables through external
termination resistors. They are capable of transmitting and receiving serial data at
both ‘full-speed’ (12 Mbit/s) and ‘low-speed’ (1.5 Mbit/s) data rates. The slew rates
are adjusted according to the speed of the device connected and lie within the range
mentioned in the USB Specification Rev. 1.1 .
DM2 26 AI/O downstream port 2 D−connection (analog)[6]
DP2 27 AI/O downstream port 2 D+connection (analog)[6]
PSW1/GL1[3] 28 O modes 4 to 6: power switch control output for downstream
port 1 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 1 (open-drain, 6 mA); to connect an LED
use a 330 Ωseries resistor
Table 3: Pin description for LQFP32
…continued
Symbol[1] Pin Type Description

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 9 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
6.2 Philips Serial Interface Engine (SIE)
The Philips SIE implements the full USB protocol layer. It is completely hardwired for
speed and needs no firmware intervention. The functions of this block include:
synchronization pattern recognition, parallel/serial conversion, bit (de-)stuffing, CRC
checking/generation, Packet IDentifier (PID) verification/generation, address
recognition, handshake evaluation/generation.
6.3 Hub repeater
The hub repeater is responsible for managing connectivity on a ‘per packet’ basis. It
implements ‘packet signalling’ and ‘resume’ connectivity. Low-speed devices can be
connected to downstream ports. If a low-speed device is detected the repeater will
not propagate upstream packets to the corresponding port, unless they are preceded
by a PREAMBLE PID.
6.4 End-of-frame timers
This block contains the specified EOF1 and EOF2 timers which are used to detect
‘loss-of-activity’ and ‘babble’ error conditions in the hub repeater. The timers also
maintain the low-speed keep-alive strobe which is sent at the beginning of a frame.
6.5 General and individual port controller
The general and individual port controllers together provide status and control of
individual downstream ports. Any port status change will be reported to the host via
the hub status change (interrupt) endpoint.
6.6 GoodLink
Indication of a good USB connection is provided through GoodLink technology. An
LED can be directly connected via an external 330 Ωresistor.
During enumeration the LED blinks on momentarily. After successful configuration of
the ISP1122A, the LED is permanently on. The LED blinks off for 100 ms upon each
successful packet transfer (with ACK). The hub GoodLink indicator blinks when the
hub receives a packet addressed to it. Downstream GoodLink indicators blink upon
an acknowledgment from the associated port. In ‘suspend’ mode the LED is off.
This feature provides a user-friendly indication of the status of the hub, the connected
downstream devices and the USB traffic. It is a useful diagnostics tool to isolate faulty
USB equipment and helps to reduce field support and hotline costs.
6.7 Bit clock recovery
The bit clock recovery circuit recovers the clock from the incoming USB data stream
using a 4×oversampling principle. It is able to track jitter and frequency drift as
specified by the USB Specification Rev. 1.1 .
6.8 Voltage regulator
A 5 to 3.3 V DC-DC regulator is integrated on-chip to supply the analog transceiver
and internal logic. This can also be used to supply the terminal 1.5 kΩpull-up resistor
on the D+line of the upstream connection.

Philips Semiconductors ISP1122A
USB stand-alone hub
Product data Rev. 03 — 30 October 2001 10 of 48
9397 750 08958 © Koninklijke Philips Electronics N.V. 2001. All rights reserved.
6.9 PLL clock multiplier
A 6 to 48 MHz clock multiplier Phase-Locked Loop (PLL) is integrated on-chip. This
allows for the use of low-cost 6 MHz crystals. The low crystal frequency also
minimizes Electro-Magnetic Interference (EMI). The PLL requires no external
components.
6.10 Overcurrent detection
An overcurrent detection circuit for downstream ports has been integrated on-chip. It
is self-reporting, resets automatically, has a low trip time and requires no external
components. Both individual and global overcurrent detection are supported.
6.11 I2C-bus interface
A basic serial I2C-bus interface (single master, 100 kHz) is provided to read VID, PID
and configuration bits from an external I2C-bus EEPROM (e.g. Philips PCF8582 or
equivalent). At reset the ISP1122A reads 6 bytes of data from the external memory.
The I2C-bus interface timing complies with the standard mode of operation as
described in The I
2
C-bus and how to use it , order number 9398 393 40011.
7. Modes of operation
The ISP1122A has several modes of operation, each corresponding with a different
pin configuration. Modes are selected by means of pins INDV, OPTION and SP/BP,
as shown in Table 4.
[1] Port power switching: logic 0 = ganged, logic 1 = individual.
[2] Power mode: logic 0 = bus-powered, logic 1 = self-powered (or hybrid-powered).
[3] No overcurrent detection.
[4] No power switching.
Table 4: Mode selection
Mode INDV
[1] OPTION SP/BP [2] PSWn/GLn
(n = 1 to 4) PSW5/GL5/GPSW OCn (n = 1 to 4) OC5/GOC
0000GoodLink ganged power inactive global overcurrent
1001GoodLink ganged power inactive global overcurrent
2010GoodLink ganged power inactive[3] inactive[3]
3011GoodLink[4] GoodLink[4] inactive global overcurrent
4100individual power inactive individual
overcurrent inactive
5101individual power individual power individual
overcurrent individual overcurrent
6110individual power inactive inactive[3] inactive[3]
7111GoodLink[4] GoodLink[4] individual
overcurrent individual overcurrent