Roadstar CLT-700 User manual

Service Manual - CLT-700
Service Manual - CLT-700
CLT-700
R

1. DESCRIPTION OF EQUIPMENT
1. TYPE OF THE CIRCUIT
A. BASE UNIT RECEIVER ; Double convers on superheterodyne rece ver
B. HANDSET RECEIVER ; Double convers on superheterodyne rece ver
2. FREQUENCY AND CHANNELS
A. BASE UNIT CT1 CT1+
TX 959.0125 – 959.9875MHz 930.0125MHz – 931.9875MHz
RX 914.0125 – 914.9875MHz 885.0125MHz – 886.9875MHz
B.HANDSET
TX 914.0125 – 914.9875MHz 885.0125MHz – 886.9875MHz
RX 959.0125 – 959.9875MHz
930.0125MHz – 931.9875MHz
C. CHANNELS 40 80
D. CH SPACING 25KHz 25KHz
3. TRANSMIT POWER : 10mW
4. OPERATING VOLTAGE
A. BASE UNIT ; AC 230V / 50Hz
B. HANDSET ; DC 3.6V
5. OPERATING TEMPERATURE : 0 ~ 55 C

2. CIRCUIT DESCRIPTION
A. BASE UNIT
1. Pow r supply circuit
The DC 9V from the AC adaptor s suppl ed to JP3 (DC modular jack).
Th s nput voltage s suppl ed to the ma n c rcu t through D8 (d ode) and suppl ed to the
charge c rcu t.
The voltage from D8 s regulated to 5V by regulator U9. Th s regulated 5V s suppl ed
to ma n c rcu t and RF c rcu t.
2. Charging circuit
Charg ng c rcu t s composed of U11, Q11, Q12, R99, R100, R102, R103 and R104.
Th s charg ng c rcu t suppl es constant current to the handset batter es through CHG+1
and CHG-1.
When the charge current flows through R100, U11 (photo-coupler) detects the current
and send a CHARGE s gnal to p n 23 of U4 (CPU).
Then LD4 (VISION) or LD6 (INNO)1 s l ghted by the command from CPU (p n 28)
LED_CHG.
3. R c iving audio signal from t l phon lin
The aud o s gnal from JP1 (telephone l ne modular jack) goes p n 1 of U1 (speech
network) through br dge d ode composed of D1, D2, D3 and D4, C814 and sw tch ng
trans stor Q3.
After be ng ampl f ed n speech network, t comes out from p n 4 and goes to the p n8 of
U10 (compander) through R81 and C62.
Th s s gnal s ampl f ed and compressed for no se reduct on then goes through 3rd
order low pass f lter composed of op amp n U10, C52, C53, C54 R72, R73 and R74.
Th s s gnal s sent to the modulat on nput (MOD_AUDIO) of the RF block through C51,
R70 and RV3 and transm tted to the handset.
4. S nding audio signal to t l phon lin
Rece ved RF s gnal from handset s detected n the RF block and the demodulated
aud o s gnal (DEMOD_AUDIO) s f ltered by low pass f lter composed of U8A, C41,
C42, C43, R57, R58 and R59 through C44. Th s aud o s gnal s f ltered aga n by
h gh pass f lter composed of op amp n U10, C37, C38, C39, R53, R54 and R55 then
expanded n U10.
The expanded s gnal com ng from p n 19 of U10 goes to the p n 6 and 7 of U1 (speech
network) through C34 and R52.

Speech network adjusts a transm t s gnal ga n and sends t to the telephone l ne
through sw tch ng trans stor Q3, br dge d ode (D1, D2, D3 and D4) and modular jack
JP1.
5. S nding and R c iving of data signal
The send ng MSK data comes out from TX_DATA of CPU (p n 43), and enters nto p n
4 of U10 (compander).
It s modulated at RF block through the same path as aud o s gnal.
The rece ved MSK data wh ch demodulated at RF block w th the same manner as
aud o s gnal s go ng to the low path f lter composed of U8C, C47, C48, C49, R64, R65
and R67. F ltered s gnal s comparated at U8D. The square wave from U8D(RX_DATA)
s fed to p n 44 of CPU.
6. Ring d t ctor circuit
When the r ng s gnal s suppl ed to U2(photo coupler) through C1, R1, DZ1, DZ2 and
R3, U2 detects t and send a RING_SIGNAL s gnal to p n 31 of U4 (CPU).
Then the base un t sends a r ng ng data through the "send ng data path" to the
handset.
7. Lin d t ct circuit
If the telephone l ne s connected, the Q2 w ll be on, LINE_DETECT s gnal become low
level. Then CPU knows that tel-l ne s connected.
If the telephone l ne s not connected or h gher pr or ty telephone s operated, the Q2
w ll be off and CPU knows that tel-l ne s not connected or h gher pr or ty telephone s
operat ng.
Th s funct on s factory settable opt on.
8. DTMF signal
In case that the phone s n tone d al ng mode, t s poss ble to use DTMF d al.
DTMF s gnal s generated by U3 by the command of D0, D1, D2 and D3 from CPU
(p n 11, 12, 13, and 14).
DTMF s gnal from U3 (p n 14) s suppl ed to the p n 11 of U1 and sent to the telephone
l ne.
9. Puls dialing
In case that the phone s n pulse d al ng mode, t s poss ble to use pulse d al.
The pulse s gnal s made by sw tch ng Q3 (sw tch ng TR) on and off by
PULSE_CON(CPU p n 30).

Dur ng the pulse comes out, the CPU makes the Q5 on by ma nta n ng PPD_CON (p n
25 of CPU) h gh, n th s t me the sw tch ng board w ll acknowledge the d al clearly by
the occurance of the low mpedance.
10. EEPROM
U6 s the EEPROM.
Th s stores the dent f cat on code wh ch are nherent to pa r of base un t and handset
to safe guard aga nst nterference. It also stores telephone numbers for memory d al.
11. R s t circuit
Reset s appl ed by connect ng an external capac tor C70 and a d ode D7.
12. Sp ch n twork
R20, R21,C16, C17, and C18 are used for mpedance match ng between telephone
l ne and phone.
The res stors and capac tors connectors connected p n10, 16 of U1 are for s de tone
balance.

B. Bas RF S ction
Frequenc es
[ CT1 ]
RX VCO
Base un t : fVCO = (fRX - 21.7MHz) / 2 = 446.39375MHz (20CH)
Handset : fVCO = (fRX + 21.7MHz) / 2 = 490.59375MHz (20CH)
LOCA L
Base unt : fLOCAL = fRX - 21.7MHz = 892.7875MHz (20CH)
Handset : fLOCAL = fRX + 21.7MHz = 981.1875MHz (20CH)
TX VCO
Base unt : fTX 2 = 479.74375MHz (20CH)
Handset : fTX 2 = 457.24375MHz (20CH)
cf. Base un t : fRX = 914.4875MHz / fTX = 959.4875MHz (20CH)
Handset : fRX = 959.4875MHz / fTX = 914.4875MHz (20CH)
[ CT1+ ]
RX VCO
Base un t : fVCO = (fRX - 21.7MHz) / 2 = 432.14375MHz (40CH)
Handset : fVCO = (fRX + 21.7MHz) / 2 = 476.34375MHz (40CH)
LOCAL
Base un t : fLOCAL = fRX - 21.7MHz = 864.2875MHz (40CH)
Handset : fLOCAL = fRX + 21.7MHz = 952.6875MHz (40CH)
TX VCO
Base unt : fTX 2 = 465.49375MHz (40CH)
Handset : fTX 2 = 442.99375MHz (40CH)
cf. Base un t : fRX = 885.9875MHz / fTX = 930.9875MHz (40CH)
Handset : fRX = 930.9875MHz / fTX = 885.9875MHz (40CH)

1. RX VCO circuit
RX VCO c rcu t s conf gured by Q305, Q306, D302 (var cap d ode), L301 (a r co l), and
some add t onal pass ve parts.
The control voltage from p n 14 (charge pump out) of the U302 (PLL IC) s suppl ed to
the D302 cathode through pass ve loop f lter (C336, C337, C338, R329, R330, R331)
to control the osc llat on frequency.
L301 s used to adjust the osc llat on frequency band.
The osc llat on frequency of 450MHz band s gnal goes to p n 16 of U302 v a C345.
The osc llator output s doubled by Q305 (doubler) and fed nto Q303 (RX m xer).
2. TX VCO circuit
TX VCO c rcu t s conf gured by Q307, D303, L302 and some add t onal pass ve parts.
The control voltage from p n 3 (charge pump out) of the U302 s suppl ed to the D303
cathode through pass ve loop f lter (C353, C354, C355, R338, R339, R340) to control
the osc llat on frequency.
The modulat ng s gnal (MOD_AUDIO) s suppl ed to D303 anode.
L302 s used to adjust the osc llat on frequency band.
The osc llat on frequency of 450MHz band s gnal goes to p n 1 of U302 v a C363.
The doubled frequency of the 450MHz s taken out from the Q308 (doubler) collector
s de and fed to the transm ss on sect on of the next stage composed of Q309 (dr ver
amp) and Q310 (power amp).
The Q307 of VCO and Q308, Q309 s powered through the Q9 by the command of
VCO_CON of the CPU (p n 34).
Q310 s powered through the Q8 by the command of AMP_CON of CPU (p n 35).
3. PLL (phas lock d loop) S ction
U302 s a dual PLL IC wh ch has two PLL c rcu ts each one for the transm tter and
rece ver sect ons.
Frequency s gnal of 450MHz band from the VCO s suppl ed to p ns 1 (TX) and p n 16
(RX), and t s d v ded down to 6.25KHz n accordance w th the frequency d v s on rat o
ass gned by CPU .
Reference frequency 6.25KHz s made by d v d ng X301 (21.2503MHz) n accordance
w th reference frequency d v s on rat o ass gned by CPU.
Voltage of the frequency error comes from p n 3(TX), 14(RX) of U302 as a DC s gnal.
These voltage are suppl ed to D303 of the transm tter VCO and D302 of the rece ver
VCO and the VCO frequenc es are locked to 6,25KHz reference frequency.
The p n 6,7 and 8 of U302 are the ser al data nputs for the frequency d v der dec d ng
the d v s on rat o.

Carr er frequency s adjusted correctly by CV301.
4. R c iv r RF s ction
Modulated RF carr er from the antenna s f ltered by F306 and ampl f ed by Q304.
Ampl f ed s gnal s f ltered aga n by F307.
RF carr er and RX local osc llator output from Q305 are m xed at Q303 (1st m xer),
then the s gnal s converted nto the 21.7MHz (1st IF frequency).
After hav ng been restr cted to ±7.5KHz bandw dth by F302 (x-tal f lter) and ampl f ed
by Q302 (IF ampl f er), the s gnal s fed to p n 16 of U301 (IF IC).
The second local osc llator s gnal s suppl ed to p n 1 of U301 from p n 9 of U302.
Here, rece ved s gnal s converted nto the 450KHz (2nd IF frequency) after passed
through 2nd m xer n U301.
It s detected and appears at p n 9 of U301 as a demodulated aud o s gnal.
And th s demodulated s gnal s adjusted to max mum output level and m n mum
d stort on by T301 (quardrature co l).
Demodulated aud o s gnal s f ltered by low pass f lter composed of R301 and C301.
5. Transmitt r RF s ction
The modulated output carr er from TX VCO s frequency doubled to TX frequency by
Q308, and ampl f ed by Q309 and Q310, and transm tted to the antenna. The power s
10mw max. at the antenna term nal. The F305 prov des f lter ng so that spur ous
s gnal from the transm ss on s de cannot be rad ated to the antenna.
6. Squ lch circuit
When the RF s gnal doesn't ex st, the no se of p n 9 on the U301 ncreases then 6KHz
band pass f lter composed of op amp n U101 ( p n10, p n11 ) and some pass ve parts
p cks up the no se and the Q312 ampl f es t . The rect f er c rcu t composed of D301,
R308 and C313 rect f es the no se to DC voltage. When the rect f ed output voltage s
over 0.7V, p n 13 of U301 becomes low then CPU (p n32) knows that rece ved RF
s gnal s very weak or there s no RF s gnal.
When the RF s gnal ex sts, the no se of p n 9 on the U301 reduces. So the rect f ed
output voltage goes below 0.7V, then p n 13 of U301 becomes h gh. CPU knows that
RF s gnal ex st.

C. Hands t
1. Pow r control circuit
3.6V DC power s suppl ed from the battery through JP2.
U4 has 3 regulated outputs (VREG0, 1, 2) controlled by BS0, BS1 and BS2
respect vely.
In rece v ng mode, the BS0 (p n 23 of U5) becomes low, then the rece ver part of RF
block s suppl ed w th the power of 3.2V from VREG0 (p n 15 of U4).
In transm tt ng mode, the BS1 (p n 24 of U5) becomes low, then the transm tter part of
RF block s suppl ed w th the power of the 3.2V from VREG1 (p n 1 of U4).
On the other hand PLL, MSK data f lter(U3A, U3B), EEPROM, key pad, charge
detector, CPU reset c rcu t, low battery detector c rcu t and CPU are suppl ed w th the
power of the 3.2V from VREG2 (p n 5 of U4).
VREG2 always comes out 3.2V output on power ON mode.
U1 (speak ampl f er) and Q310 (f nal ampl f er TR of transm tter RF block) are suppl ed
from battery d rectly for good eff c ency. (V_BATT)
2. Low batt ry d t ctor circuit
When the battery voltage drops below 3.2V, p n 10 of U4 (BATT_LOW) s dr ven to
h gh, so p n 57 of CPU s set to h gh, and then CPU (p n 17, 25) send warn ng tone
command to BZ1 (buzzer).
3. R c iving audio signal from bas unit
Rece ved RF s gnal from base un t s detected n the RF block and the demodulated
aud o s gnal (DEMOD_AUDIO) s f ltered by low pass f lter composed of U3C, C13,
C14, C15, R7, R8 and R9 through C16. Th s aud o s gnal s f ltered aga n by h gh pass
f lter composed of op amp n U2, C9, C10, C11, R3, R4 and R5 then expanded n U2.
The expanded s gnal com ng from p n 19 of U2 s fed nto a speaker ampl f er U1 v a
C6 and R2. The fully ampl f ed aud o s gnal s sent to the loud speaker (SP1).
When the user set the handset volume LOW, VOL_CONT from p n27 of CPU (U5) s
h gh level then Q2 s sw tched on. So C5 s connected to GND and the aud o s gnal
from U2 s attenuated about 6dB
4. S nding audio signal to bas unit
The aud o s gnal p cked up by the m crophone (MI1) s fed nto p n8 of U2 (compandor).
Th s s gnal s ampl f ed and compressed for no se reduct on then goes through 3rd
order low pass f lter composed of op amp n U2, C18, C19, C20, R12, R13 and R14.
Th s s gnal s sent to the modulat on nput (MOD_AUDIO) of the RF block through C17,
R11 and RV2, and transm tted to the base un t.

5. S nding and R c iving of data signal
The send ng MSK data comes out from TX_DATA of CPU (p n 49), and enters nto p n
4 of U2(compandor).
It s modulated at RF block through the same path as aud o s gnal.
The rece ved MSK data wh ch s demodulated at RF block w th the same manner as
aud o s gnal s go ng to the low path f lter composed of U3B, C32, C33, C34, R30, R31
and R32. F ltered s gnal s comparated at U3A. The square wave (RX_DATA) from Q3
s fed to p n 48 of CPU.
6. R s t
When power sw tch (SW1) s pushed, p n 9 of U4 (RESET) s set from h gh to low.
Th s s gnal s used for CPU reset.
7. Pow r ON/OFF circuit
In case of sett ng power ON, f SW1 (power sw tch) s pushed, Q6 s ON then BS2
(p n12 of U4) becomes low level and VREG2 g ves 3.2V power. The CPU s suppl ed
w th th s power of 3.2V(VREG2) and set BS2_CONT (p n 37 of CPU) to h gh level.
Then Q7 s sw tched ON, so BS2 rema ns low level even after SW1 s released.
In case of sett ng power OFF, f SW1 s pushed, p n 10 of CPU (PWR_OFF) becomes
h gh level and CPU makes BS0, BS1 and BS2_CON open state then all power s off.
In case that handset s put on charger cradle of base un t, automat cally power
becomes ON because Q5 s ON.
8. Buzz r circuit
When the r ng s gnal command comes from the base un t or the key pad s pushed, the
buzzer control s gnal comes from RING_ON of CPU (p n 17) and t makes Q12 ON and
OFF, then the buzzer (BZ1) makes r ng or beep sound.
If the RING_LEVEL (p n 25 of U5) s set on h gh, then R42 s connected to R41 n
parallel and the sound w ll be loud.
And f the buzzer H/L s set on low, then the sound w ll be low.
9. Charg and d t ct circuit
If handset s cradled at base un t, the charge current s suppl ed from base un t through
the JP2 (charge contact). Charg ng current flows to the battery through D1.
At that t me the Q4 w ll be on and the CHARGE of CPU (p n 22) become low, then the
CPU acknowledges the cond t on of charg ng.