SD Systems ExpandoRAM II User manual

SO #7140042
ExpandoRAM II
OPERATIO 5MANUAL
P.O. Box 28810, Dallas, Texas 75228

•
•
OPERATIONS
MANUAL
EXPANDORAM II
EXPANDABLE RANDOM ACCESS
MEMORY
COPYRIGHT ©1979
BY SO SYSTEMS
REVISION C
MARCH
1981

•
•
•
LllUTED WARRANTY
All SO Systems products assembled by SD personnel and functionally
tested at our facility are warranted for a period of ninety (90) days
fram date of purchase to be free fram defects of material and workman-
ship. Kits or other products functionally unfinished or semi-finished
at the time of shipment fram our facility are warranted for the same
period in regard to material defects only I with no warranty I expressed
or implied, covering v..DrJ<manship of others. Should an SD Systems pro-
duct fail to perfonn to specifications, obtain a Returned Material
Authorization number from your dealer or fran SO Systems. Include
this mlllmr in all correspondence and with the returned product. Ship
the it~ prepaid to SD Systems and it will, at our option, be repaired
or replaced free of charge, provided the unit is received during the
warranty period. Testing or repair v..Drk perfo:rr.leC1 upon returned kits
or other products assembled. wholly or partially by others will be sub-
ject to a $35.00 minimum service charge unless such products are found
to be non-functional due to defects in material purchased from SD
Systems.
In order to validate this warranty, the enclosed warranty card Itn.lst be
returned to SD Systems. If no warranty card is on file at the time of
product return, dated proof of purchase will be required.
This warranty is invalid if product has been misused or modified. ~7ar
ranty is limited to replacement of defective parts and no resronsibiIi ty
is assumed for damage to other equipment.
THERE ARE NO UNDERSTANDINGS, AGREEMENTS, REPRESENTA-
TIONS, OR WARRANTIES, EXPRESSED
OR IMPLIED, INCLUDING ANY
R,EGARDING FITNESS FOR A
PARTICUL~R PURPOSE, NOT SPECIFIED
IN THE WARRANTY.
.."
·-.:~;t:
,{.~:
.·1 ......
.- ,.lo,'
., .~.
-'.:;'.:
. .. ;
. :. ~·~r.~

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TABLE OF CONTENTS
SECTION
DESCRIPTION PAGE
1
INTRODUCTION
1
1-1
GENERAL DESCRIPTION
1
1-2
PHYSICAL 2
?
FUNCTIONAL DESCRIPTION 4
~
3
CONSTRUCTION 6
3-1
ASSEMBLY PROCEDURE 6
3-2
CHECK OUT PROCEDURE
7,
8,
9, 10
4
UTI LI ZA TI ON 11
4-1
16K OR 64K DEVICE SELECTION
JUMPERS
11
4-2 P ROt~ INFO Rr~A TI ON 11
4-3 SWITCH SETTINGS
11,
12
4-4
USING THE EXPANDORAM II
IN NON-
SD SYSTEt~S ENVIRONf'lENTS
12,
13
APPENDICES
A
MEMORY DIAGNOSTIC SOFTWARE LISTING
B
EXPANDORAM II TIMING DIAGRAM
C
EXPANDORM1 II ASSEf'lBLY DRAWING
D EXPANDORAM II SCHEMATIC
,E
EXPANDORAM II PARTS LIST

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SECTION I
1-0 INTRODUCTION
The EXPANDORAM II board provides a low cost means for expanding
Random Access Memory capability for computers utilizing the S-lOO
bus structure.
The EXPANDORAM IllS optimized for operation with SD Systems'
SHC-lOO /200. The EXPANDOR..AM II uses the Z- 80 refresh signal and
Kill operate at 4 MHZ if sufficiently fast rams are used.
1-1 GENERAL DESCRIPTION
The
EXPANDORAM II board is a high performance dynamic RAM board
llsing state-of-the-art MOS dynamic memory devices. The EXPANDORAM
II may be configured to have amemory capacity of 16K, 32K, 48K,
or 64K bytes of memory using the MK 4116 (16,384Xl MOS dynamic
RAM) or 64K, l28K, 192K, or 256K bytes of memory using the ~lK4l64
l65,536Xl MOS dynamic RAM) memories. Other notable features of
the EXPANDORAM II board include:
(1) Phantom output disable or manual switch selectable
output disable.
(2) Typical power dissipation of 5 watts
(3) 4 MHZ operat ion
(4) Port Addressable board select for multi-user system
(5) With 4164'50, 4-64K banks are available
PAGE 1

1-2 PHYSICAL
The EXPANDORAM II board is implemented on a single 5.25" x 10.0"
x 0.65" Printed Circuit board. The board requires three DC voltages
at levels of +7V to +lOV, +14V to +18V, and -14V to -18V. The
EXPANDORAM II board is interfaced to the system by connector J-l.
Table 1-1 lists the overall specifications for the EXPANDO~~M II
board.
TABLE 1-1
SPECIFICATIONS
•
Memory Capacity
Memory Access
Memory Cycle
Interface Levels
Power (2 us memory cycle)
Physical Dimensions
Operating Temperature
Up to 65,536 bytes (16K RAM)
Up to 262,144 bytes (64K RAM)
200 ns max.
375
ns min.
TTL Compatible
+7V to +lOV @ 400mA (max)
+14V
to +2-V @ 200mA (max)
-14V to -20V @ 30mA (max)
5.25" x 10.0" x .65"
o degree C to 50 degree C
PAGE 2•

•
PIN #
1, 51
Z
52
25
27
79,80,81,
~ 1 ,30,20,
R 2, S3
84,34,37,
.'-;7,3'-),8:),
i\CJ,:52
7, () ,:; 5 , 0R,
89,:58,39,
40,90
~)5,94,41,
~
.. 2. ,91,92,
5,43
4
47
66
68
72
.- 8
100,50
45
67
•
SIGNAL NAME
+8V to 10V
+14V
to 20V
-14V to -20V
01
P WAIT
AO-A7
A8-A15
DO-O to DO-7
DI-O to DI-7
SMI
MH1R
RFSH
MEMW
PRDY
PDBIN
GROUND
SOUT
POC
PHANTOM
TABU: 1-2
CONNECTOR .11 PIN OUT
FOR 32K/64K EXPANDORAM II
DIRECTION
Input
Input
Input
Input
Input
Output
Input
Input
Input
Input
Output
Input
Input
Input
Input
PACE 3
DESCRIPTION
Power
Power
Power
Phase 1 clock
Wait
Address bus bits 0-
7
Address bus bits 8-15
Data bus in
Data bus out
Machine cycle one
Memory read
Refresh (Z80 CPU card)
Memory write
Ready
Data bus in
Port Output
Power on Clear
Phantom Disable

(See Section 4 for more details on Prons).
SECTION 2
2-0 FUNCTIONAL DESCRIPTION
The
major functions of the EXPfu~DORAM II board are shown in figure
2-1. The following functions make up the memory interface: memory
array, memory decode and control, address multiplexer, and data
buffer.
Memory Array -The memory array consists of up to 32 (16K or 64K)
dynamic random access memory elements. Each 16K has a 16,384 x 1
bit capacity, while the 64K has a 65,536 x 1 bit capacity. The
32 o..6K or 64K) RAMS are organized into four banks of eight RAMS
each. The eight RAMS each contribute one bit to an addressable
location. The total storage capacity of the EXPANDORAM II is
64,536 or 262,144 bytes, depending on the type of memory device
used (16K or 64K).
Memory Decode and Control -The memory decode and control section
is responsible for generating the timing signals for the memory
array, address multiplexer, and data buffer. Timing within the
memory decode and control section is generated by a TTL compatible
delay line. An 82Sl30 PROM is used to select the proper banks
according to the address lines, board select switches, and the
board select latch.
PAGE 4
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•
Address Multiplexer -The address multiplexer is responsibile for
taking the address bits from the address bus buffers and multi-
plexing the proper row and column address into the memory array
under control of the memory decode and control section.
Data Buffers -The data buffers, controlled by the memory decode
and control section, isolate the memory array from the data bus.
Port FF Board Select -The port FF board select decodes port FF
and latches the output data on the board.
MEMORY
ARRAY
A 8- A 15
001-007 RA"5CASWtm
AO-A7
DI 0-01 7
8888
I1
PAGE PORT
I--
COMPARE
SELECT
ADDRESS
(PAGE)
SWITCH
DECODE
I--
T
~
UPPER
CONTROL &
COUNTER
PAGE
ADDRESS
I--
BUFFER ADDRESS
BUFFER
SELECT
MUlTIPLEX
t--
PORT
Lrl 1IiI
L-..
J.
1 I
.L
DATA
CONTROL REFRESH
LOWER
DATA IN
OUT
BUFFER
COUNTER
ADDRESS BUFFER
BUFFER BUFFER
88888
EXPANDORA~ II BLOCK DIAGRAM
•
Figure 2-1
PAGE 5

:-;ECTION 3
~-n CONSTRUCTION
The EXPANDORA~1 II hoard kit is intended for those persons who have
had some prior experience with kit huilding and digital electronics.
If you do not fall into this category, it is highly recommended
that you find an experienced person to help you assemble and
check out the board.
Appendix Eshows the parts list for the EXPANDORAM II board. Double
check all parts against the parts list.
3-1 ASSEMBLY PROCEDURE
(1) Install and solder the IC sockets in their proper locations
as follows:
( ) l4-Pin - Ul,U3-U7,U9,UlO,U12,U17-UI9,U2l,U22,US8
( ) l6-Pin - U8,Ull,U13,UlS,U16,U26-US7
( ) 20-Pin -U14,U20,U23-U25
NOTE: No sockets for U2 or DIP switch S3.
(2) Install and solder the resistors as follows:
()
Rl,
R4
33 Ohm (Orange, Orange, Black)
()R2, R6,
R8
lK Ohm
(Brown,
Black, Red)
()
R3
3.3K Ohm
(Orange, Orange, Red)
() R5
ISO Ohm
(Brown, Green, Brown)
()
R7 10K
Ohm
(Brown, Black, Orange)
()
R9
470
Ohm (Yellow,
Violet, Brown)
() RIO 200
Ohm (Red,
Black,
Brown)
()
Resistor packs: RPI
3, 4, 510 Pin
SIP
-
3.3K
RP2
6
Pin SIP
-
3.3K
NOTE:
Pin
1 of each
SIP
is designated hy a notch or a dot on one
end of the package.
PAGE 6
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•
(3) Install and solder diodes CRl, and CR2 with the banded end
as sho~n on the PC board.
() CRI lN75l
() CR2 lN9l4 or lN4l48
(4) Install and solder the capacitors as follows:
() Cl,C5,C8,C12,C14,C16 10MF Tantalum (Note Polarity)
() C2,C4,C6,C7,C9,ClO,C13,C17-64 .IMF MICA
() C15,C3 200PF MICA
(5) Install and solder the two voltage regulators with the heatsink,
using the 6-32 hardware supplies. NOTE: There are two types
of voltage regulators, a +5V and a+12V. Be sure that the
regulators are installed as shown on the Assembly Drawing.
() VRI +5V 7805 or LM 340T-5
() VR2 +12V 7812 or LM 340T-12
(6) Install two PCB ejectors using pins (See Assembly Drawing).
(7) Install and solder DIP switch.
() 53 Observe the proper position of the PC board (the
O~ side should he toward the top of the hoard).
(Sj Install and solder the delay line (U2) ohserving the location
of pin I
() U2 (DDU-4-5250 or PE2l2l4 or TTLDL250)
(9) Double check all solder connections for cold solder joints,
unsoldered connections, or shorted connections.
3-2 CHECK OUT PROCEDURE
(1) Install the hoard in the computer and measure the output of the
• PAGE 7

+5V ;l n\1+12V r l' gu1a tor.;. VR1 :J n Li Vr2•
() VRI =5 volts
() VR2 = 12 volts
(2) Measure the power supply voltages in the memory array. (Any
of the memory array IC sockets can be used.)
()
Pin
1
U29
=
-SV
()
Pin 8 U29
=
+12V
()
Pin 9 U29
::
+SV
•
NOTr: DO NOT PROCEED WITH BOARD CHECK-OUT UNTIL ALL POWER SUPPLY
VOLTAGES ARE CORRECT. The TTL logic and MOS memories can be permanently
damaged if improper voltages are applied.
(3)
Install the IC's
in
their sockets
observing the Pin 1 designation
on each socket on the PC board.
e
()Ul 74LS00 ( ) Ul4 74LS244
() U3
74 LS 10 ( ) UIS
33 Ohm DIP
()
U4
74LS20 ( ) Ul6
74LSl62
()
US
74LS00 ( ) Ul7
74LS0~
( )
U6 74LS74 ( ) Ul8 74LSl4
( ) lJ7
74LS02 ( ) 019 74LS30
( ) U8
82S130 ( )
U20
74LS373
( )
U9
74LS393 ( ) U2}
74LS74
() UIO
74LS00 ( ) U22 74 LSl4
( )
Ull 74LS368 ()
U23
74LS244
()Ul2 74LS14 ( )
U24
74LS244
( ) Ul3 74LS174 ()
U25 74LS244
()
U58
74LSl22
PAGE 8
--------------------_ ..

•* ( )
U26-33 (Bank 0) RAM
* ( )
U34-4l
lBank
1)
RA~'I
* ( ) U42-49
(Bank
2) RAl'-1
* ( ) U50-57
(Bank
3)
RAM
*NOTE: If less than 64K is being installed on the board then
refer to Section IV under ADDRESSING SWITCH to determine in
which Bank the memory should be installed.
(4) Double check all IC's for proper ?rientation and location.
(5) Refer to UTILIZATION SECTION for proper configuration of
jwnper options, and connect jumper options as required.
(6) Install board into computer and turn on power.
(7) By using front panel or monitor program, deposit data into a
memory
location that falls within the boundaries of the EXPANDORAM II
board. Now examine the same location in which data was deposited.
If the proper data is not read back, power the system down and
double check the following:
(1) Check ADDRESSING DIP Switch and board Select Dip Switch
for the correct settings.
(2) Check jumper options.
(8) Reinstall the board and once again try to write and read data
from the EXPANDORAM II board by the use of a front panel or monitor
program.
If some of the data bits appear to be stuck, power down
4It the board and examine the memory array for bent pins, or a defective
PAGE 9

memory device. If the hoard does not respond in any way to write
or read data, then examine the TTL Ie's for bent pins or improper
insertions into the socket.
(9) If the read/write test is successful, verify that memory on the
EXPANDO~I II can he accessed in every bank of memory that is
installed on the board.
(10) If all banks can be written to and read back properly,
complete check-out of the board by loading the memory test that is
shown in Appendix A. Execute the test and verify that all locations
within the memory array are functional.
NOTE: When executing the memory diagnostic, it is recommended that
the memory board not be on an extender card. Use of an extender
card may introduce external noise into the board.
PAGE 10
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SECTION 4
4-0 UTILIZATION
This section will explain the various options for the EXPANDORAM II
memory card.
4-1 16K or 64K DEVICE SELECTION JUMPERS
Two types of RAMS may be used with the EXPANDORAM II. These are
the 16K RAM (4116) and the 64K (4164). The board comes in a
s
tan dar d con fig u rat ion t hat use s16K RAMS. In 0rder to use the
64K RAMS the following cuts and connections must be made:
A. Cut
etch
between El and E2
~v
E!-5
, ...•
!
-
k·
'~
B. Cut
etch
between E4
and
E5
C. Cut
etch
between
E6
and E8
D.
Connect
E2
to
E3
CO
rJN
".
Eo Connect
E6
to E7
4-2 PROM INFORMATION
There are two proms available for use with the EXPANDORAM II. These
proms perform memory decoding. These are for use with 32K or 48K
partition multi-user systems. If the board is used in a single-
user environment, either Prom will work. In addition, other Proms
may
be configured if the user desires.
4-3 SWITCH SETTINGS
The
information for the switch settings of S3 for the EXPANDORAM II
• is given in figure 4-1.
PAGE 11

Port FF is used to select the Memory page (32K or 48K) to he
accessed by the CPU. Up to 10 pages (0-9) may be in a system
•
simultaneously, by using either 6Expandoram II boards with a
32K Prom or 8Expandoram II board with a 48K Prom (user JAH
has 16K positioned at @C000H). The pages are accessed by outputting
the page number to port FF. See Figure 4-2 for page mapping
and Prom program information.
BANK ENABLE 0-3
(ON enables Bank)
PROM ENABLE (must be on)
D0
D1 BOARD SELECT-Board may be
designated 0-7 by setting
switches to octal address
(ON is ~, OFF is 1)
D2
~
1
2
3
I
~
1234567
~I
ON
D0nD00c
I
~.
FIGURE 4-1
4-4 USING THE EXPANDORAM II IN NON-SD SYSTEMS ENVIRONMENTS
Some CPU boards supply a different phase of the system clock on
pIns 24 and 25. If one of these CPU boards are used with the
Expandoram II, make the following change. Cut the etch on the back
of the board between E22 and E23. Install a jumper between E23 and
E24. Also cut the etch between E26 and E25 and install a jumper
between E26 and E27. Install the phantom disable Jumper between
E9 and EIO if the system has other memory in conflict with the
Expandoram II board. In addition, if the system is operated at
•
PAGE 12

•
at 4 MHZ, install the jumper between El4 and ElS to enable Ml
Wait States.
PAGE 13

•
•
APPENDIX A
MEMORY DIAGNOSTIC SOFTWARE LISTING

t·.DDR OBJ8CT
ST J SOURCE STATEMENT
·
,
iTHIS IS ,\ rlODIFIBD l\DD~E.sS sri'O~GS TEST ~n'::'H
; II.~J n;CRErmn'rI1'X~ PATTER'1
·
,
i 256 PASSES nUST BE EXECUTED DEFORE TH8 ~m::()RY
; IS CmlPLETELY TESTED
i
;THE COUTENTS OF LOCI',7.IOHS '()OOC'H Z\~m'a01D'H
; SHOULD BE SELECTED ACCORDING TO THE FO['LorTI~lG
iMEMORY SIZE TESTED
THE
OF EP!~GE
'11)']]
'20'H
'40'H
, Sf) 'H
'CO' H
'FF'H
VALUE
; CI .. EAR B P.l\TRN r.tODIFIE~
THE: Pi\'I'TERrl fTILL BE STOTIED
AHD THE ADDRESS OF 'I'HE
BE STO~ED AT '002D'9
ABS
OOOOH
B,O
fIL ,START ; GET STlillTI!lG j\DOR
A, L ; LOH BYTE TO ACe]
H ;XOR \'lITH nIGH BYTE
B ;XOR WITH PATTERn
OIL) ,A ; STORE IN ADDR
HL ; I NCREr-1ENT ADDR
A,H ;L01\D HIGH BYTE OF ADDR
EPl\GE ; COHP1\RE ~'1ITH STOP ADDR
NZ,FILL ;NO~ DONE,GO .BACK
TEST Dl\TA
HL,START ;GET START ADDR
1'., L ; LO/.D T.JO~·7 BYTE
H iXOR WITH HIGH BYTE
B :XOR UITH MODIFIER
(I-1L) i COIIPj~.RE HITH HEHORY LOC
NZ,EXIT ;ERROR EXIT
HL ; UPDATE r·1E:IORY ADDR
A,H ;LOAD HIGH BYTE
EPAGE ;COHPARE WITH STOP ADDR
N7.,TEST ;LOOP BACK
B ;UPDATE MODIFIER
LOOP ;RST NITH MEN MODIFIER
PSECT
OnG
LD
UP r·1EHORY
LD
LD
XOR
XOR
LD
INC
LD
CP
JP
AHD CHECK
LD
LD
XOR
XOR
CP
JP
INC
LD
CP
JP
INC
JP
4K
8K
16K
32K
48K
64K
·
,
iTOP OF I1ErIORY TO
;BE TESTED
·
,
iIF AN ERROR OCCURS,
;AT LOCATI0N '002C'H
;ERROR LOCATION WILL
; 1\ND '() 02 E ' H•
·
,
; LOAD
LOOP:
FILL:
TEST;
;READ
Q(JfJl
OO()~
('l003
OCHJ4
n005
Or0G
0007
OOOB
oon9
0010
0011
0012
0013
0014
0015
0016
0017
00ln
0019
0020
on21 ;
0022 ;
0023 ;
0024 ;
0025 ;
0026 ;
0027 ;
0028 ; THE PROGRAl1 IS SET UP TO START TESTING l\T
0029 ;LOCATION '002F'H. THE STAR'L'ING ADDRESS FOR
0030 ;TEST CAN BE nODIFIED DY CH1\J1GING LOCATIONS
0031 ;'0003'H-'0004'll AND '0011'H-'0012'H.
0032 ;
0033 ;
TEST TIME FOR A 16K BY 8 HEl10RY IS APPROX. t1 rUN
0034 ;
0035 ;
0036 ;
0037
0038
0039
('} 0 [1, a
0()~1
OO·~2
0043
0044
0045
0046
0047
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
01)00
212FOO
79
AC
A8
77
23
7C
FEI0
C20500
212FOO
7D
2\.C
Z\B
13E
C225000
23
7C
FE10
C21300
04
C30200
0002
0005
0006
0007
0008
GOn9
OOOl~
OOOB
oaOD
>0000
nooo
0010
0013
0014
D015
0016
0017
•OOlA
00lE
001C
OOIE
0021
''11'1''')
J -,." :.... ~J
•

0061 ;SPR0R
EXIT
J025
222DOO
0062 EXIT
LD
(BYTE) ,HL ;
Sl\.VE ERROR
i\DDRSSS
OO?,D
32:>con
noro:: Ln
O? b\ 'r.Rm , A. ; SllVE
BAn
P1\T'1~KRN
002!3 76
0064
HALT ;FI,AG
OPERATOR
>OO2C
0065
PATRN: D3PS 1•
>002D
0066 BYTE:
DEFS
2
002F
2POO
0067 ST.\RT:
DEFN
$
0031
3100
0068
DEFt'1
$;
PL1\CE
FOR FIRST
AnDR
>0010
0069 EPAGE:
EQU
Ion
;SET UP
FOR
41<
TEST
0070
END