WiseChip UG-6028GDEBF02 User manual

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UG-6028GDEBF02
Evaluation KitUserGuide

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Contents
1.REVISIONHISTORY ...3
2.EVKSchematic ..4
3. Symboldefine 5
4.TIMMINGCHARACTERISTICS ... ...6
4.180-Series MPUparallelInterface ..6
4.26800-Series MPUparallelInterface .7
4.3SPIInterface ..8
5. EVKuse introduction .. ...9
6. Power downand Powerup Sequence ..11
7. How touse SEPS525F module ...12
7.1InitialStepFlow ...12
7.2RD recommend InitialCodefor80 Interface 13
7.2.1SubFunction for80 Interface .15

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1.REVISIONHISTORY
DatePage ContentsVersion
2006/08/15 *Preliminary Preliminary 0.0

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2. EVKSchematic
Note:The schematicisalreadyremoveR3 and D1.VSDH connect toGND.

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3. Symboldefine
D17-D9：Thesepinsare9-bit bi-directionaldatabustobe connected tothe MCU sdatabus.
TheD10~D17 are forcommand anddatainputs(8bitparallelinterface).
CSB：ThesepinsareCSB pinsformasterand slavedriverIC.Thispinisthe chip
select input.The chipisenabled forMCUcommunication onlywhen CSB ispulled low.
CPU: Selectsthe CPUtype.Low:80-seriesCPU, High:68-SeriesCPU.
PS : Selectsparallel/Serialinterfacetype. Low: serial,High:parallel.
RDB：Foran 80-systembusinterface,read strobe signal(activelow).For
Foran 68-systembusinterface,busenablestrobe(activehigh).
Whenusing SPI,fixit toVDD orVSSlevel.
WRB：Foran 80-systembusinterface, writestrobe signal(activelow).
Foran 68-systembusinterface, read/writeselect.
Low:Write, High:Read.When using SPI,fixittoVDDorVSSlevel.
RESB：Reset SEPS525F(activelow).
HV：ExternalColumnDrivingPowerSupply.
LV：Logicpowersupply.
GND：Powersupplyground.
Note1:Please groundingfornouse datapin.
Note2:IfyouarenotusedRGBInterface ,please groundingVSYNC,
HSYNC, Enable,DOTCLKandfloatingVSYNCO.
Note3:IfyouarenotusedVDDIO ,please connecttoLV(VDD).

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4.TIMMINGCHARACTERISTICS
4.180-Series MPUparallel Interface
Figure 180-SeriesMPU8-bitparallelInterface TimingDiagram
Table180-Series MPU8-bitparallel Interface Timing Characteristics

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4.26800-Series MPUparallelInterface
Figure 268-SeriesMPU8-bitparallelInterface TimingDiagram
Table268-Series MPU8-bitparallel Interface Timing Characteristics

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4.3SPIInterface
Figure 3Serialperipheralinterface Timing Diagram
Table3Serialperipheral interface TimingCharacteristics

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5. EVKuse introduction
Figure 4EVKPCBandOLEDModule
Figure5 ThecombinationofthemoduleandEVK
Interface select
Pushheretolockmodule

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The SEPS525FisCOFtype package,thatthe connect padsareon the top ofthe module
connector.When finished assembled the moduleand EVK,then pushthe locking pad tolock
the module.See theFigure4and Figure5.
Usercan useleading wiretoconnect EVK withcustomer ssystem.The exampleshowsas
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Fig 6EVKwith testplatform
Note1 It isthe externalmost positivevoltage supply. Inthissampleisconnected topower
supply.
Note2 The leading wirehas14 pinstotallyinthiscase.
(D17-D9, RDB,RS,WRB,RESB,CSB)
Note3 If used RGBInterface,pleaseconnected toplatform.
Note1 Note2
Note3