WiseChip UG-6028GDEBF02 User manual

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UG-6028GDEBF02
Evaluation KitUserGuide

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Contents
1.REVISIONHISTORY ...3
2.EVKSchematic ..4
3. Symboldefine 5
4.TIMMINGCHARACTERISTICS ... ...6
4.180-Series MPUparallelInterface ..6
4.26800-Series MPUparallelInterface .7
4.3SPIInterface ..8
5. EVKuse introduction .. ...9
6. Power downand Powerup Sequence ..11
7. How touse SEPS525F module ...12
7.1InitialStepFlow ...12
7.2RD recommend InitialCodefor80 Interface 13
7.2.1SubFunction for80 Interface .15

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1.REVISIONHISTORY
DatePage ContentsVersion
2006/08/15 *Preliminary Preliminary 0.0

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2. EVKSchematic
Note:The schematicisalreadyremoveR3 and D1.VSDH connect toGND.

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3. Symboldefine
D17-D9：Thesepinsare9-bit bi-directionaldatabustobe connected tothe MCU sdatabus.
TheD10~D17 are forcommand anddatainputs(8bitparallelinterface).
CSB：ThesepinsareCSB pinsformasterand slavedriverIC.Thispinisthe chip
select input.The chipisenabled forMCUcommunication onlywhen CSB ispulled low.
CPU: Selectsthe CPUtype.Low:80-seriesCPU, High:68-SeriesCPU.
PS : Selectsparallel/Serialinterfacetype. Low: serial,High:parallel.
RDB：Foran 80-systembusinterface,read strobe signal(activelow).For
Foran 68-systembusinterface,busenablestrobe(activehigh).
Whenusing SPI,fixit toVDD orVSSlevel.
WRB：Foran 80-systembusinterface, writestrobe signal(activelow).
Foran 68-systembusinterface, read/writeselect.
Low:Write, High:Read.When using SPI,fixittoVDDorVSSlevel.
RESB：Reset SEPS525F(activelow).
HV：ExternalColumnDrivingPowerSupply.
LV：Logicpowersupply.
GND：Powersupplyground.
Note1:Please groundingfornouse datapin.
Note2:IfyouarenotusedRGBInterface ,please groundingVSYNC,
HSYNC, Enable,DOTCLKandfloatingVSYNCO.
Note3:IfyouarenotusedVDDIO ,please connecttoLV(VDD).

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4.TIMMINGCHARACTERISTICS
4.180-Series MPUparallel Interface
Figure 180-SeriesMPU8-bitparallelInterface TimingDiagram
Table180-Series MPU8-bitparallel Interface Timing Characteristics

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4.26800-Series MPUparallelInterface
Figure 268-SeriesMPU8-bitparallelInterface TimingDiagram
Table268-Series MPU8-bitparallel Interface Timing Characteristics

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4.3SPIInterface
Figure 3Serialperipheralinterface Timing Diagram
Table3Serialperipheral interface TimingCharacteristics

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5. EVKuse introduction
Figure 4EVKPCBandOLEDModule
Figure5 ThecombinationofthemoduleandEVK
Interface select
Pushheretolockmodule

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The SEPS525FisCOFtype package,thatthe connect padsareon the top ofthe module
connector.When finished assembled the moduleand EVK,then pushthe locking pad tolock
the module.See theFigure4and Figure5.
Usercan useleading wiretoconnect EVK withcustomer ssystem.The exampleshowsas
Figure6
Fig 6EVKwith testplatform
Note1 It isthe externalmost positivevoltage supply. Inthissampleisconnected topower
supply.
Note2 The leading wirehas14 pinstotallyinthiscase.
(D17-D9, RDB,RS,WRB,RESB,CSB)
Note3 If used RGBInterface,pleaseconnected toplatform.
Note1 Note2
Note3

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6. Power downand Powerup Sequence
ToprotectOLEDpanelandextendthepanellifetime,thedriverICpower
up/downroutineshouldincludeadelayperiodbetweenhighvoltageandlowvoltage
powersourcesduringturnon/off.Suchthatpanelhasenoughtimetochargeup or
dischargebefore/afteroperation.
Powerup Sequence:
1.Powerup VDD
2.SendDisplayoffcommand
3.DriverICInitialSetting
4.ClearScreen
5.Powerup VDDH
6.Delay100ms
(whenVDD isstable)
7.SendDisplayoncommand
PowerdownSequence:
1.SendDisplayoffcommand
2.PowerdownVDDH
3.Delay100ms
(whenVDDH isreach0and
paneliscompletely
discharges)
4.PowerdownVDD
D
Di is sp pl la ay y o on n
VDD
V
VD
DD D
o on n
V
VC
CC C
o on n
V
SS
/Ground
VCC
V
VD
DD D
o of ff f
VDD
D
Di is sp pl la ay y o of ff f
V
VC
CC C
o of ff f
V
SS
/Ground
VCC

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Suggestall register
setagain
7. How touse SEPS525F module
7.1Initial StepFlow
DriverICInitialCode
ResetDriverIC
Displayon
VDD ON
VDDH ON
(Wait1ms)
(Wait1ms)
ClearRAM
StartDispaly
(Wait1ms)

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7.2RD recommend InitialCodefor80 Interface
//Reg:04h Action:Normal currentand PS ON/Internal oscpoweroff
Write_Command(rREDUCE_CURRENT,0x03);
T0_05sec();
//Reg:04h Action:Normal currentand PS OFF
Write_Command(rREDUCE_CURRENT,0x00);
T0_05sec();
//Reg:3BhAction:Screen SaverOFF
Write_Command(rSCREEN_SAVER_CONTEROL,0x00);
//Reg:02h Action:Export1internalclock/OSCwithexternalresister/Internal OSCON
Write_Command(rOSC_CTL,0x01);
//Reg:03h Action:FR=120HzDIV=1
Write_Command(rCLOCK_DIV,0x90);
//Reg:80h Action:PDACOFF,DDACOFF/ReferenceVolt.controlwithexternal resister
Write_Command(rIREF,0x00);
//Reg:08h Action:set colorRprecharge time
Write_Command(rPRECHARGE_TIME_R,0x03);
//Reg:09h Action:set colorGprecharge time
Write_Command(rPRECHARGE_TIME_G,0x05);
//Reg:0AhAction:set colorBprecharge tiem
Write_Command(rPRECHARGE_TIME_B,0x05);
//Reg:0BhAction:set colorRprecharge current
Write_Command(rPRECHARGE_Current_R,0x0a);
//Reg:0Ch Action:set colorGprecharge current
Write_Command(rPRECHARGE_Current_G,0x0a);
//Reg:0Dh Action:set colorBprecharge current
Write_Command(rPRECHARGE_Current_B,0x0a);
//Reg:10h Action:set colorRdot driving current
Write_Command(rDRIVING_CURRENT_R,0x56);
//Reg:11h Action:set colorGdot driving current
Write_Command(rDRIVING_CURRENT_G,0x4D);
//Reg:12h Action:set colorBdotdriving current
Write_Command(rDRIVING_CURRENT_B,0x46);
//Reg:13h Action:Col D0 toD159/colnormaldisplay
Write_Command(rDISPLAY_MODE_SET,0x00);
//Reg:14h Action:MPUmode
Write_Command(rRGB_IF,0x31);

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//Reg:16h Action: 6btistripletransfer,262Ksupport
Write_Command(rMEMORY_WRITE_MODE,0x76);
//Reg:17h Action:Memoryaddr.Xstart
Write_Command(rMX1_ADDR,0x00);
//Reg:18h Action:Memoryaddr.Xend
Write_Command(rMX2_ADDR,0x9f);
//Reg:18h Action:Memoryaddr.Ystart
Write_Command(rMY1_ADDR,0x00);
//Reg:1AhAction:Memoryaddr.Yend
Write_Command(rMY2_ADDR,0x7f);
//Reg:20h Action:MemoryXstart addr.
Write_Command(rMEMORY_ACCESS_POINTER_X,0x00);
//Reg:21h Action:Memory Ystart addr.
Write_Command(rMEMORY_ACCESS_POINTER_Y,0x00);
//Reg:28h Action:Displaydutyratio
Write_Command(rDUTY,0x7f);
//Reg:29h Action:Displaystart line
Write_Command(rDSL,0x00);
//Reg:2EhAction:DisplayFirst screen Xstart point
Write_Command(rD1_DDRAM_FAC,0x00);
//Reg:2FhAction:DisplayFirst screen Ystart point
Write_Command(rD1_DDRAM_FAR,0x00);
//Reg:31h Action:DisplaySecond screen Xstart point
Write_Command(rD2_DDRAM_SAR,0x00);
//Reg:32h Action:DisplaySecond screen Ystart point
Write_Command(rD2_DDRAM_SAR,0x00);
//Reg:33h Action:DisplaysizeXstart
Write_Command(rSCR1_FX1,0x00);
//Reg:34h Action:DisplaysizeXend
Write_Command(rSCR1_FX2,0x9f);
//Reg:35h Action:DisplaysizeYstart
Write_Command(rSCR1_FY1,0x00);
//Reg:36h Action:DisplaysizeYend
Write_Command(rSCR1_FY2,0x7f);
//Reg:06h Action:Scan signal ishigh levelat precharge period/DispalyON
Write_Command(rDISP_ON_OFF,0x01);
//ClearDDRAM
Clear_DDRAM( );

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7.2.1SubFunction for80 Interface
voidWrite_Register(unsigned chardata)
{
IOCLR =0x0000000ff;//resetD0~D7
IOCLR=bRS;
IOCLR=nCS;
IOCLR=nWR;
IOSET=data;
IOSET=nWR;
IOSET=nCS;
IOSET=bRS;
}
voidWrite_Parameter(unsigned chardata)
{
IOCLR =0x0000000ff;//resetD0~D7
IOSET=bRS;
IOCLR=nCS;
IOCLR=nWR;
IOSET=data;
IOSET=nWR;
IOSET=nCS;
}
voidWrite_Command(unsigned charReg, unsigned chardata
{
Write_Register(Reg);
Write_Parameter(data);
})
voidWrite_6BitDDRAM(unsigned chardata)
{
IOCLR =0x0000000ff;//resetD0~D7
IOSET=bRS;
IOCLR=nCS;
IOCLR=nWR;
IOSET=data<<2;//Send R5~R0 (G5~G0orB5~B0)toD17~D12
IOSET=nWR;
IOSET=nCS;
}
voidfill_block(unsigned charR,unsigned charG,unsigned charB)
{
unsigned chari,j;
Write_Register(rDDRAM_DATA_ACCESS_PORT);
for(i=0;i<128;i++)
{
for(j=0;j<160;j++)
{
Write_6BitDDRAM(R);
Write_6BitDDRAM(G);
Write_6BitDDRAM(B);
}
}
}

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voidColorR(void)
{
fill_block(0x3f,0x00,0x00);
}
voidColorG(void)
{
fill_block(0x00,0x3f,0x00);
}
voidColorB(void)
{
fill_block(0x00,0x00,0x3f);
}
voidColorW(void)
{
fill_block(0x3f,0x3f,0x3f);
}
voidClear_DDRAM(void)
{
fill_block(0x00,0x00,0x00);
}
RD recommendInitial CodeandSubFunction
Note：1.For80 series CPUinterface.
2.For6bitsDDRAMtransfer.