ABA VMICPCI-7055 Quick user guide

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Hardware Reference Manual
VMICPCI-7055*/CPCI-7055RC*
PowerPC®-Based CompactPCI®Single
Board Computer
THE CPCI-7055RC IS DESIGNED TO MEET THE EUROPEAN UNION (EU)
RESTRICTIONS OF HAZARDOUS SUBSTANCE (RoHS) DIRECTIVE (2015/863)
CURRENT REVISION.
Publication No. 500-657055-000 Rev.G

Document History
Waste Electrical and Electronic Equipment (WEEE) Returns
Revision Date Description
F.0 July 2011
G January 2018 Rebrand to Abaco Systems format
Abaco Systems is registered with an approved Producer Compliance Scheme (PCS) and, subject
to suitable contractual arrangements being in place, will ensure WEEE is processed in accordance
with the requirements of the WEEE Directive.
Abaco Systems will evaluate requests to take back products purchased by our customers before
August 13, 2005 on a case-by-case basis. A WEEE management fee may apply.

Publication No. 500-657055-000 Rev. G About This Manual 3
About This Manual
Conventions
Notices
This manual may use the following types of notice:
WARNING
Warnings alert you to the risk of severe personal injury.
CAUTION
Cautions alert you to system danger or loss of data.
NOTE
Notes call attention to important features or instructions.
TIP
Tips give guidance on procedures that may be tackled in a number of ways.
LINK
Links take you to other documents or websites.
Numbers
All numbers are expressed in decimal, except addresses and memory or register
data, which are expressed in hexadecimal. Where confusion may occur, decimal
numbers have a “D” subscript and binary numbers have a “b” subscript. The
prefix “0x” shows a hexadecimal number, following the ‘C’ programming
language convention. Thus:
One dozen = 12D= 0x0C = 1100b
The multipliers “k”, “M” and “G” have their conventional scientific and
engineering meanings of x103, x106and x109, respectively, and can be used to
define a transfer rate. The only exception to this is in the description of the size of
memory areas, when “K”, “M” and “G” mean x210, x220 and x230 respectively.
In PowerPC terminology, multiple bit fields are numbered from 0 to n where 0 is
the MSB and n is the LSB. PCI terminology follows the more familiar convention
that bit 0 is the LSB and n is the MSB.
Text
Signal names ending with a tilde (“~”) denote active low signals; all other signals
are active high. “N” and “P” denote the low and high components of a differential
signal respectively.

4 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
Further Information
Abaco Website
You can find information regarding Abaco products on the following website:
LINK
https://www.abaco.com
Abaco Documents
This document is distributed via the Abaco website. You may register for access to
manuals via the website.
LINK
https://www.abaco.com/download/cpci-7055cpci-7055rc-hardware-reference-manual
Third-party Documents
ANSI/VITA Standards
LINK
http://www.vita.com
NOTE
Technical literature describing components used on the CPCI-7055RC is available from the
manufacturers’ websites.

Publication No. 500-657055-000 Rev. G About This Manual 5
Technical Support Contact Information
You can find technical assistance contact details on the website Support
page.
LINK
https://www.abaco.com/support
Abaco will log your query in the Technical Support database and allocate it a
unique Case number for use in any future correspondence.
Alternatively, you may also contact Abaco’s Technical Support via:
LINK
[email protected]
Returns
If you need to return a product, there is a Return Materials Authorization
(RMA) form available via the website Support page.
LINK
https://www.abaco.com/support
Do not return products without first contacting the Abaco Repairs facility.

6 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
Compliance Information
This chapter provides the applicable information regarding regulatory
compliance for the VMICPCI-7055/CPCI-7055RC.
Abaco’s VMICPCI-7055/CPCI-7055RC has been evaluated to and has met the
requirements for compliance to the following standards:
International Compliance
• EN55022:1998/CISPR 22:1997
• IEC61000-4-2
• IEC61000-4-3
• IEC61000-4-4
• IEC61000-4-5
• IEC61000-4-6
European Union (CE Mark)
• BS EN55024 (1998 w A1:01 & A2: 03)
• BS EN55022 (Class A)
United States
• FCC Part 15, Subpart B, Section 109, Class A
Australia/New Zealand
• AS/NZS CISPR 22 (2002) Class A
Canada
• ICES-003 Class A
FCC Part 15
This device complies with Part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) this device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that
may cause undesired operation.
FCC Class A
NOTE
This equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against
harmful interference when the equipment is operated in a commercial environment. This equipment
generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with
the instruction manual, may cause harmful interference to radio communications. Operation of this
equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.
CAUTION
Changes or modifications not expressly approved by the party responsible for compliance could void

Publication No. 500-657055-000 Rev. G Compliance Information 7
the user’s authority to operate the equipment.
Canadian Regulations
The VMICPCI-7055/CPCI-7055RC Class A digital apparatus complies with
Canadian ICES-003.
NOTE
Any equipment tested and found compliant with FCC Part 15 for unintentional radiators or EN55022
(previously CISPR 22) satisfy ICES-003.

8 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
Table of Contents
About This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Further Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Technical Support Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Returns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Compliance Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
FCC Part 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Canadian Regulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PowerPC RISC Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Marvell Discovery III (MV64460) Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1 • Handling and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.1 Unpacking Procedures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.2 Handling Precaution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.3 Hardware Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.4 COP/ICE/Emulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.5 Switch S1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
1.6 Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.7 Installing PMCs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.7.1 PMC Site (VIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.8 Front/Rear Panel Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
1.9 LED Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.10 RS232 Serial Port (COM0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
1.11 Using the Serial Port (Debug). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2 • Standard Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.1 CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2 Physical Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.3 PCI Device Interrupt Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.4 Integrated Peripherals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.5 Ethernet Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.5.1 10BaseT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.5.2 100BaseTX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.5.3 1000BaseT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3 • Embedded PC/RTOS Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1 CompactPCI Bus Bridge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.1 PCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.2 Buffer Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.3 Blade Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.2 PICMG 2.16 Ethernet. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.3 PICMG 2.9 Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
A • Connectors and Pinouts 39
A.1 J1 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
A.2 J2 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
A.3 J3 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
A.4 J5 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

Publication No. 500-657055-000 Rev. G Table of Contents 9
A.5 Ethernet Connector LAN0 (J28) and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
A.6 Serial Connector COM0 (J29) and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
A.7 PMC Connectors and Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
A.7.1 PMC#1 (J11) and PMC#2 (J21) Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
A.7.2 PMC#1 (J12) and PMC#2 (J22) Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
A.8 PMC#1 (J13) and PMC#2 (J23) Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
A.9 PMC#1 (J13) and PMC#2 (J23) Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
A.10 PMC#1 (J14) Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
B • IPMI Firmware and OEM Extensions 51
B.1 Standard IPMI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
B.1.1 Get Device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
B.1.2 Cold Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
B.1.3 Warm Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
B.1.4 Get Self-Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
B.1.5 Set ACPI Power State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
B.1.6 Get ACPI Power State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
B.1.7 Get Device GUID command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
B.1.8 Broadcast Get Device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
B.1.9 Master-Write-Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
B.1.10 Set Event Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
B.1.11 Get Event Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
B.1.12 Get Sensor Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
B.1.13 FRU Inventory Area Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
B.1.14 Read FRU Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
B.1.15 Write FRU Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
B.1.16 Get SDR Repository Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
B.1.17 Reserve SDR Repository Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
B.1.18 Get SDR Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
B.2 FRU Data Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
B.3 Platform Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
B.4 Chassis Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
B.4.1 Get Geographical Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
B.5 BMC Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
B.5.1 IPMB Relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
B.5.2 Forwarding of Platform Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
B.5.3 Set Platform Event Forwarding Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

10 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
List of Tables
Table 1-1 Board Connectors, Headers, Switches and Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 1-2 CompactPCI Bridge Mode (User Configurable) - Jumper (E19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 1-3 CompactPCI Reset (User Configurable) - Jumper (E25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 1-4 CompactPCI Bus Switch S1 Configuration (Factory Default is “OFF” for All Positions) . . . . . . . . . . . . . 23
Table 1-5 RJ45 to Standard DB9 Adapter Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 2-1 PCI Device Interrupt Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table A-1 J1 Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table A-2 J2 Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table A-3 J3 Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table A-4 J5 Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table A-5 J28 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table A-6 J29 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table A-7 PMC#1 (J11) and PMC#2 (J21) Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table A-8 PMC#1 (J12) and PMC#2 (J22) Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table A-9 PMC#1 J13 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table A-10 PMC#1 J13 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table A-11 PMC#1 J14 Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table B-1 NetFn 0x06, Cmd 0x01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table B-2 NetFn 0x06, Cmd 0x02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table B-3 NetFn 0x06, Cmd 0x03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table B-4 NetFn 0x06, Cmd 0x04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table B-5 NetFn 0x06, Cmd 0x06 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table B-6 NetFn 0x06, Cmd 0x07 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table B-7 NetFn 0x06, Cmd 0x08 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table B-8 NetFn 0x06, Cmd 0x52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table B-9 NetFn 0x04, Cmd 0x00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table B-10 NetFn 0x04, Cmd 0x01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table B-11 NetFn 0x04, Cmd 0x2D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table B-12 NetFn 0x0A, Cmd 0x10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table B-13 NetFn 0x0A, Cmd 0x11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table B-14 NetFn 0x0A, Cmd 0x12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table B-15 NetFn 0x0A, Cmd 0x20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table B-16 NetFn 0x0A, Cmd 0x22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table B-17 NetFn 0x0A, Cmd 0x23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table B-18 NetFn 0x04, Cmd 0x02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table B-19 NetFn 0x30, Cmd 0x01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table B-20 NetFn 0x32, Cmd 0x00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table B-21 NetFn 0x32, Cmd 0x80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Publication No. 123456789 List of Figures 11
List of Figures
Figure 1 VMICPCI-7055/CPCI-7055RC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 1-1 VMICPCI-7055/CPCI-7055RC PMC Sites and Jumper Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 1-2 COP Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 1-3 Location of Switch S1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 1-4 Keypin Installation and Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 1-5 Installing a PMC on the VMICPCI-7055/CPCI-7055RC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 1-6 VMICPCI-7055/CPCI-7055RC PMC Backside Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 1-7 Front Panel LED Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 1-8 Serial Port Access Using Example: Desktop Windows-Based OS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Figure 1-9 Hyperterminal New Connection Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 1-10 COM Port Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 1-11 COM1 Properties Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 1-12 VMICPCI-7055/CPCI-7055RC Serial Port Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure A-1 Ethernet Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure A-2 Serial Connector and Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

12 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
Overview
Abaco Systems’s VMICPCI-7055*/CPCI-7055RC* are full featured IBM®
PowerPC®based, single board computers (SBCs) in a single-slot, passively
cooled, Eurocard form factor that utilizes the advanced technology of the next
generation Marvell®chipset. The VMICPCI-7055/CPCI-7055RC are compliant
with the CompactPCI®Specification PICMG®2.0, Rev. 3.0 and feature a universal
PCI-to-PCI bridge, allowing the board to function as a system controller or
peripheral SBC in multi-SBC systems.
The VMICPCI-7055/CPCI-7055RC provide features typically found on desktop
systems such as:
• Up to 1 GByte DDR 400 SDRAM with ECC
• Support for three Gigabit Ethernets (one front access and two optional
PICMG 2.16 compliant or standard Gigabit Ethernet (option dependent) via
the CompactPCI J3)
• Ultra DMA IDE drive support (secondary IDE, requires VMIACC-7055/
ACC-7055RC)
• Three serial ports (one RS232 (COM0) via front panel, two RS232/422/485
(COM1 and COM2) via CompactPCI J3)
•Real-Timeclock/calendar
• Front panel reset switch
The Marvell chipset allows the VMICPCI-7055/CPCI-7055RC to provide
enhanced features such as Ultra DMA IDE support. The standard desktop
features of the VMICPCI-7055/CPCI-7055RC are described in Chapter 2 Standard
Features of this manual.
The VMICPCI-7055/CPCI-7055RC provide features useful to embedded
applications such as:
• PICMG 2.16 support
• Universal CompactPCI support (system controller or peripheral)
• Remote Ethernet booting
• Up to 2 GByte of CompactFlash
• Software-selectable Watchdog Timer with reset
Additionally, the VMICPCI-7055/CPCI-7055RC offer two PMC expansion sites
with front panel access and I/O routing to the J5 connector of the CompactPCI
backplane. The VMICPCI-7055/CPCI-7055RC are capable of executing many of
today’s embedded operating systems such as VxWorks®or Linux®. The
embedded features of the VMICPCI-7055/CPCI-7055RC are described in
Chapter 3 Embedded PC/RTOS Features of this manual.
The VMICPCI-7055/CPCI-7055RC are suitable for use in applications ranging
from telecommunications, simulation, instrumentation, industrial control,
process control and monitoring, factory automation, automated test systems, data

Publication No. 500-657055-000 Rev. G Overview 13
acquisition systems and anywhere that the highest performance processing
power in a single CompactPCI chassis slot is desired.
PowerPC RISC Microprocessor
The microprocessor used on the VMICPCI-7055/CPCI-7055RC is a 32-bit
PowerPC 750GX architecture in a 0.13 micron CMOS technology with six levels of
copper interconnect. The performance enhancements included in the
microprocessor are:
• Onboard L2 cache with locking by way (1 MByte)
• L1 data cache availability
• Bus pipelining (consecutive data reads)
• Additional floating point unit (FPU) reservation station and improved
reciprocal estimates
L1 Data Cache
The 750GX L1 data cache supports miss-under-miss access, meaning that with
one miss outstanding, the cache can continue to be accessed until a second miss
occurs. In previous PowerPC 750 microprocessor implementations the data bus
width for bus interface unit (BIU) accesses of the L1 data cache array was 64 bits.
To cast out or to reload a 256-bit cache line required four access cycles. On the
750GX, this bus has been expanded to 256 bits. As a result, cache line data bursts
can be read from or written to the cache array in a single cycle, reducing cache
contention between the BIU and the load-store unit.
L2 Cache
The 750GX processor is available with 1 MByte of L2 cache. The cache is two-way
set associative; each way contains 4096 blocks and each block consists of two 32-
byte sectors. Array read and write operations execute in one processor cycle.
Writes to the array are 64 bits wide, while reads are 256 bits wide.
In addition, the L2 cache has an 8-bit ECC for every 64-bit word in memory that
can be used to correct a majority of single bit errors and detect multiple bit errors.
The L2 tags also support parity and locking by way.
Bus Pipelining
The 60x bus has decoupled address and data buses, allowing transactions to be
pipelined on the bus. That is, the address operation for a second transaction can
be initiated before the data operation for a previous transaction is complete. The
750GX BIU allows pipelined read transactions to a depth of two back-to-back
reads.

14 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
Marvell Discovery III (MV64460) Chipset
Revolutionary Architecture, Advanced Features
The Marvell Discovery™ III devices feature an advanced high performance
crossbar switch architecture with any-to-any connectivity. With up to 100 Gigabits
per second (Gbit/s) of aggregate throughput, the crossbar fabric supports non-
blocking concurrent connections among peripherals at full bus speeds, delivering
break-through performance for advanced Internet infrastructure equipment.
The Discovery III system controllers are highly integrated and offer leading-edge
peripherals on-chip, including up to three Gigabit Media Access Controllers
(MACs), up to two PCI-X interfaces and DDR memory support. In addition, the
Discovery III device offers an integrated 2 MBit of cache coherent SRAM that
resides on the processor interface unit to provide low latency storage for
descriptors and packets.

Publication No. 500-657055-000 Rev. G Overview 15
Figure 1 VMICPCI-7055/CPCI-7055RC Block Diagram
NOTE
IPMI is no longer supported. Older boards may have IPMI.
J2
J3
J5
J1
64-bit/100 MHz
PCI-X
PMC Site 2
64-bit/100 MHz
PCI-X
PMC Site 1
Hint HB6
PCI-to-PCI
Bridge
With
PICMG 2.1
Hot Swap
64-bit/100 MHz PCI-X Bus
VMICPCI-7055/
CPCI-7055RC
IBM 750GX
PowerPC
Microprocessor
1.0 GHz
Marvell
Discovery III
SODIMM
with ECC
(200 MHz
up to 1 Gbyte)
PCI-to-IDE
Bridge
33 MHz
Dual ATA 100
CompactFlash
Socket
512 Kbyte
Flash
PLCC32
64 Mbyte
Flash
RTC
32 Kbyte
NVRAM
10/100/1000 LAN Gbit
PHY
Two Single or One Double Wide PMC Site
PMC Site 1 I/O - 64-bit
Device Bus
64-bit, 66 MHz PCI Bus
JTAG/
COP
133 MHz/
200 MHz
DDR400
RJ45 COM0
RS232 UART
1/4
Xcrv
IPMI
UART
RJ45
w/mag
RGMII
TTL
PCI
PCI
Secondary IDE
RGMII
RGMII Gbit
PHY
Gbit
PHY
Mag
Mag
PICMG 2.16
Gigabit Ether
Gigabit Ether
PICMG 2.16
64-bit
66 MHz
PCI
32-bit
33 MHz
64-bit
CPLD
64-bit, 66 MHz PCI Bus
UART
1/4
Xcrv
Dev
Bus
PCI
to
PCI
Bridge
32-bit
33 MHz
EIA-232/422/485 COM1/COM2
UART
1/2
Xcrv
Dev
Bus
IPMI Serial
NOTE: Zero ohm
resistors for
FAB A/B op

16 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
References
IBM PowerPC 750FX/GX RISC Microprocessor
IBM Microelectronics Division
1580 Route 52, Bldg. 504
Hopewell Junction, NY 12533-6351
www.ibm.com or
www-3.ibm.com/chips/
Marvell MV64460/1/2 System Controller for PowerPC
Marvell Semiconductor
700 First Ave.
Sunnyvale, CA 94089
[phone]
www.marvell.com
PCI Local Bus Specification, Rev. 2.2
Marvell Semiconductor
P.O. Box 14070
Portland, OR 97214
[phone] (U.S.)
[phone] (International)
[phone] (FAX)
PCI 6150 PCI-to-PCI Bridge Chip (IDE)
PLX Technology, Inc.
870 Maude Ave.
Sunnyvale, CA 94085 USA
Tel: [phone]
Tel: [phone]
Fax: [phone]
Email: [email protected]
Web Site: www.plxtech.com
PLX PCI-6254 (HB6) Dual Mode Universal PCI-to-PCI Bridge Datasheet
PLX Technology Inc.
870 Maude Ave.
Sunnyvale, CA 94085
www.plxtech.com
CMC Specification, P1386/Draft 2.0 from:
IEEE Standards Department
Copyrights and Permissions
445 Hoes Lanes, P.O. Box 1331
Piscataway, NJ 08855-1331
PMC Specification, P1386.1/Draft 2.0 from:
IEEE Standards Department
Copyrights and Permissions
Piscataway, NJ 08855-1331
445 Hoes Lanes, P.O. Box 1331
Piscataway, NJ 08855-1331, USA

Publication No. 500-657055-000 Rev. G Overview 17
For a detailed description and specification of the CompactPCI bus, please refer to:
CompactPCI Specification PICMG 2.0 R3.0
IEEE Standards Department
PCI Industrial Computer Manufacturers’ Group
301 Edgewater Place
Suite 220
Wakefield, MA 01880
[phone]
[phone] (FAX)
www.picmg.org
Packet Switching Backplane Specification PICMG 2.16 R1.0
PCI Industrial Computer Manufacturers’ Group
301 Edgewater Place
Suite 220
Wakefield, MA 01880
[phone]
[phone] (FAX)
www.picmg.org
The following is useful information related to the operation of the I2C controllers:
The I2C Specification version 2.0
Philips Semiconductor
811 East Arques Ave.
Sunnyvale, CA 94088-3409
[phone]
www.semiconductors.philips.com

18 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G
1 • Handling and Installation
This chapter describes the hardware jumper settings, connector descriptions,
installation, system setup and operation of the VMICPCI-7055/CPCI-7055RC.
1.1 Unpacking Procedures
Any precautions found in the shipping container should be observed. All items
should be carefully unpacked and thoroughly inspected for damage that might
have occurred during shipment. The board(s) should be checked for broken
components, damaged printed circuit board(s), heat damage and other visible
contamination. All claims arising from shipping damage should be filed with the
carrier and a complete report sent to Abaco Customer Care.
1.2 Handling Precaution
Electronic assemblies use devices that are sensitive to static discharge. Observe
anti-static procedures when handling these boards. All products should be in an
anti-static plastic bag or conductive foam for storage or shipment. Work at an
approved anti-static workstation when unpacking boards.
1.3 Hardware Setup
The VMICPCI-7055/CPCI-7055RC are factory populated with user-specified
options as part of the VMICPCI-7055/CPCI-7055RC ordering information. The
RAM size is not user-upgradable. To change RAM size, contact Customer Care to
receive a Return Material Authorization (RMA).
The VMICPCI-7055/CPCI-7055RC are tested for system operation and shipped
with factory-installed header jumpers. The physical location of the jumpers and
connectors for the SBC are illustrated in Figure 1-1 on page 19. The definitions of
the SBC board jumpers and connectors are included in Table 1-1 through
Table 1-3. Please note that the VMICPCI-7055/CPCI-7055RC offer two PMC sites
designated PMC #1 and PMC #2 as shown in Figure 1-1 on page 19.
CAUTION
All jumpers marked User Configurable in the following tables may be changed or modified by the user.
All jumpers marked factory configured should not be modified by the user.
Care must be taken when making jumper modifications to ensure against improper settings or
connections. Improper settings may result in damage to the unit.
Modifying any jumper not marked User Configurable will void the Warranty and may damage the unit.
Tables with bold text indicates that this is the default setting.

Publication No. 500-657055-000 Rev. G Handling and Installation 19
Figure 1-1 VMICPCI-7055/CPCI-7055RC PMC Sites and Jumper Locations
J2
J1 J3
J22
J21 J13
J14
J5
J11
J12
E16 J29 J28
J23
U2
D82 S2 D90 D89
E19
2
1
E25
2
1
E18
2
1
20
19
S1
KP5
KP6
T2
T1
U286
U228
PMC 1
PMC 2