Teknor Industrial Computers TEK-CPCI 1003 Product manual

NOTE:
Thismanualisforreferencepurposeonly.
Reproductioninwholeorinpartisauthorizedprovided
TEKNORINDUSTRIALCOMPUTERSINC.iscitedas
theoriginalsource.
ref.:M1003_1-1
TEK-CPCI1003
CompactPCIMobilePENTIUMIISBC
TECHNICALREFERENCEMANUALVERSION1.1b
November1998

i
TABLE OF CONTENTS
PART ONE – Product Description
1. PRODUCT OVERVIEW .............................................................................1-1
2. COMPATIBILITY WITH TEKNOR PRODUCTS .........................................2-1
3. UNPACKING .............................................................................................3-1
4. SAFETY PRECAUTIONS ..........................................................................4-1
4.1 STATIC ELECTRICITY ....................................................................................4-1
4.2 STORAGE ENVIRONMENT ..............................................................................4-1
4.3 POWER SUPPLY ..........................................................................................4-1
5. ONBOARD INTERCONNECTIVITY...........................................................5-1
5.1 CONNECTOR LOCATION ................................................................................5-4
5.2 ONBOARD CONNECTORS AND HEADERS..........................................................5-5
5.3 FRONT PLATE CONNECTORS.........................................................................5-6
5.4 COMPACTPCI CONNECTORS .........................................................................5-7
6. MEZZANINE CONCEPTS..........................................................................6-1
6.1 PROPRIETARY MEZZANINE CONCEPT..............................................................6-2
6.2 PMC CONCEPT ..........................................................................................6-2
6.3 COMPACTFLASH FEATURE ............................................................................6-3

TEK-CPCI-1003 Technical Reference Manual
ii
PART TWO – Feature Description
7. ONBOARD FEATURES.............................................................................7-1
7.1 COMPACTFLASH INTERFACE..........................................................................7-1
7.2 ENHANCED IDE INTERFACES.........................................................................7-3
7.3 ETHERNET INTERFACES................................................................................7-4
7.4 FLOPPY DISK INTERFACE ..............................................................................7-6
7.5 KEYBOARD/MOUSE INTERFACE......................................................................7-6
7.6 PARALLEL PORT..........................................................................................7-7
7.7 POWER MANAGEMENT..................................................................................7-9
7.8 SCSI INTERFACE ........................................................................................7-9
7.9 SERIAL PORTS ..........................................................................................7-10
7.10 THERMAL MANAGEMENT.............................................................................7-14
7.11 USB INTERFACES......................................................................................7-15
7.12 VIDEO INTERFACE......................................................................................7-16
7.13 V-PORT ...................................................................................................7-18
PART THREE – Installation and Settings
8. CUSTOMIZING THE BOARD ....................................................................8-1
8.1 PROCESSOR AND FAN ..................................................................................8-1
8.2 BACKUP MEMORY........................................................................................8-2
8.3 INSTALLING MEMORY....................................................................................8-3
8.4 SUPERVISION FEATURES...............................................................................8-5
9. SETTING JUMPERS .................................................................................9-1
JUMPER LOCATION...................................................................................................9-2
JUMPER SETTINGS (TABLE 1)....................................................................................9-3
JUMPER SETTINGS (TABLE 2)....................................................................................9-4
10. BUILDING A CPCI SYSTEM....................................................................10-1
10.2 INSTALLING THE BOARD INTO A BAY...............................................................10-4

Table of Contents
iii
11. CPCI I/O SIGNALS.................................................................................. 11-1
11.1 J3 SIGNAL SPECIFICATION ..........................................................................11-1
11.2 J4 SIGNAL SPECIFICATION ..........................................................................11-3
11.3 J5 SIGNAL SPECIFICATION ..........................................................................11-6
PART FOUR – Software Setups
12. AWARD SETUP PROGRAM ...................................................................12-1
12.1 ACCESSING THE AWARD SETUP PROGRAM......................................................12-2
12.2 USING AWARD SETUP PROGRAM...............................................................12-3
12.3 SETUPS ...................................................................................................12-5
13. UPDATING THE BIOS WITH UPGBIOS..................................................13-1
13.1 CPLD UPGRADE AFTER A BIOS UPDATE .....................................................13-2
14. VT100 MODE...........................................................................................14-1
14.1 REQUIREMENTS.........................................................................................14-1
14.2 SETUP & CONFIGURATION ..........................................................................14-1
14.3 RUNNING WITHOUT A TERMINAL...................................................................14-2

PRODUCT DESCRIPTION
1. PRODUCT OVERVIEW
2. COMPATIBILITY WITH TEKNOR PRODUCTS
3. UNPACKING
4. SAFETY PRECAUTIONS
5. ONBOARD CONNECTIVITY
6. MEZZANINE CONCEPTS

1-1
1. PRODUCT OVERVIEW
The TEK-CPCI-1003 is the first CompactPCI™ industrial SBC based on the Intel’s Pentium®
II processor in a ‘mini-cartridge’ package (Mobile Pentium®II).
The board supports 233MHz, 266MHz, 300MHz, and future processors, 512KB L2 pipelined
burst cache and Intel’s 82443BX and 82371AB PIIX4E chipset. It features J3/J4/J5 de-facto
industry standard connectors to handle I/O signals such as serial, parallel, and USB ports,
Ethernet, video and V-Port, SCSI, and IDE interfaces, keyboard, speaker, mouse, and reset
signals, SMBus and power.
The TEK-CPCI-1003 can be purchased either for front plate I/O interfacing (video, serial
ports, Ethernet ports) or rear panel I/O interfacing (no interconnection capability available on
the front plate) through CPCI I/O connectors.
The front plate may be adapted (optional) to support standard mouse, keyboard and floppy
connections when adding a mezzanine board to the SBC or a PMC card.
The board is intended to provide the highest level of performance and throughput for the
32/64-bit CompactPCI™ operating environments. The rugged design of the TEK-CPCI-
1003, as well as its very rich feature-set, makes it an outstanding choice for numerous high-
availability applications ranging from telecommunication to computer intensive industrial and
mission-critical medical applications.
The TEK-CPCI-1003 board is fully compatible with existing application software and
operating systems available for desktop PCs: PC and MS-DOS, Windows3.1, Windows
95, WindowsNT, OS/2Warp, QNX, NOVELL, UnixWare.

TEK-CPCI-1003 Technical Reference Manual
1-2
§Supported Processors
Single 233MHz, 266MHz, or 300MHz Mobile Pentium II processor with Intel’s
82443BX and 82371AB PIIX4 chipset.
§Memory
System memory:The TEK-CPCI-1003 supports from 8MB to 384MB vertical
SDRAM on three 168-pin DIMMs sockets with ECC
capabilities. Registered SDRAM (RSDRAM) is also
supported for up to 768MB of system memory.
Internal cache:32KB (L1), 512KB (L2) pipelined burst cache is implemented
to enhance the processor operations by eliminating wait states
on cache accesses.
§CompactPCI Connectors
Rear panel CPCI connectors are PICMG 2.0 R2.1 CompactPCIspecification
compliant. CompactPCI connectors are located at the rear edge of the board. The
complete CPCI connector configuration is composed of five connectors referred to as
J1, J2, J3, J4, and J5. They are defined as 2mm pitch, shielded connectors with a 5x47
array of pin for signals and 2 rows of 47 pins for shielding.
Their function is described below:
J1/J2: carry out arbitration and PCI bus signals, and power.
J3/J4/J5: handle I/O signals.

Product Overview
1-3
§Interfacing with the Environment
CPCI The TEK-CPCI-1003 SBC is provided for rack-mounted systems. Through
the J1/J2 segment, the board can drive up to seven external CompactPCI slots,
supporting individual REQ/GNT arbitration signals and individual clocks.
All I/O signals are duplicated and available through the J3/J4/J5 I/O segment to
be distributed to their respective I/O connectors located on the backplane.
When connecting the board to a backplane, ensure the backplane is capable of
supporting these signals. It must also make them available on individual local
headers.
A backplane dedicated to the TEK-CPCI-1003 is provided by TEKNOR, and is
referred to as TEK-CPCI 1103 CPCI Passive Backplane.
Mezzanine The mezzanine is a new hardware concept introduced by TEKNOR to
increase the I/O connectivity of the TEK-CPCI-1003, but respecting the dual
slot 8U form factor restrictions.
PCI bus, IDE floppy, keyboard and mouse signals are provided on two
connectors to support mezzanine applications: optional storage devices (HD
and FD), CD-ROM device or PCI-to-PCI bridge can easily be added to the
system without any loss of I/O slot on the backplane.
Some mezzanine from TEKNOR feature PS/2 standard mouse and keyboard
plugs for direct connection on the face plate (TEK-CPCI-1050 and 1051 storage
mezzanines).

2-1
2. COMPATIBILITY WITH TEKNOR PRODUCTS
The TEK-CPCI-1003 CPU Single Board Computer is a member of the TEKNOR
CompactPCI product family. The board is fully compliant with the PICMG 2.0 R2.1
CompactPCI specification for the PCI bus segment.
When building a basic environment around the TEK-CPCI-1003, the system may be
composed with any of the following devices:
§TEK-CPCI-1003: 6U system board
§TEK-CPCI-1103: 8 slots - CompactPCI backplane
§TEK-CPCI-1106: 16 slots - CompactPCI backplane
§TEK-CPCI 1050: HD, FD, keyboard, and mouse mezzanine
§TEK-CPCI 1051: HD, FD, keyboard, mouse, and PCI-to-PCI bridge
mezzanine
§TEK-CPCI 1070: 6Ux8HPx100mm - Rear I/O interface module
§TEK-CPCI 1071: 6Ux8HPx80mm - Rear I/O interface module
§TEK-CPCI 1080: 6Ux8HP – HD and CD-ROM CompactPCI unit
§3U and 6U CompactPCI devices
§6U form factor enclosure
§ATX Power Supply
§Hot-swap, load-sharing power supply unit
A CompactPCI Development Platform is available from TEKNOR and is referred to as
TEK-CPCI-1203.

3-1
3. UNPACKING
Follow these recommendations while unpacking:
1. After opening the box, save it and the packing material for possible future shipment.
2. Remove the board from its antistatic wrapping and place it on a grounded surface.
3. Inspect the board for damage. If there is any damage, or items are missing, notify
TEKNOR immediately.
Contents
When unpacking you will find:
1. One TEK-CPCI-1003, Mobile Pentium II Single Board Computer
2. One Quick Reference sheet
3. Diskettes

4-1
4. SAFETY PRECAUTIONS
4.1 STATIC ELECTRICITY
Since static electricity can damage the board, the following precautions should be taken:
1. Keep the board in its antistatic package, until you are ready to install it.
2. Touch a grounded surface or wear a grounding wrist strap before removing the board
from its package; this will discharge any static electricity that may have built up in
your body.
3. Handle the board by the edges.
4.2 STORAGE ENVIRONMENT
Electronic boards are sensitive devices. Do not handle or store devices near strong
electrostatic, electromagnetic, magnetic or radioactive fields.
4.3 POWER SUPPLY
Before any installation or setup, ensure that the board is unplugged from power sources or
subsystems.

5-1
5. ONBOARD INTERCONNECTIVITY
The TEK-CPCI-1003 is not only a matter of computation power. The board also provides a
high capability to interface with peripherals through three integrated chipsets:
. Host-to-PCI bridge - 443BX from Intel: interface with the processor (host), system
memory, video controller, and Primary PCI bus (3.3V / 33MHz).
. PCI-to-PCI bridge - 21150 from DEC: manage the PCI bus signals on J1 and J2 CPCI
connectors. When used with a CompactPCI backplane, the board can drive directly
up to seven CPCI slots in PCI bus Master configuration.
. PCI-to-ISA bridge - 82371AB PIIX4 from Intel: interface the ISA bus to the Primary
PCI bus.
nMobile Pentium®II processor
The TEK-CPCI-1003 system board supports 233MHz, 266MHz, and 300MHz Mobile
Pentium®II processors from Intel, which is the first implementation of the Pentium II
processor family optimized for the mobile platform.
It consists of a mobile Pentium®II processor core with an integrated second level cache
and a 64-bit high performance host bus (66MHz bus speed).
The processor interfaces to the 82443BX PCIset through the 64-bit low power GTL+ data
bus interface.
n443BX PCIset
The 443BX integrates a 32-bit PCI bus arbiter, and is optimized for 66MHz, 64/72-bit
SDRAM memory control and data path. It also features the Accelerated Graphics Port
(AGP) interface with up to 133MHz data transfer capability for data transfers with the
video chip.

TEK-CPCI-1003 Technical Reference Manual
5-2
TEK-CPCI-1003 Block Diagram
Intel Mobile Pentium II
3.3V, 33MHz Primary PCI Bus
82558
100Base-T
Ethernet
#2
XTAL
Eeprom
S-RJ-45 82558
100Base-T
Ethernet
#1
XTAL
Eeprom
S-RJ-45
Ultra SCSI 2
Adaptec
AIC-7880
XTAL
CompactPCI J4
21150
PCI-
PCI
Bridge
DEC
&
Clocks
Drivers
Intel PIIX4
82371AB
PCI-ISA Bridge
324PBGA
SMC Super
I/O Controler
FDC37C672
+ Prog WD
CompactPCI J4/
J5 Connector
Cirrus AGP
CL-GD5465
2M RAM,
Rambus
3.3V, 16 Bit ISA Bus
Intel
82443BX
North Bridge
492PBGA
CompactPCI J1
Connector
CompactPCI J2
Connector
SVGA
VPort
AGP
Termin.
3x168P
DIMM
3.3V
GTL+
Switching
Regulators
Clocks
Synthes. &
Buffers
CPLD
Glue Logic
BIOS BOOT
Block Flash 24C32
Eeprom
64 Bit
Serial ID
PMC
Connector
Jn1/Jn2
PCI Proprietary
Mezzanine
2nd IDE
I2C
Rs232
Rs422
Rs485
COM1/2
BAT 3.6V
2 Stage
Watchdog
COM1 DB9 Kbd
USB
1rst IDE
Part of CPCI J3
Rs232 Buf.
Lpt
Floppy
Mouse
Kbd
5V
VCores
Thermal
Sensor
MPII Core
233/266MHz
512KB
L2 Cache
XTAL
SMBus
ITP Test Connector
System Clock
COM3
16C550 COM4 16C550
clk
Additional Arbitration
Channels Circuit
APIC
XTAL
APIC
Eeprom
On Board Floppy
Floppy

Onboard Interconnectivity
5-3
n21150 PCI-to-PCI Bridge
The 21150 is a 32/32-bit 33MHz PCI-to-PCI bridge that allows the board to support up to
seven loads on its secondary PCI bus through a passive backplane. The bridge is fully
compliant the PCI Local Bus Specification, Rev. 2.1. It provides full support for delayed
transactions, which enables the buffering of memory read, I/O and configuration
transactions. The 21150 have separate posted write, read data and delayed transaction
queues with a high buffering capability.
In addition, it supports buffering of simultaneous multiple posted writes and delayed
transactions in both directions.
The PCI-to-PCI bridge allows the Primary and Secondary PCI buses to operate
concurrently. This means that a master and a target on the same PCI bus can communicate
while the other PCI bus is busy. This traffic isolation may increase system performance in
applications such as multimedia.
n82371AB PCI-to-ISA Bridge / IDE Xcelerator (PIIX4)
The PCI-to-ISA bridge is configured to support signals to directly drive IDE interfaces,
USB ports, extra communication ports (Serial Ports 3 and 4), and standard Serial Ports (1
and 2), floppy disk drives, mouse and keyboard through a super I/O controller
(FDC37C672).

TEK-CPCI-1003 Technical Reference Manual
5-4
5.1 CONNECTOR LOCATION

Onboard Interconnectivity
5-5
5.2 ONBOARD CONNECTORS AND HEADERS
§Fan Header (J7)
The +12V DC CPU fan power supply is provided through this header.
§Processor Socket (J9)
Mobile Pentium II processor dedicated connector.
§CompactFlash Connector (J11)
This connector is dedicated to the TEKNOR’s CompactFlash module to support
CompactFlash disks.
§PCI Mezzanine Connector (J14)
This connector handles PCI bus signals to the mezzanine.
§DIMM Sockets (J16/J17/J18)
Three 168-pin DIMM sockets
§Storage Mezzanine connector (J19)
This connector is implemented to support floppy/hard disk, keyboard, and mouse
signals.
§PMC Connectors (J20/J21)
The PCI Mezzanine Card (PMC) connectors support one standard PMC device.
§Battery Connector (B1)
CMOS backup battery connector.

TEK-CPCI-1003 Technical Reference Manual
5-6
5.3 FRONT PLATE CONNECTORS
§Video Connector (J8)
Standard 15-pin DSUB female connectors.
§Reset Button
Use a small tool to press the button and proceed to a
hardware reset of the board.
§IDE/SCSI LEDs
When lit indicate there is an activity on IDE/SCSI devices.
§Com Port 1 (J10)
Standard 9-pin DSUB male connectors.
§Ethernet Connectors (J12/J15)
RJ-45 connectors with built-in activity and link indicators.
The front plate supports a PMC cutout and a cap that also acts as
an EMI shield when there is no PMC device installed. An
optional front plate with mouse, keyboard, and floppy disk
cutouts is available from TEKNOR to support a mezzanine board
featuring these functions.

Onboard Interconnectivity
5-7
5.4 COMPACTPCI CONNECTORS
§CPCI J5 Connector
Supports PS/2 mouse, serial ports 1 and 3, first IDE channel,
parallel port, keyboard, speaker, floppy disk, reset, USB, SMBus
and power signals.
§CPCI J4 Connector
Supports Ethernet 0, second IDE channel, SCSI, VGA, and
power signals.
§CPCI J3 Connector
Supports serial ports 2, 3 (Infrared), and 4, V-Port, Ethernet 1,
and power signals.
§CPCI J2 Connector
Supports additional system slot signals, and power.
§CPCI J1 Connector
Supports CPCI bus signals, and power.

6-1
6. MEZZANINE CONCEPTS
The capability of the TEK-CPCI-1003 to connect with other devices is enforced by three
mezzanine board concepts TEKNOR has implemented on the board.
A fully equipped TEK-CPCI-1003 board may appear as follows:

TEK-CPCI-1003 Technical Reference Manual
6-2
6.1 PROPRIETARY MEZZANINE CONCEPT
This is TEKNOR’s proprietary concept to expand the I/O capability of the board. It is built
around two connectors:
§J14: which handles a complete PCI signal set (Primary bus) including the
REQ/GNT arbitration signal pair (REQ4/GNT4).
§J19: which handles IDE0, floppy disk drive, keyboard and mouse signals.
These two connectors represent an open door for future development of expansion and I/O
mezzanine boards.
The mechanical location of the connectors allows features such as connectors and
indicators to be available directly on the front plate.
A Storage Mezzanine Board referred to as TEK-CPCI 1050 is provided by TEKNOR.
Many other functions will be available soon. For more information, please contact
TEKNOR’s offices.
6.2 PMC CONCEPT
PCI Mezzanine Card (PMC) is a standard specification that allows PCI I/O devices to be
connected to the PCI bus. It conforms to the ANSI/IEEE P1386.1 specification that defines
Standard Physical and Environmental Layers for PMC devices.
The TEK-CPCI-1003 features the PMC concept onboard to provide an extra method to
support the 32-bit I/O devices available on the market.
Various devices such as Ultra-SCSI, Fire-Wire, PCMCIA, Bus Analyzers, Digital I/O, ...
are available from Silicon Control, Cyclone, Technobox, Vmetro, and many more.
PMC devices connect directly to J20 and J21standard PMC connectors. A mechanical
cutout (with its EMI proof cap) is provided to allow integrated connectors and indicators to
be available directly on the front plate.