Abov AC30M1x64 User manual

32-bit Cortex-M0 based
Programmable Motor Controller
FlashROM 64/32KB / SRAM 4KB
AC30M1x64
AC30M1x32
USER MANUAL
Version 1.1.0
2016.8.17.

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ABOV Semiconductor
Proprietary Notice
The information contained herein is subject to change without notice.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is
assumed by ABOV Semiconductor for any infringements of patents or other rights of the third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of ABOV Semiconductor or others.
These ABOV Semiconductor products are intended for usage in general electronic equipment (office equipment,
communication equipment, measuring equipment, domestic electrification, etc.).
Please make sure that you consult with us before you use these ABOV Semiconductor products in equipment which require
high quality and / or reliability, and in equipment which could have major impact to the welfare of human life (atomic energy
control, airplane, spaceship, traffic signal, combustion control, all types of safety devices, etc.). ABOV Semiconductor cannot
accept liability to any damage which may occur in case these ABOV Semiconductor products were used in the mentioned
equipment without prior consultation with ABOV Semiconductor.
Copyright 2016 ABOV Semiconductor Co.,Ltd.
Revision History:
Date
By
Version
Description
2016/7/22
SJ PARK
1.0.0
File created
2016/8/17
SJ PARK
1.1.0
32pin map diagram changed

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ABOV Semiconductor
INTRODUCTION
SECTION 1.INTRODUCTION

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AC30M1x64/1x32
ABOV Semiconductor
OVERVIEWCHAPTER 1.

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OVERVIEW
ABOV Semiconductor
INTRODUCTION1.1
AC30M1x64/1x32 is special purpose microcontroller for motor application. This microcontroller brings high-
performance 32-bit computing to low cost system solution.
AC30M1x64/1x32 provides 3-phase PWM generator units which are suitable to inverter motor drive system. Built-in 3-
phase PWM generator controls one inverter motor. One 12-bit high speed ADC units with 12-channel analog multiplexed
inputs support to get feedback information from motor. It can control up to one inverter motor. Powerful and various
external serial interfaces help to communicate with on-board sensors and devices.
AC30M1x64/1x32 Block Diagram
Advanced High Performance Bus (AHB)
Advanced Peripheral Bus (APB)
Core and Memory System Control Units
Serial Interfaces I/O Ports Timers Analog Interfaces
ARM Cortex- M0 Processor
Up to 40MHz
Code Flash
64/32KB
SWD Debug Interface
SPI
1-ch
I2C
1-ch
UART
2-ch
General Purpose I/O
External Interrupts
Reset Pin
16- bit Timer/Counter
4-ch
Motor PWM
1-ch
12- bit ADC
1-unit
1.0Msps
MOSC
4~16MHz
POR
WDT, FRT
HSI
40MHz
SOSC
32.768kHz
LSI
40kHz
VDC
1.8V
LVD(BOD)
Internal SRAM
4KB NVIC
Boot ROM
Figure 1.1 Block diagram

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AC30M1x64/1x32
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32
36 35 34 33 32 31 30 29 28 27 26
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
18
17
16
15
14
13
1 2 3 4 5 6 7 8 9
10 11 12
19
25
PA7/T1IO/AN7 PA6/T0IO/AN6 PA5/AN5 PA4/AN4 PA3/SCK/STBO/AN3 PA2/SS/WDTO/AN2 PA1/T3IO/AN1 PA0/T2IO/AN0 PA15/T3IO PA14/T2IO PA13/T1IO PA12/T0IO
PC8/SDA
PC7/SCL/T3IO
PC1/SWDIO/TXD1
PC0/SWCLK/RXD1
VDD
PC2
PC3
PC9/CLKO
PC11/T0IO/BOOT
PC15/TXD0
PC14/RXD0
GND
AN8/T2IO/T0IO/PA8
AN9/T1IO/T3IO/PA9
AN10/PA10
AN11/PA11
nRESET/PC10
AVDD/VDD
AGND/GND
XOUT/T2IO/PC13
XIN/T3IO/PC12
SXIN/SDA/MISO/PD3
SXOUT/SCL/MOSI/PD2
SCK/PD1
SS/PD0
T0IO/PC4
T1IO/RXD1/PC5
T2IO/TXD1/PC6
OVIN/PB7
PRTIN/PB6
MPWMWL/PB5
MPWMWH/PB4
MISO/MPWMVL/PB3
MOSI/MPWMVH/PB2
SCK/MPWMUL/PB1
SS/MPWMUH/PB0
AC30M1464LBN
LQFP-48
Figure 1.2 PIN LAYOUT (LQFP-48)

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24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
16
15
14
13
12
10
9
1 2 3 4 5 6 7 8
11
AN7/T1IO/PA7
PA6/T0IO/AN6 PA5/AN5 PA4/AN4 PA3/SCK/STBO/AN3 PA2/SS/WDTO/AN2 PA1/T3IO/AN1 PA0/T2IO/AN0 PC8/SDA
PC7/SCL/T3IO
PC1/SWDIO/TXD1
PC0/SWCLK/RXD1
PC11/T0IO/BOOT
PC14/RXD0
PB0/MPWMUH/SS
PB1/MPWMUL/SCK
PC15/TXD0
AN8/T2IO/T0IO/PA8
AN9/T1IO/T3IO/PA9
nRESET/PC10
AVDD/VDD
AGND/GND
XOUT/T2IO/PC13
XIN/T3IO/PC12
SXIN/SDA/MISO/PD3
SXOUT/SCL/MOSI/PD2
OVIN/PB7
PRTIN/PB6
MPWMWL/PB5
MPWMWH/PB4
MISO/MPWMVL/PB3
MOSI/MPWMVH/PB2
AC30M1364LBN
AC30M1332LBN
LQFP-32
Figure 1.3 PIN LAYOUT (LQFP-32)

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AC30M1x64/1x32
ABOV Semiconductor
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
16
15
14
13
12
10
9
1 2 3 4 5 6 7 8
11
AN7/T1IO/PA7
PA6/T0IO/AN6 PA5/AN5 PA4/AN4 PA3/SCK/STBO/AN3 PA2/SS/WDTO/AN2 PA1/T3IO/AN1 PA0/T2IO/AN0 PC8/SDA
PC7/SCL/T3IO
PC1/SWDIO/TXD1
PC0/SWCLK/RXD1
PC11/T0IO/BOOT
PC14/RXD0
PB0/MPWMUH/SS
PB1/MPWMUL/SCK
PC15/TXD0
AN8/T2IO/T0IO/PA8
AN9/T1IO/T3IO/PA9
nRESET/PC10
AVDD/VDD
AGND/GND
XOUT/T2IO/PC13
XIN/T3IO/PC12
SXIN/SDA/MISO/PD3
SXOUT/SCL/MOSI/PD2
OVIN/PB7
PRTIN/PB6
MPWMWL/PB5
MPWMWH/PB4
MISO/MPWMVL/PB3
MOSI/MPWMVH/PB2
AC30M1364UB
AC30M1332UB
QFN-32
Figure 1.4 PIN LAYOUT (QFN-32)

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ABOV Semiconductor
Product Features1.2
Product features of AC30M1x64/1x32 is below
High Performance Low-power Cortex-M0 Core
64/32KB Code Flash Memory
−Endurance : 10,000 times at room temperature
−Retention : 10 years
4KB SRAM
General Purpose I/O (GPIO)
−44Ports (PA[15:0], PB[7:0], PC[15:0], PD[3:0]) : 48-Pin
−30Ports (PA[9:0], PB[7:0], PC[1:0], PC[8:7], PC[15:10], PD[3:2]) : 32-Pin
3-Phase Motor PWM with ADC triggering function
−1-ch
1MSPS high-speed 12-bit ADC with sequential conversion function
−12-ch : 48-Pin
−10-ch : 32-Pin
Timer
−16 Bit 4-ch
Free Run Timer
−32 Bit 1-ch
Watchdog Timer
−32 Bit 1-ch
External communication ports:
−2-ch UARTs
−1-ch I2C
−1-ch SPI
Hardware Divider (DIV64)
On-Chip RC-Oscillator
−HSI : 40MHz(±3% @-40 ~ +105℃)
−LSI : 40kHz(±20% @-40 ~ +105℃)
System Fail-Safe function by Clock Monitoring
XTAL OSC Fail monitoring
Power On Reset
Programmable Low Voltage Detector (Brown-Out Detector )
Debug and Emergency stop function
SWD Debugger
Supports UART and SPI ISP
Power Down Mode
−IDLE, STOP1, STOP2 Mode
Sub-Active mode
−System used external 32.768kHz crystal or system used internal 40kHz LSI
Operating Frequency
−40kHz ~ 40MHz
−External 32.768kHz crystal
Operating Voltage
−2.2V ~ 5.5V
Five types of package options
−LQFP-48

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−LQFP-32
−QFN-32
Table 1.1 Device type
Part Number
Flash
SRAM
UART
SPI
I2C
MPWM
ADC
I/O Ports
Package
AC30M1464LBN
64KB
4KB
2
1
1
1
1-unit
12 ch
44
LQFP-48
AC30M1364LBN
64KB
4KB
2
1
1
1
1-unit
10 ch
30
LQFP-32
AC30M1364UB
64KB
4KB
2
1
1
1
1-unit
10 ch
30
QFN-32
AC30M1332LBN
32KB
4KB
2
1
1
1
1-unit
10 ch
30
LQFP-32
AC30M1332UB
32KB
4KB
2
1
1
1
1-unit
10 ch
30
QFN-32

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OVERVIEW
ABOV Semiconductor
ARCHITECTURE1.3
Block Diagram1.3.1
AC30M1x64/1x32 Block diagram is shown as following.
Debug Interface
ARM
Cortex-M0
SysTick Timer
NVIC
2K-Bytes
Boot ROM
64/32K-Bytes
Flash Memory 4k-Bytes SRAM
Power
Control
LVD
( BOD )
POR
VDC
AHB-Lite BUS
APB BUS
12-Bit A/D Converter
CRC-CCITT
UART0
UART1
I2C
HSI
40MHz LSI 40kHz
Clock Control
MOSC
4-16MHz
SOSC
32.768kHz
SPI
Watch-Dog Timer
Free Run Timer
16-Bit Timer 0
16-Bit Timer 1
16-Bit Timer 2
16-Bit Timer 3
MPWM
Port A
Port B
Port C
Port D
VDD
VSS
nRESET
BOOT SWCLK SWDIO
XIN
XOUT
SUB XIN
SUB XOUT
VDD
AIN0-AIN11
VSS
RX0
TX0
RX1
TX1
SCL
SDA
MOSI
MISO
SCK
SS
MPWMUH
MPWMUL
MPWMVH
MPWMVL
MPWMWH
MPWMWL
T0IO
T1IO
T2IO
T3IO
A0-A15
C0-C15
D0-D3
B0-B7
PRTIN
OVIN
64/32 Bit Divider
Figure 1.5 Block Diagram

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Functional Description
1.3.2
The following section provides an overview of the features of AC30M1x64/1x32 microcontroller.
ARM Cortex-M0
ARM powered Cortex-M0 Core based on ARMv6M architecture which is optimized for small size and low power system.
On core system timer (SYSTICK) provides a simple 24-bit timer easy to manage the system operation
Thumb-compatible Thumb-2 only instruction set processor core makes code high-density.
Hardware division and single-cycle multiplication is present
Integrated Nested Vectored Interrupt Controller (NVIC) provides deterministic interrupt handling.
SWD debugging features are provided.
Max 40MHz operating frequency with one wait execution
Nested Vector-Interrupt Controller (NVIC)
The ARM Nested Vectored Interrupt Controller (NVIC) on the ARM Cortex-M0 core is included which handles all the
internal and external exceptions. When interrupt condition is detected, the processor state is automatically stored to the
stack and automatically restored from the stack at the end of interrupt service routine.
The vector is fetched in parallel to the state saving, which enables efficient interrupt entry.
The processor supports tail-chaining, which enables back-to-back interrupts to be performed without the overhead of
state saving and restoring.
64/32KB Internal Code Flash Memory
The AC30M1x64/1x32 provides internal 64/32KB code flash memory and its controller. This is enough to program motor
algorithm and general control the system. Self-programming is available and ISP and SWD programming is also supported
in boot or debugging mode.
Instruction and data cache buffer are present and overcome the low bandwidth flash memory. The CPU can access flash
memory with one wait state up to 40 MHz bus frequency.
4KB 0-wait Internal SRAM
On chip 4KB 0-wait SRAM can be used for working memory space and program code can be loaded on this SRAM.
Boot Logic
The smart boot logic supports the flash programming. The AC30M1x64/1x32 can be entered by external boot pin and
UART and SPI programming are available in boot mode. UART0 or SPI is used in boot mode communication.
System Control Unit (SCU)
The SCU block manages internal power, clock, reset and operation mode. It also controls analog blocks (Oscillator Block,
VDC and BOD (LVD))
32-bit Watchdog Timer (WDT)
The watchdog timer performs system monitoring function. It will generate internal reset or interrupt to notice abnormal
status of the system.
Multi-purpose 16-bit Timer
Four-channel 16-bit general purpose timers supports below functions.
- Periodic timer mode - Counter mode
- PWM mode - Capture mode
Built-in timer also supports counter-synchronization mode can generate synchronized waves and timing.

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Motor PWM Generator
3-phase Motor PWM Generator is implemented. 16-bit up/down counter with prescaler supports both of triangular and
saw tooth waveform.
The PWM has ability to generate internal ADC trigger signal to measure the signal on time.
Dead time insertion and emergency stop functionality help that the chip and system are under safety conditions.
Serial Peripheral Interface (SPI)
Synchronous serial communication is provided with SPI block. The AC30M1x64/1x32 has 1 channel SPI module. Boot
mode will use this SPI block to download flash program.
Inter-Integrated Circuit Interface (I2C)
The AC30M1x64/1x32 has 1 channel I2C block and it supports up to 400 kHz I2C communication. The master and the
slave mode are supported.
Universal Asynchronous Receiver/Transmitter (UART)
The AC30M1x64/1x32 has 2 channels UART block. For accurate baud rate control, the fractional baud rate generator is
provided.
General PORT I/Os
16-bit PA, 8-bit PB, 16-bit PC and 4-bit PD ports are available and provide multiple functionality.
- General I/O port
- Independent bit set/clear function
- External interrupt input port
- Programmable pull-up and open-drain selection
- On-chip input debounce filter
12-bit Analog-to-Digital Converter (ADC)
One built-in ADC can convert analog signal up to 1MSPS(sample per second) conversion rate. 12-channel analog MUX
provides various combinations from external analog signals.
Hardware Divider (DIV64)
The divider module provides hardware divider ability to accelerate complicated calculation. This divider is sequential
64bit/32bit divider requires 32 clock cycles for one operation.

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Pin Description1.4
Below pin configuration contains two pair of power/ground pair and other dedicated pins. The multi-function pins have
four selections of functions including GPIO. The configuration including pin ordering can be changed without notice.
Table 1.2 Pin Description
Pin No
Pin Name
Type
Description
Remark
LQFP48
LQFP32/QFN32
1
-
PD0
IOUS
PORT D Bit 0 Input/Output
SS
I/O
SPI Channel Slave Select In/Out
2
-
PC4
IOUS
PORT C Bit 4 Input/Output
T0IO
I/O
Timer 0 Input/Output
3
-
PC5
IOUS
PORT C Bit 5 Input/Output
RXD1
I
Uart RXD1 Input
T1IO
I/O
Timer 1 Input/Output
4
-
PC6
IOUS
PORT C Bit 6 Input/Output
TXD1
O
Uart TXD1 Output
T2IO
I/O
Timer 2 Input/Output
5
3
PB7
IOUS
PORT B Bit 7 Input/Output
OVIN
I
PWM Over-voltage input signal
6
4
PB6
IOUS
PORT B Bit 6 Input/Output
PRTIN
I
PWM Protection Input signal
7
5
PB5
IOUS
PORT B Bit 5 Input/Output
MPWMWL
O
MPWM WL Output
8
6
PB4
IOUS
PORT B Bit 4 Input/Output
MPWMWH
O
MPWM WH Output
9
7
PB3
IOUS
PORT B Bit 3 Input/Output
MPWMVL
O
MPWM VL Output
MISO
I/O
SPI Channel Master In / Slave Out
10
8
PB2
IOUS
PORT B Bit 2 Input/Output
MPWMVH
O
MPWM VH Output
MOSI
I/O
SPI Channel Master Out / Slave In
11
9
PB1
IOUS
PORT B Bit 1 Input/Output
MPWMUL
O
MPWM UL Output
SCK
I/O
SPI Channel CLK In / Out
12
10
PB0
IOUS
PORT B Bit 0 Input/Output
MPWMUH
O
MPWM UH Output
SS
I/O
SPI Channel Slave Select In / Out
13
11
PC14
IOUS
PORT C Bit 14 Input/Output
RXD0
I
Uart RXD0 Input
14
12
PC15
IOUS
PORT C Bit 15 Input/Output
TXD0
O
Uart TXD0 Output
15
13
PC11
IOUS
PORT C Bit 11 Input/Output
BOOT
IU
Boot mode Selection Input
Pull-up
T0IO
I/O
Timer 0 Input/Output
16
-
PC9
IOUS
PORT C Bit 9 Input/Output
CLKO
O
System Clock Output
17
-
PC3
IOUS
PORT C Bit 3 Input/Output
18
-
PC2
IOUS
PORT C Bit 2 Input/Output
19
-
GND
P
GND
20
-
VDD
P
VDD
21
14
PC0
IOUS
PORT C Bit 0 Input/Output
SWCLK
I
SWD Clock Input
Pull-up

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RXD1
I
Uart1 RXD1 Input
22
15
PC1
IOUS
PORT C Bit 1 Input/Output
SWDIO
I/O
SWD Data Input/Output
Pull-up
TXD1
O
Uart1 TXD1 Output
23
16
PC7
IOUS
PORT C Bit 7 Input/Output
SCL
I/O
I2C Channel SCL In/Out
T3IO
I/O
Timer 3 Input/Output
24
17
PC8
IOUS
PORT C Bit 8 Input/Output
SDA
I/O
I2C Channel SDA In/Out
25
-
PA12
IOUS
PORT A Bit 12 Input/Output
T0IO
I/O
Timer 0 Input/Output
26
-
PA13
IOUS
PORT A Bit 13 Input/Output
T1IO
I/O
Timer 1 Input/Output
27
-
PA14
IOUS
PORT A Bit 14 Input/Output
T2IO
I/O
Timer 2 Input/Output
28
-
PA15
IOUS
PORT A Bit 15 Input/Output
T3IO
I/O
Timer 3 Input/Output
29
18
PA0
IOUS
PORT A Bit 0 Input/Output
T2IO
I/O
Timer 2 Input/Output
AIN0
IA
Analog Input 0
30
19
PA1
IOUS
PORT A Bit 1 Input/Output
T3IO
I/O
Timer 3 Input/Output
AIN1
IA
Analog Input 1
31
20
PA2
IOUS
PORT A Bit 2 Input/Output
SS
I/O
SPI Channel Slave Select In / Out
WDTO
O
Watchdog Timer Overflow Output
AIN2
IA
Analog Input 2
32
21
PA3
IOUS
PORT A Bit 3 Input/Output
SCK
I/O
SPI Channel CLK In / Out
STBO
O
Power Down Mode Output
AIN3
IA
Analog Input 3
33
22
PA4
IOUS
PORT A Bit 4 Input/Output
AIN4
IA
Analog Input 4
34
23
PA5
IOUS
PORT A Bit 5 Input/Output
AIN5
IA
Analog Input 5
35
24
PA6
IOUS
PORT A Bit 6 Input/Output
T0IO
I/O
Timer 0 Input/Output
AIN6
IA
Analog Input 6
36
25
PA7
IOUS
PORT A Bit 7 Input/Output
T1IO
I/O
Timer 1 Input/Output
AIN7
IA
Analog Input 7
37
26
PA8
IOUS
PORT A Bit 8 Input/Output
T2IO
I/O
Timer 2 Input/Output
T0IO
I/O
Timer 0 Input/Output
AIN8
IA
Analog Input 8
38
27
PA9
IOUS
PORT A Bit 9 Input/Output
T3IO
I/O
Timer 3 Input/Output
T1IO
I/O
Timer 1 Input/Output
AIN9
IA
Analog Input 9
39
-
PA10
IOUS
PORT A Bit 10 Input/Output
AIN10
IA
Analog Input 10
40
-
PA11
IOUS
PORT A Bit 11 Input/Output
AIN11
IA
Analog Input 11

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41
28
PC10
IOUS
PORT C Bit 10 Input/Output
nRESET
IU
External Reset Input
Pull-up
42
29
VDD
P
VDD
43
30
GND
P
GND
44
31
PC13
IOUS
PORT C Bit 13 Input/Output
T2IO
I/O
Timer 2 Input/Output
XOUT
OA
External Crystal Oscillator Output
45
32
PC12
IOUS
PORT C Bit 12 Input/Output
T3IO
I/O
Timer 3 Input/Output
XIN
IA
External Crystal Oscillator Input
46
1
PD3
IOUS
PORT D Bit 3 Input/Output
MISO
I/O
SPI Channel Master In / Slave Out
SDA
I/O
I2C Channel SDA In/Out
SXIN
I
External Crystal Sub Oscillator Input
47
2
PD2
IOUS
PORT D Bit 2 Input/Output
MOSI
I/O
SPI Channel Master Out / Slave In
SCL
I/O
I2C Channel SCL In/Out
SXOUT
OA
External Crystal Sub Oscillator Output
48
-
PD1
IOUS
PORT D Bit 1 Input/Output
SCK
I/O
SPI Clock Input/Output
*Notation: I=Input, O=Output, U=Pull-up, D=Pull-down,
S=Schmitt-Trigger Input Type, C=CMOS Input Type, A=Analog, P=Power
Pin order may be changed with revision notice

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Memory Map1.5
0x4000 0000 SCU
0x4000 0500
0x4000 0700
0x4000 1000
0x4000 3000
0x4000 5000
0x4000 FFFF
64/32 DIVIDER
PCU
0x4000 B000
FMC
0x4000 0100
WDT
0x4000 0200
0x4000 0300
FRT
0x4000 0600
GPIO
0x4000 2000
TIMER
MPWM
0x4000 4000
0x4000 8000
0x4000 A000
UART
SPI
0x4000 9000
I2C
ADC
0x4000 C000
0x0000 0000
MIRROR
CODE
0x2000 0000
0x4000 0000
0x6000 0000
0x8000 0000
0xA000 0000
0xC000 0000
0xE000 0000
0xFFFF FFFF
SRAM(4KB)
Peripherals
Reserved
Cortex-M0
Peripherals
0xE010 0000
0x0000 0000
CODE
0x0F00 0000
0x1FFF 0000
0x1FFF FFFF
SRAM
BOOT ROM(2KB)
FLASH ROM(64/32KB)
0x0001 0000
OTP
0x0F00 0600
0x1FFF 0800
0x3000 0000
CODE
0x3E00 0000
0x3FFF FFFF
SRAM
OTP MIRROR
FLASH ROM MIRROR
(64KB)
0x3001 0000
BOOT ROM MIRROR
(2KB)
0x3F00 0000
0x3E00 0800
0x3000 0000
0x3F00 0600
Figure 1.6 Memory Map

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AC30M1x64/1x32
CPUCHAPTER 2.

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CPU
Cortex-M0 Core2.1
CPU core is supported from the ARM Cortex-M0 processor which provides a high-performance, low-cost platform.
Document DDI0432C from ARM provides detail information of Cortex-M0.

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AC30M1x64/1x32
Interrupt Controller2.2
Table 2.1 Interrupt Vector Map
Priority
Vector Address
Interrupt Source
-16
0x0000_0000
Stack Pointer
-15
0x0000_0004
Reset Address
-14
0x0000_0008
NMI Handler
-13
0x0000_000C
Hard Fault Handler
-12
0x0000_0010
MPU Fault Handler
-11
0x0000_0014
BUS Fault Handler
-10
0x0000_0018
Usage Fault Handler
-9
0x0000_001C
Reserved
-8
0x0000_0020
-7
0x0000_0024
-6
0x0000_0028
-5
0x0000_002C
SVCall Handler
-4
0x0000_0030
Debug Monitor Handler
-3
0x0000_0034
Reserved
-2
0x0000_0038
PenSV Handler
-1
0x0000_003C
SysTick Handler
0
0x0000_0040
LVDFAIL
1
0x0000_0044
SYSCLKFAIL
2
0x0000_0048
MOSCFAIL
3
0x0000_004C
SOSCFAIL
4
0x0000_0050
WDT
5
0x0000_0054
TIMER0
6
0x0000_0058
TIMER1
7
0x0000_005C
TIMER2
8
0x0000_0060
TIMER3
9
0x0000_0064
FRT
10
0x0000_0068
GPIOAE
11
0x0000_006C
GPIOAO
12
0x0000_0070
GPIOBE
13
0x0000_0074
GPIOBO
14
0x0000_0078
GPIOCE
15
0x0000_007C
GPIOCO
16
0x0000_0080
GPIODE
17
0x0000_0084
GPIODO
18
0x0000_0088
MPWM
19
0x0000_008C
MPWMPROT
20
0x0000_0090
MPWMOVV
21
0x0000_0094
I2C
22
0x0000_0098
SPI