ADLINK Technology ACL-7130 User manual

ACL-7130
32 Channels Isolated
Digital I/O Card

@Copyright 1996~1998 ADLink Technology Co., Ltd.
All Rights Reserved.
Manual Rev. 3.21: October 21, 1999
The information in this document is subject to change without prior notice in
order to improve reliability, design and function and does not represent a
commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or inability to use
the product or documentation, even if advised of the possibility of such
damages.
This document contains proprietary information protected by copyright. All
rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of the manufacturer.
Trademarks
ACL-7130 is registered trademarks of ADLink Technology Inc., Advantech
and PCL-730 is a trademark of Advantech Co., Ltd. IBM PC is a registered
trademark of International Business Machines Corporation. Intel is a registered
trademark of Intel Corporation. Other product names mentioned herein are
used for identification purposes only and may be trademarks and/or registered
trademarks of their respective companies.

Contents • i
CONTENTS
CONTENTS........................................................................................................I
HOW TO USE THIS MANUAL....................................................................III
INTRODUCTION ..............................................................................................1
1.1 FEATURES..............................................................................................2
1.2 APPLICATIONS.......................................................................................2
1.3 SPECIFICATIONS.....................................................................................3
INSTALLATION................................................................................................5
2.1 WHAT YOU HAVE..................................................................................5
2.2 UNPACKING...........................................................................................6
2.3 ACL-7130'SLAYOUT ............................................................................7
2.4 JUMPER AND DIP SWITCH DESCRIPTION ...............................................8
2.5 BASE ADDRESS SETTING .......................................................................8
2.6 INTERRUPT SETTING............................................................................11
2.7 SETTING OF IRQ SIGNAL SOURCE .......................................................13
2.8 SETTING OF LOWER IRQ SIGNAL POLARITY (JP4) ..............................14
2.9 SIGNAL CONNECTION ..........................................................................14
2.10 COUNTER SIGNALS CONNECTOR (JP5)................................................17
2.11 ACL-7130 SOFTWARE LIBRARY INSTALLATION .................................18
REGISTER STRUCTURE & PROGRAMMING.........................................19
3.1 I/O REGISTERS FORMAT......................................................................19
3.2 DIGITAL INPUT REGISTER....................................................................20
3.3 DIGITAL OUTPUT REGISTER ................................................................20
3.4 TIMER/COUNTER REGISTERS...............................................................21
3.5 LOW-LEVEL PROGRAMMING................................................................21
3.6 PROGRAMMABLE INTERVAL TIMER.....................................................26
3.6.1 The Intel (NEC) 8254.........................................................................26
3.6.2 The Control Byte................................................................................26
3.6.3 Mode definition..................................................................................29
3.7 PROGRAMMING IN HIGH LEVEL LANGUAGE........................................31
APPENDIX A. I/O PORT ADDRESS MAP ..................................................33

ii • Introduction
APPENDIX B. DIGITAL I/O SIGNAL CONNECTION..............................34
B.1 ISOLATED DIGITAL INPUT CHANNELS..................................................34
B.2 ISOLATED DIGITAL OUTPUT CHANNELS ..............................................34
B.3 DIGITAL I/O CHANNELS ......................................................................35
PRODUCT WARRANTY/SERVICE.............................................................37

How to Use This Manual • iii
How to Use This Manual
This manual is designed to help you use the ACL-7130. The
manual describes how to modify various settings on the ACL-
7130 card to meet your requirements. It is divided into five
chapters:
•Chapter 1, "Introduction," gives an overview of the product
features, applications, and specifications.
•Chapter 2, "Installation," describes how to install the ACL-
7130. The layout of ACL-7130 is shown, the DIP switch
setting for base address, and jumpers setting for interrupt
trigger, and trigger mode are specified.
•Chapter 3, "Register Structure & Programming," describes
how to program the ACL-7130 for digital I/O and
timer/counter.
•Appendix A, "I/O Port Address Map", gives an overview I/O
address map.
•Appendix B, "Digital I/O Signal Connection,"describes how
to connect the external signal with ACL-7130's isolated and
non-isolateddigital.

Introduction • 1
1
Introduction
The ACL-7130 is an isolated digital I/O card. It is a compact-size
add-on card for IBM AT compatible PC. The card provides 16
isolated input and 16 isolated output channels. The isolated
channels are suitable for applications in the industry environment.
There are another 16 non-isolated digital input and output
channels. It lets users to use the card more flexibles.
The card provides dual interrupt lines. One is generated by the
external digital signals and the other is generated from the 8254
timer. The dual interrupt lines are very usable in industrial
applications of watchdog and trigger signal monitoring.
This card provides one 8254 chips on board. Two 8254 counters
are cascaded to provide a timer interrupt source. Users can
freely use the another counter.
The I/O signals are via a 37 pin D-type connector that project
through the computer case at the rear of the board. Also, two
non-isolated digital I/O connectors are on-board, which can
connect with the daughter board - ACLD-9182 and ACLD-9185
directly.

2 • Introduction
1.1 Features
The ACL-7130 Isolated D/I Card provides the following advanced
features:
•16 isolated digital input and output channels
•16 non-isolated digital input and output channels
•One 8254 chip on board which provide a set of cascaded
timers and one independent counter
•Dual interrupt channels, one is for external interrupt and the
other is for on board timer interrupt.
•Use 37-pin D-type female connector.
•AT-Bus and Compact / Half size PCB
•Fully compatible with Advantech's PCL-730
1.2 Applications
•Laboratory and Industrial automation
•Watchdog timer
•Event counter
•Frequency counter and generator
•Low level pulse generator
•Time delay
•Industryautomation

Introduction • 3
1.3 Specifications
♦ General Specification
•Dimensions : 193 mm x 103 mm
•Bus : PC-AT bus
•Slot : One 36 pin slot and one 62-pin slot
•I/O port address : Hex 200 ~ Hex 3F8 (8 bytes)
•Connector : One DB-37 for Isolated DIO
Two 20-pin flat-cable for TTL DIO
•Interrupt IRQ :IRQ 3,4,5,6,7 for external digital interrupt
IRQ 9,10,11,12,15 for internal timer interrupt
•Temperature : 0 ~ 50°C (operating)
•Humidity : 0 to 90% non-condensing
•Power Consumption :
5V @ 350mA
♦ Isolated Digital Output
•No. of channels : 16 channels
•Electronical characteristics : Open collector transistor
•Output Voltage : open collector 5 to 40VDC
•Sink Current : 200mA
•Isolation Voltage : 2,500 VDC
•Max. Throughput : 10KHz
♦ Isolated Digital Input
•No. of channels : 16 channels
•Electronical characteristics : Non-polarity photo-coupler
•Input Voltage : 5 to 24VDC
•Input Resistance : 470 Ohm @ 1W

4 • Introduction
•Isolation Voltage : 2,500 VDC
•Max. Throughput : 10KHz
♦ Non-isolated Digital Input
•Input logic low voltage :Min. -0.5V; Max. 0.8V
•Input logic high voltage :Min. 2.0V; Max. 5.0V
•Input loading current :Max. 0.2 mA at 0.4V
•Input hysteresis :Typical 0.4V; Min. 0.2V
•Max. Throughput : 30KHz
♦ Non-isolated Digital Output
•Input logic low voltage (Sink):Max. 0.5V at 24mA;
•Input logic high voltage (Source) :Max. 0.4V at 12mA
•DrivingCapacity :All inputs and outputs are TTL/DTL compatible
and outputs will drive 1 standard TTL load (74
series) or 4 LSTTL (74LS) loads
•Input hysteresis :Typical 0.4V; Min. 0.2V
♦ Programmable Counter :
•Chips :8254
•Frequency :2MHz
•Counter :three 16-bit counters ( counter0 ~ counter 2)
•Mode :6 programmable modes
•Usable pins :CLK and GATE for counter 0 (JP5)
•counter usage :counter 0 is flexible for users counter 1 and
counter 2 are cascaded together for timer pacer
generation.

Installation • 5
2
Installation
This chapter describes the configurations and multi-functions of
the ACL-7130 and teach users to install the ACL-7130. At first,
the contents in the package and unpacking information that you
should care about are described. The versatile configurations of
ACL-7130 are introduced so that you can configure it according
to your applications. The default setting of ACL-7130 is shown at
the end of this chapter.
2.1 What You Have
In addition to this User's Manual, the package includes the
following items:
•ACL-7130 Isolated Digital I/O Card
•Manual & Software Utility CD
If any of these items is missing or damaged, contact the dealer
from whom you purchased the product. Save the shipping
materials and carton in case you want to ship or store the
product in the future.

6 • Installation
2.2 Unpacking
Your ACL-7130 card contains sensitive electronic components
that can be easily damaged by static electricity.
The card should be done on a grounded anti-static mat. The
operator should be wearing an anti-static wristband, grounded at
the same point as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping
and handling may cause damage to your module. Be sure there
are no shipping and handing damages on the module before
processing.
After opening the card module carton, extract the system module
and place it only on a grounded anti-static surface component
side up.
Again inspect the module for damage. Press down on all the
socketed IC's to make sure that they are properly seated. Do this
only with the module place on a firm flat surface.
Note : DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN
DAMAGED.
You are now ready to install your ACL-7130.

Installation • 7
2.3 ACL-7130's Layout
CN1
N
2
SW1
JP4
JP5 CLK0
GATE0 OUT0 OUT1
GND
JP1
13
0
JP2
CN4
CN3
JP3 JP6
Figure 2.1 PCB Layout
Note: CN4 is for Rev A only
JP6 is for Rev B only

8 • Installation
2.4 Jumper and DIP Switch Description
You can change the ACL-7130's channels and base address by
setting jumpers and DIP switches on the card. The card's
jumpers and switches are preset at the factory. Under normal
circumstances, you should not need to change the jumper
settings.
A jumper switch is closed (sometimes referred to as "shorted")
with the plastic cap inserted over two pins of the jumper. A
jumper is open with the plastic cap inserted over one or no pin(s)
of the jumper.
2.5 Base Address Setting
The ACL-7130 requires 8 consecutive address locations in the
I/O address space. The base address of the ACL-7130 is
restricted by the following conditions.
1. The base address must be within the range Hex 200 to Hex
3FF.
2. The base address should not conflict with any PC reserved
I/O address.
3. The base address must not conflict with any add-on card on
your own PC. Please check your PC before installing the
ACL-7130.
The ACL-7130's base address of registers is selected by an 6
position DIP switch SW1. The default setting of base address is
set to be HEX 300.All possible base address combinations are
listed as Table 2.2. You may modify the base address if the
address HEX 300 has been occupied by another add-on card.

Installation • 9
ON
123456
A ( 8 7 6 5 4 3 )
SW1
BASE_ADDR. = Hex 300
Figure 2.2 Default Base Address Setting
I/O port
Address(Hex) 1 A8 2 A7 3 A6 4 A5 5 A4 6 A3
200-207 ON
(0) ON (0) ON (0) ON (0) ON (0) ON (0)
208-20F ON
(0) ON (0) ON (0) ON (0) ON (0) OFF
(1)
210-217 ON
(0) ON (0) ON (0) ON (0) OFF (1) ON (0)
218-21F ON
(0) ON (0) ON (0) ON (0) OFF (1) OFF (1)
: : : : : : :
2F8-2FF ON
(0) OFF
(1) OFF (1) OFF (1) OFF (1) OFF (1)
300-307
(default) OFF
(1) ON (0) ON (o) ON (0) ON (0) ON (0)
308-30F OFF
(1) ON (0) ON (0) ON (0) ON (0) OFF (1)
: : : : : : :
3F0-3F7 OFF
(1) OFF (1) OFF (1) OFF (1) OFF (1) ON
(0)
3F8-3FF OFF
(1) OFF (1) OFF (1) OFF (1) OFF (1) OFF (1)
* A3, ..., A8 is corresponding to PC Bus address lines
Table 2.1 Possible Base Address Combinations

10 • Installation
How to Define a Base Address for the ACL-7130 ?
The DIP1 to DIP6 in the switch SW1 are one to one corresponding to the PC
bus address line A9 to A4. A0, A1, and A2 are always 0 and A9 is always 1. If
you want to change the base address, you can only change the values of A8 to
A3 (shadow area of below table). The following table is an example, which
shows you how to define the base address as Hex 300.
Base Address : Hex 300
3 0 0
1 1 0 0 0 0 0 0 0 0
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
2.6 Interrupt Setting
The ACL-7130 offers AT Bus interrupt levels (IRQ3 ~ IRQ15),
also a dual interrupt lines are supported. One is generated by
the external digital signals and the other is generated from the
8254 timer on board.
3 4 5 6 7
JP1
NC
9 10111215
JP2
NC
Lower IRQ
Higher IRQ
(From External Digital I/O Signals)
(From Internal Timer Pacer for ACL-7130)
(From JP6 for ACL-7130A)
The lower interrupt IRQ can be set as IRQ3~IRQ7 by Jumper
JP1. It is illustrated as figure 2.3. The second interrupt IRQ can

Installation • 11
be set as IRQ9~IRQ15 by jumper JP2. It is illustrated as figure
2.4.
Both of lower and higher IRQ can generate interrupt
simultaneously.
The external digital signals can trigger the interrupt through lower
interrupt setting. There are four different digital I/O signals can be
used as interrupt trigger sources, also the trigger mode is either
fall-edge or rising-edge trigger.
Note : Both lower and higher IRQ can be set simultaneously. And, two
different IRQ can be generated by using ACL-7130.
Be aware that there is no other add-on card shares the same
interrupt level at the same system.
IRQ1 34567
JP1
NC
Figure 2.3 JP1 Setting for lower IRQ
IRQ2 910 11 12 15
JP2
NC
Figure 2.4 JP2 Setting for higher IRQ

12 • Installation
2.7 Setting of IRQ Signal Source
The lower Interrupt IRQ source (JP3) can be set as either
IDI_0 : Isolated Digital Input channel 0, or
IDI_1 : Isolated Digital Input channel 1, or
DI_0 : Digital Input 0, or
DI_1 : Digital Input 1.
The jumper JP4 is used for signal source selection.
DI_0IDI_0 DI_1IDI_1
JP3
Figure 2.5-1 Jumper JP3 setting
The higher IRQ source (JP6) can be set as either
OUT1: Timer Pacer Output
IDI_0 : Isolated Digital Input channel 0, or
IDI_1 : Isolated Digital Input 1, or
DI_1 : Digital Input 1.
IDI_1OUT1 DI_1IDI_0
JP6
Figure 2.5-2 Jumper JP6 setting

Installation • 13
2.8 Setting of Lower IRQ Signal Polarity (JP4)
The Interrupt signal can be selected as Fall Edge trigger or Rise
Edge trigger. It can be set as jumper JP4.
Fall Edge
JP4
Rise Edge
Figure 2.6 Jumper JP4 setting
2.9 Signal Connection
There are three DIO connector. The pin assignment of the 37
pins D-type connector CN3, which is an isolated DIO signal
connector, is shown in Figure 2.7. The definitions of the non-
isolated DIO signal connectors CN1 and CN2 are shown is
Figure 2.8 and Figure 2.9 respectively.

14 • Installation
(1)
(9)
(8)
(7)
(6)
(5)
(2)
(3)
(4)
(14)
(10)
(13)
(11)
(12)
(19)
(15)
(18)
(16)
(37)
(24)
(23)
(21)
(22)
(20)
(25)
(28)
(26)
(27)
(29)
(34)
(30)
(33)
(31)
(32)
(35)
(36)
(17)
EIGND
IDI_0
IDI_5
IDI_2 IDI_1
IDI_3
IDI_7
IDI_6
IDI_8 IDI_9
IDI_10 IDI_11
IDI_12
IDI_15
IDI_14 IDI_13
IDI_4
ID0_0
EOGND
EOGND
EOGND
ID0_1
ID0_4
ID0_2
ID0_6
ID0_3
ID0_8
ID0_10
ID0_12
ID0_14
ID0_7
ID0_5
ID0_9
ID0_11
ID0_15
ID0_13
VDD
Legend:
IDI_n : Isolated digital input channel #n
IDO_n : Isolated digital output channel #n
EIGND :Ground return path of isolated input channels
EOGND :Ground return path of isolated output channels
VDD : Power supply of isolated output channels
Figure 2.7 Pin assignment of Connector CN3