DP5 User Manual Rev A1
The peak of the “baseline” of a digital processor has some significant differences from traditional analog
shaping amplifiers. Because the DPP’s transfer function has a finite impulse response, after a pulse has
passed through the processing pipeline it has no impact on the output. This is fundamentally different from
an analog differentiator and results in vastly enhanced baseline stability at high count rates. However, unlike
analog shapers the DPP has to establish a DC baseline, at all count rates, and in practice some shifts with
count rate are observed.
The DPP has an asymmetric baseline restorer with several different settings. The DPP BLR uses the
negative peaks from random noise to determine the baseline. The negative-going noise peaks only occur in
the absence of a signal, so if these are stable, then the baseline is stable, independent of counts. The BLR
generally produces an offset comparable to the rms noise value. There are two independent parameters, UP
and DOWN, each of which can be set to four values: Very Slow, Slow, Medium, and Fast. These are
essentially slew rates in the baseline response. A setting of Very Fast for both UP and DOWN means that
the BLR will respond very rapidly to any measured variation in the baseline. It must be stressed that the
optimum setting depends strongly on the details of a particular application: the nature of the baseline drifts,
etc. If the peaks are found to shift to lower channels at high count rates, then increase the UP slew rate or
decrease the DOWN slew rate. If one observes occasional “bursts” in the system which cause the spectrum
to shift to higher channels (often manifesting as bursts of noise above the threshold), then decrease the UP
slow rate or increase the DOWN slew rate.
2.3.2 Pulse Selection
Thresholds
The DPP uses thresholds to identify pulses. Both fast and slow channels have their own independent
thresholds. Noise is usually higher in the fast channel, and it is best to set the thresholds just above the
noise, so they will be different in the two channels. The DPP uses the Slow Channel Threshold to identify
events that should be added to the stored spectrum. Events with an amplitude lower than the Slow Channel
Threshold are ignored – they do not contribute to the stored spectrum. The slow channel threshold is the
equivalent of a low-level discriminator (LLD).
The Fast Channel Threshold also functions as an LLD and is used for several functions. (1) The rate of
events over the fast threshold is the DPP’s measurement of the incoming count rate (ICR). (2) Pile-Up
Rejection (PUR) logic identifies events which overlap in the slow channel but are separated in the fast
channel. (3) Rise Time Discrimination (RTD) uses the amplitude of the fast channel signal to measure the
current at the beginning of a pulse. PUR and RTD are discussed in more detail below.
Properly setting these thresholds is very important for getting the best performance from the DPP.
Under most circumstances, the thresholds should be set just above the noise, and the ADMCA software
includes an “AutoTune” function to set these. Improperly set thresholds are responsible for a large number
of problems reported by customers. If the fast channel threshold is too low, for example, and PUR is
enabled, then every event will be rejected and so there appears to be no signal. If the slow channel
threshold is too high, then it is also possible to reject all events.
Pile-Up Rejection
The goal of the pile-up reject (PUR) logic is to determine if two interactions occurred so close together in
time that they appear as a single output pulse with a distorted amplitude. The DPP PUR uses a “fast-slow”
system, in which the pulses are processed by a fast shaping channel in parallel with the slower main channel
(both channels are purely digital). Though similar in principle to the techniques of an analog shaper, the pile-
up reject circuitry and the dead time of the DPP differ in significant ways, resulting in much better
performance at high count rates. First, the symmetry of the shaped pulse permits the dead time and pile-up
interval to be much shorter. Second, there is no dead time associated with peak acquisition and digitization,
only that due to the pulse shaping.
Figure 2-7 illustrates the operation of the DP4 for pulses that occur close in time. Figure 2-7 (a) shows
two events that are separated by less than the rise time of the shaped signal, while Figure 2-7 (b) shows two
pulses that are separated by slightly longer than the rise time. In (a), the output is the sum of the two signals
(note that the signal amplitude is larger than the individual events in (b)) and the events are said to be piled
up. However, note that the analog prefilter outputs in (a) are separate. For a nearly triangular shape, pile-up
only occurs if the two events are separated by less than the peaking time, in which case a single peak is
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