Analog Devices AD5758 User manual

EVAL-AD5758 User Guide
UG-1268
One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: [phone] •Fax: [phone] •www.analog.com
Evaluating the AD5758 Single-Channel, 16-Bit Current and Voltage Output DAC with
Dynamic Power Control and HART Connectivity
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 20
FEATURES
Full featured evaluation board for the AD5758
On-board 2.5 V ADR4525 reference
SPI
ACE software for control
EVALUATION KIT CONTENTS
EVAL-AD5758SDZ evaluation board
EVAL-SDP-CS1Z
EQUIPMENT NEEDED
EVAL-SDP-CS1Z
Bench top power supply and connector cables
DOCUMENTS NEEDED
AD5758 data sheet
EVAL-AD5758SDZ evaluation board user guide
ACE User Manual
SOFTWARE NEEDED
ACE software for control
GENERAL DESCRIPTION
This user guide describes the evaluation board for the AD5758,
a functional safety certified, single-channel, voltage and current
output, digital-to-analog converter (DAC) with on-chip dynamic
power control (DPC) that minimizes package power dissipation.
For full details on the AD5758, refer to the AD5758 data sheet.
Consult the data sheet when using the EVAL-AD5758SDZ. The
configuration of the various link options is explained in the
Evaluation Board Hardware section. The installation of the
companion software is discussed in the Software Quick Start
Procedures section.
The EVAL-AD5758SDZ, shown in Figure 1, requires the EVAL-
SDP-CS1Z board. The EVAL-AD5758SDZ interfaces to the USB
port of the PC via the EVAL-SDP-CS1Z board. Software that
allows the user to easily program the AD5758, namely the
Analysis|Control|Evaluation (ACE) software, is available with
the EVAL-AD5758SDZ.
EVALUATION BOARD PHOTOGRAPH
16710-001
Figure 1.

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents................................................................... 1
Equipment Needed........................................................................... 1
Documents Needed.......................................................................... 1
Software Needed ............................................................................... 1
General Description..................................................................... 1
Evaluation Board Photograph......................................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware............................................................ 3
Power Supplies .............................................................................. 3
Serial Communication................................................................. 3
AD5758 Device Under Test (DUT) Address Pins........................ 3
Software Quick Start Procedures.................................................... 5
Installing the Analysis|Control| Evaluation (ACE) Software
and AD5758 Plug-Ins ................................................................... 5
Initial Setup ................................................................................... 5
AD5758 Block Diagram and Functions..........................................7
Initial Configuration.....................................................................9
DC-to-DC Converter Settings.....................................................9
Setting the DAC Output............................................................ 10
Writing to the ADC Configuration Register .......................... 10
Updating Diagnostic Results .................................................... 10
Example Sequences .................................................................... 11
ACE Tool Views.............................................................................. 12
Macro Tool .................................................................................. 12
Register Debugger Tool ............................................................. 12
Events Tool .................................................................................. 12
Evaluation Board Schematics and Artwork................................ 13
Ordering Information.................................................................... 19
Bill of Materials........................................................................... 19
REVISION HISTORY
5/2018—Revision 0: Initial Version

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 3 of 20
EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-AD5758SDZ evaluation board requires a number of
power supply inputs for AVDD1, AVDD2, AVSS, and VLOGIC. AVDD2
can be connected to AVDD1 via the AVDD1-AVDD2-SHRT link
if there is only one positive rail available. The VLOGIC supply can
be selected from 3.3V_SDP, VLDO, or EXT-VLOGIC through the
VLOGIC_SOURCE link. See Table 1 for more link options. See
Table 3 for the default link positions.
The EVAL-AD5758SDZ evaluation board operates with a power
supply range from −33 V on AVSS to +33 V on AVDD1, with a
maximum voltage between the two rails of 60 V. AVDD2 requires
a voltage between 5 V and 33 V. VDPC+ can be driven by AVDD1
via Jumper JP6. Jumper JP6 bypasses the dc-to-dc circuitry.
SERIAL COMMUNICATION
The EVAL-SDP-CS1Z (SDP-S) system demonstration platform
handles communication to the EVAL-AD5758SDZ via the PC.
By default, the SDP-S handles the serial port interface (SPI)
communication, controls the RESET and LDAC pins, and
monitors the FAULT pin of the AD5758.
The EVAL-AD5758SDZ evaluation board has the option to
disconnect from the SDP-S and drive the digital signals from an
external source by removing the appropriate links on P2. An
option to tie RESET and LDAC to high or low levels can be
accessed through the S1 and JP11 links.
AD5758 DEVICE UNDER TEST (DUT) ADDRESS PINS
The DUT address pins, AD0 and AD1, are used in conjunction
with the DUT address bits within the SPI frame to determine
which AD5758 device is being addressed by the system controller.
AD0 and AD1 can be configured through JP12 and JP14.
Table 1. EVAL-AD5758SDZ Link Option Functions
Link Function
AVDD1-AVDD2-SHRT Connects AVDD2 to AVDD1.
VLOGIC_SOURCE Position A selects 3.3 V from the SDP-S. Position B selects 3.3 V from the VLDO pin of the AD5758. Position C selects
the external logic supply, EXT-VLOGIC.
JP1 Position A powers ADR-REF from EXT_REF_VIN. Position B powers ADR-REF from AVDD2 (the maximum supply for
the ADR4525 is 15 V).
JP2 Selects ADR-REF as the input to REFIN.
JP3 Selects EXT-REF as the input to REFIN.
JP4 Selects REFOUT as the input to REFIN.
JP6 Shorts VDPC+ to AVDD1, bypassing the positive dc-to-dc circuitry.
JP8 Connects VIOUT to + VSENSE.
JP9 Connects the RETURN signal to GND.
JP10 Connects –VSENSE to the RETURN signal.
JP11 Position A connects LDAC to GND. Position B connects LDAC to VLOGIC.
JP12 Position A connects AD0 to GND. Position B connects AD0 to VLOGIC.
JP14 Position A connects AD1 to GND. Position B connects AD1 to VLOGIC.
JP17 Connects AVSS to GND for the unipolar supply option (current output only).
P2 Provides options to disconnect from the SDP-S and to drive digital signals from an external source. See Table 2 for
the specific link options.
S1 Position 2-1 (on position to the right of off) connects RESET to GND. Position 2-3 (on position to the left of off)
connects RESET to VLOGIC.

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 4 of 20
Table 2. Link Options for Link P2
Pin No. Position Function
1, 2 Inserted Connects the FAULT signal from the SDP-S to the FAULT pin on the AD5758
Not inserted Disconnects the FAULT signal from the SDP-S to the FAULT pin on the AD5758
3, 4 Inserted Connects the RESET signal from the SDP-S to the RESET pin on the AD5758
Not inserted Disconnects the RESET signal from the SDP-S to the RESET pin on the AD5758
5, 6 Inserted Connects the LDAC signal from the SDP-S to the LDAC pin on the AD5758
Not inserted Disconnects the LDAC signal from the SDP-S to the LDAC pin on the AD5758
7, 8 Inserted Connects the SCLK signal from the SDP-S to the SCLK pin on the AD5758
Not inserted Disconnects the SCLK signal from the SDP-S to the SCLK pin on the AD5758
9, 10 Inserted Connects the SDO signal from the SDP-S to the SDO pin on the AD5758
Not inserted Disconnects the SDO signal from the SDP-S to the SDO pin on the AD5758
11, 12 Inserted Connects the SDI signal from the SDP-S to the SDI pin on the AD5758
Not inserted Disconnects the SDI signal from the SDP-S to the SDI pin on the AD5758
13, 14 Inserted Connects the SYNC signal from the SDP-S to the SYNC pin on the AD5758
Not inserted Disconnects the SYNC signal from the SDP-S to the SYNC pin on the AD5758
Table 3. Default Link Positions
Link Position Function
AVDD1-AVDD2-SHRT Not inserted Connects AVDD2 to AVDD1
VLOGIC_SOURCE A Selects 3.3 V from the SDP-S
JP1 B Powers ADR-REF from AVDD2
JP2 Inserted Selects ADR-REF as the input to REFIN
JP3 Not inserted Selects EXT-REF as the input to REFIN
JP4 Not inserted Selects REFOUT as the input to REFIN
JP6 Not inserted Connects VDPC+ to AVDD1, bypassing the positive dc-to-dc circuitry
JP8 Inserted Connects VIOUT to +VSENSE
JP9 Inserted Connects the RETURN signal to AGND
JP10 Inserted Connects –VSENSE to the RETURN signal
JP11 A
Ties the LDAC signal to DGND
JP12 A Connects AD0 to DGND
JP14 A Connects AD0 to DGND
JP17 Not inserted Connects AVSS to AGND for the unipolar supply option
P2 All links inserted Connects all available signals from the SDP-S to the AD5758
S1 On
Connects the RESET signal to VLOGIC

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 5 of 20
SOFTWARE QUICK START PROCEDURES
INSTALLING THE ANALYSIS|CONTROL|
EVALUATION (ACE) SOFTWARE AND AD5758
PLUG-INS
The EVAL-AD5758SDZ software uses the Analog Devices, Inc.,
ACE software. For instructions on how to install and use the
ACE software, go to www.analog.com/ACE.
After the installation finishes, the EVAL-AD5758SDZ
evaluation board plug-in appears when opening the ACE
software (see Figure 2).
16710-002
Figure 2. EVAL-AD5758SDZ Evaluation Board Plugin Window after Opening
the ACE Software
INITIAL SETUP
To set up the EVAL-AD5758SDZ, take the following steps:
1. Connect a USB cable to the PC and then to the EVAL-SDP-
CS1Z (SDP-S).
2. Connect the EVAL-SDP-CS1Z (SDP-S) to the EVAL-
AD5758SDZ. The PC recognizes the EVAL-AD5758SDZ.
3. Power up the EVAL-AD5758SDZ with the relevant power
supplies.
4. If not opened already, open the ACE software. The EVAL-
AD5758SDZ appears in the Attached Hardware section.
16710-003
Figure 3. EVAL-AD5758SDZ Plug-In Not Installed
5. When setting up the evaluation board for the first time, the
EVAL-AD5758SDZ plug-in may need to be installed. If the
plug-in appears as shown in Figure 6, then go to Step 7. If
the plug-in appears as shown in Figure 3, then click on the
button circled in red in Figure 3. After clicking this button,
the pop-up window shown in Figure 4 appears. Click yes.
16710-004
Figure 4. Installing the Plug-In Pop-Up Window

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 6 of 20
6. A new window appears as shown in Figure 5. Find the
Board.AD5758 plug-in and click the Install Selected button.
The EVAL-AD5758SDZ plug-in is now installed and is
displayed as shown in Figure 6.
16710-205
Figure 5. Plug-In Manager Window
16710-206
Figure 6. Attached Hardware Section when the EVAL-AD5758SDZ is
Connected
7. Double-click EVAL-AD5758SDZ to open the AD5758
block diagram (see Figure 7). The INITIAL CONFIG-
URATION menu appears on the left. This location is
where several register settings can be configured and are
written to the device in the appropriate order. The DIG_
DIAG_STATUS, RESET_OCCURED, and CAL_MEM_
UNREFRESHEDLED indicators are highlighted red by
default. Writing the initial configuration values clears these
error flags. If the device is power cycled, or if the USB cable
is disconnected and reconnected while the ACE software is
open, contact with the EVAL-AD5758SDZ may be lost. If
contact is lost, click the System tab. Then, click the USB
symbol on the EVAL-AD5758SDZ, and then click Acquire
to communicate with the EVAL-AD5758SDZ again.
16710-105
Figure 7. AD5758 Block Diagram in the ACE Software

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 7 of 20
AD5758 BLOCK DIAGRAM AND FUNCTIONS
The AD5758 ACE plug-in is organized so that it appears similar
to the block diagram shown in the AD5758 data sheet. In this
way, it is easy to correlate the functions on the EVAL-AD5758SDZ
with the descriptions in the AD5758 data sheet.
A full description of each block and register setting is available
in the AD5758 data sheet. The full screen AD5758 block diagram,
with labels, is shown in Figure 8. Table 4 describes the
functionality of each block.
16710-006
L1
L2
L3
L4
L5
O
N
M
L10
L11
L6 L10
L7
L8
L9
F
G
H
I
Q R S
V
A B C D E
K
L13
P
L14 L15
T
U
W
Figure 8. AD5758 Block Diagram with Labels

UG-1268 EVAL-AD5758 User Guide
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Table 4. AD5758 Block Diagram Label Functions (See Figure 8)
Label Function
A To apply any changes made to the block diagram or to register values in the memory map to the device, click Apply Changes.
B To read back all of the registers of the device, click Read All.
C Click Reset Chip to reset the AD5758. Reset Chip has the same functionality as the software reset of the AD5758.
D Click Diff to show the registers that are different from the data stored on the device. This function shows what changed since the
last time the registers were read.
E Click Software Defaults to load the software defaults of the device. These values are not written to the hardware. Click Apply
Changes (Label A) to write the software default values to the hardware.
F The AD0 and AD1 check boxes set the DUT address of the device and must correspond to JP12 and JP14 on the hardware. If
either box is checked, this represents a high state. If either box is unchecked, this represents a low state.
G If the /RESET box is checked, the SDP-S sets the RESET pin high. Otherwise, the SDP-S pulls RESET low.
H If the /LDAC box is checked, the SDP-S sets the LDAC pin high. Otherwise, the SDP-S pulls LDAC low.
I The ACE plug-in monitors the FAULT pin. If the FAULT pin is low, the /FAULT indicator LED lights up red.
K VI_OUT displays the calculated output at VI_OUT, and also displays if the output is in voltage, milliamps, or is high impedance (high-Z).
Lx GUI access on several registers. Pop-ups, drop-down menus, and hexadecimal textboxes are available in the GUI to configure
several registers of the AD5758. To write the changes to the device, the Apply Changes button (Label A) must be clicked. The
functions within the GUI that control various registers (Label L1 through Label L15) are described in Table 5.
M The Calibration Memory Refresh button initiates a write to the key register to perform a calibration memory refresh.
N The SW LDAC button initiates a write to the key register to perform a software LDAC command.
O The NOP Command button initiates a write to Address 0x00 for a no operation (NOP) command.
P The Configure ADC button writes the data selected in the ADC Config menu (Label L15) to the ADC configuration register.
Q Two Stage Readback Select menu. Two stage readback is initiated through the two stage readback select register. Clicking the
Readback button initiates a write to the two stage readback select register and then issues a no operation command.
R DIGITAL DIAGNOSTIC RESULTS menu. Clicking the Update and Readback Digital Diagnostic Result button triggers a write 1
to clear operation and a readback from the digital diagnostic result register.
S ANALOG DIAGNOSTIC RESULTS menu. Clicking the Update and Readback Analog Diagnostic Result button triggers a write 1
to clear operation and a readback from the analog diagnostic result register.
T If the HART_EN box is checked, the HART_EN bit = 1 in the General-Purpose Configuration 1 register.
U If the FPS EN box is checked, the FAULTPROT_SW_EN bit = 1 in the DC-to-DC Configuration 1 register.
V Click the Proceed to Memory Map button to open the AD5758 memory map (see Figure 9).
W Click the Example Sequences button to open the example sequences window (see Figure 15).
Table 5. Register Controls Accessible via the GUI (See Label Lx in Table 4 and in Figure 8)
Label Function
L1 Diagnostic Configuration. Clicking this button activates the associated pop-up menu.
L2 GP Config. When this button clicked, a pop-up menu appears.
L3 Key register menu. When this menu is clicked, a drop-down menu appears.
L4 Fault Pin Config. When this button is clicked, a pop-up menu appears.
L5 WDT Config. When this button is clicked, a pop-up menu appears.
L6 Frequency Monitor menu. This menu displays the value in the frequency monitor when read.
L7 Clear Code menu. Use the textbox in this menu to insert a clear code value in hexadecimal format.
L8 User Gain menu. Use the textbox in this menu to insert a user gain value in hexadecimal format.
L9 User Offset menu. Use the textbox in this menu to insert a user offset value in hexadecimal format.
L10 DAC Input Reg menu. Use the textbox in this menu to insert the DAC value in hexadecimal format.
L11 16 Bit DAC. When this button is clicked, a pop-up menu appears .
L12 DAC Output Reg. This menu displays the hexadecimal value currently set in the DAC output register.
L13 DC-DC Converter. When this button is clicked, the dc-to-dc configuration pop-up menu appears.
L14 Status Register. This menu displays the contents of the status register.
L15 ADC Config. This menu contains a combination of drop-down menus and a textbox in which to enter the sequence data.

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 9 of 20
16710-007
Figure 9. AD5758 Memory Map in the ACE Software
INITIAL CONFIGURATION
An initial configuration wizard is available when opening the
AD5758 plug-in. The initial configuration wizard allows quick
configuration of the AD5758 and provides configuration of the
clock output in the general-purpose configuration register, the
dc-to-dc settings, DAC configuration, and the DAC input register.
Clicking the Apply button initiates the configured settings in
the order of the recommended power-up sequence described in
the AD5758 data sheet.
DC-TO-DC CONVERTER SETTINGS
If the VDPC+ pin is not tied directly to AVDD1, then the dc-to-dc
converter must be enabled for correct operation. This step must
be completed before configuring the DAC output. The DC-DC
Configuration popup menu, shown in Figure 10, contains the dc-
to-dc settings required to configure the AD5758 output correctly.
After the desired settings are selected, click the Close button and
then click Apply Changes.
16710-008
Figure 10. DC-DC Configuration Pop-Up Menu

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 10 of 20
SETTING THE DAC OUTPUT
To configure the DAC output, use the pop-up menu for the DAC
configuration register (see Figure 11), available in the GUI. Click
the 16 Bit DAC symbol in the GUI to display the DAC config-
uration register. Select the appropriate settings, and then click
Apply Changes. It is recommended to disable the output until the
correct value in the DAC input register is written to the device.
To change the DAC voltage/current output level, write the
appropriate hexadecimal code to the DAC input register and
then click Apply Changes. Issue a software LDAC command
using the SW LDAC button, or pull the LDAC pin low to
update the DAC output register with the values in the DAC
input register. Ensure that the fault protect switch, FPS_EN, is
enabled before enabling the output. Enable the DAC output,
OUT_EN, and then click Apply Changes. The programmed
voltage/current is then reflected at the VIOUT pin.
16710-009
Figure 11. AD5758 DAC Config Register Pop-Up Menu
WRITING TO THE ADC CONFIGURATION REGISTER
The procedure to set up and configure the ADC sequencer is
discussed in detail in the AD5758 data sheet. For this reason,
writing to the ADC configuration register through the Apply
Changes function is disabled.
Drop-down menus and a hexadecimal texbox are available within
the GUI (see Figure 12) to access the ADC configuration register.
Clicking the Configure ADC button initiates a write to the
ADC configuration register.
16710-010
Figure 12. AD5758 ADC Configuration Register
UPDATING DIAGNOSTIC RESULTS
The AD5758 has a digital diagnostic results register and an analog
diagnostic results register, both of which contain error flags for the
on-chip digital and analog diagnostic features. Writing 1 to the
respective error flags updates the error flag status.
To update the digital and analog diagnostic result registers, an
Update and Readback button is available on the ACE GUI.
Clicking this button initiates the writing of a 1 to the selected
error flag and then reads back the updated diagnostic result.
Figure 13 shows the digital diagnostic results register. Figure 14
shows the analog diagnostic results register.
16710-011
Figure 13. AD5758 Digital Diagnostic Register
16710-012
Figure 14. AD5758 Analog Diagnostic Register

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 11 of 20
EXAMPLE SEQUENCES
There are several example sequences available. Click the Example
Sequences button and the window shown in Figure 15 appears.
To enable any of the sequences, click on the relevant sequence
button, as shown in Figure 16. The sequence runs immediately
and the output changes accordingly. To return to the main
window, click the Back to the AD5758 button.
16710-114
Figure 15. Example Sequences Window
16710-115
Figure 16. Selecting an Example Sequence

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 12 of 20
ACE TOOL VIEWS
The ACE software provides additional functionality to the main
view described in this user guide Open these views from the view
menu item on the application toolbar. ACE features a macro tool, a
register debugger tool, and an events tool.
MACRO TOOL
The macro tool allows commands to be recorded and saved as
an ACE macro file. This feature is useful when sharing macros
with other users to perform the same task multiple times. The
user can import and run an ACE macro file.
REGISTER DEBUGGER TOOL
Use the register debugger tool to perform raw writes to and
reads from the device. The register debugger affects only the
hardware and does not write to the memory map of ACE.
EVENTS TOOL
The events tool view contains a list of errors, warnings, and
information messages generated within the application software.

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 13 of 20
EVALUATION BOARD SCHEMATICS AND ARTWORK
OPTIONAL RC FILTER ON REFOUT
C_DCDC - SURFACE MT & THROUGH-HOLE OPTIONS
TESTPOINTS:
IF = 2MA PLACE SMD & THROUGH-HOLE OPTIONS
THROUGH-HOLE C_COMP IN GOLD PINS
USE FOOTPRINT THAT CAN ACCOMMODATE 120/0805/0603 ON C21
OPTION TO DRIVE VDPC+ WITH AVDD1 (BYPASS POSITIVE DC-DC)
WHITE = GROUND
RED = POWER
BLACK = SIGNAL
VF = 1.8V
TH RSET = +/1% TOL, +/-50PPM/DEGC
SMD RSET = +/-0.1% TOL, +/-25PPM/DEGC
13.7K
1/10W
1/4W
69157-102
GND
REFGND
GND
13.7K
0.1
1
2.2UF
1727010
220PF
100V
0.1UF
50V
C0402H22
GND
50V
32QH50A15050
GND
DNI
DNI
DNI
DNI
2.2UF
4.7UF
C0402H22
GND
GND
1K
500
2.2UF
R0603
TLMS1000GS08
C0402H22
50V
0.1UF
C0402H22
50V
0.1UF
2.2UF
C0402H22 47UH
4.7UF
50V
0.1UF
REFGND
GND
0.1UF
REGOUT_
C18
C16
C21
VDPC+
JP6
C17C14
R8
C19
R6
C10
CLKOUT
C15
C12
R9
C23
L2
REGOUT
DS1
R5
C20
AD5758
C13
VLOGIC
C_HART
+VSENSE
-VSENSE
AVDD1
AVSS
SDI
VI_OUT
AVSS
VLDO
NIC
/SYNC
VIOUT_INT
SDO
SCLK RA
CCOMP
/FAULT
SW+
VDPC+
/LDAC
/RESET
CLKOUT ADO
AD1
REFIN
REFOUT REFOUT_DUT
AVDD2
RB
VLOGIC
11
12
1
1 2
C
A
1 2 3
4
5
6
7
9
10
11
12
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 32
PAD
13
8
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN IN
IN
IN
IN
OUT
OUT OUT
OUT
OUT
OUT
OUT
GND
GND
GND
16710-013
Figure 17. AD5758 Schematic

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 14 of 20
OPTIONTO SHORTAVSS TO GND => UNIPOLAR SUPPLY
TERMINAL BLOCK DECOUPLING CAPACITORS
ZENER CLAMPS VIN TO 15V IFA LARGER VOLTAGE ISAPPLIED
VIN = 3V - 15V
VLOGIC SOURCE OPTIONS
SCHEMATIC PAGE - DUT & SUPPLY
AD5758 REFIN OPTIONS
1727023
69157-102
GND
2213S-06G
GND
GND
50V
1727010
REFGND
0
69157-102
1727010 REFGND
69157-102
ADR4525BRZ
REFGND
22-03-2031
REFGND
REFGND
REFGND
50V
C0805H53
C0805H53
0.1UF
C0805H53
1727010
100nF
1UF
BZX585-C15
C0805H53
50V
0.1UF
0.1UF
50V
0.1UF
69157-102
GND
GND
4.7UF
4.7UF
4.7UF
1727010
REFGND
69157-102
100nF
U1
AVDD1/AVSS
AVDD2
C2
C3 C6
C5
AVDD1
AVSS
C7C4
AVDD2_
AVDD1-AVDD2-SHRT
VLOGIC
C1
EXT-VLOGIC
GND
TP11TP3 TP5 TP7 TP9
TP12
TP4 TP6 TP8 TP10
C8
EXT-REF
C9
C11
JP3
JP2
JP4
REFIN
REFOUT
EXT-REF_
ADR-REF
VLOGIC_SOURCE
R2
JP1
EXT_REF_VIN
JP17
D1
AVDD2
GND
GND
GND
VLOGIC
VLDO
3.3V_SDP
AVDD1
AVDD2
EXT_REF_VIN EXT-REF
REFIN
EXT_REF_VIN
AVDD2
AVDD1
AVSS
AVDD2
EXT-REF
AVSS
REFOUT
EXT-VLOGIC
EXT-VLOGIC
ADR-REF
ADR-REF
4 1 3 5 7
8
26
1
1
1
12
1
1
2
1
1
1
1
1
1
1
1
1
1
11
2
1
1
1
1
123
1
2
12
C
A
NC1
VIN
GND TP
VOUT
A
C
B
A
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT OUT
GND
GND
GND
GND
16710-014
B
Figure 18. AD5758 Supplies and Reference Options

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 15 of 20
OPTIONTO TIE /LDAC & /RESET PERMANENTLY HIGH/LOW HARDWARE TIEAD0 & AD1 HIGH/LOW
SIGNALS FROM EXTERNAL SOURCE E.G. PXI
SDP DEBUG LED
OPTION TO DISCONNECT FROM SDP & DRIVE DIGITAL
CENTRE-OFF TOGGLE SWITCH FOR /RESET
100K DNI 24LC32A/SN
DNI 100K
GND
GND
22-03-2031
0
0
0
1K
0
0
0
0
TSW-107-08-G-D
FX8-120S-SV(21)
100K
GND GND
GND
GND
22-03-2031
GND GND
22-03-2031
GND GND
TT11EGPC104
GND
R28R26
DS3
S1
R14
R29
JP11
/SYNC SDI SDO SCLK /LDAC /RESET /FAULT
R16
R17 R21
R25
R24
R23
R22
P2
R27
R18
JP14JP12
U3
P1
3.3V_SDP
/FAULT_SDP
/
RESET_SDP
SCLK_SDP
VLOGIC
/LDAC AD1
VLOGIC
3.3V_SDP
3.3V_SDP
SDI
SDI_SDP
/SYNC_SDP
/LDAC_SDP
SDO_SDP
VLOGIC
/SYNC_SDP
SDO
SCLK
/LDAC
/RESET
/FAULT
/SYNC
SDO_SDP
SCLK_SDP
/LDAC_SDP
/RESET_SDP
/FAULT_SDP
SDI_SDP
/RESET
VLOGIC
ADO
6
4
8
1
5
AC
3
1
2
3
2
1
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1111111
3
2
1
3
2
1
7
3
2
65
116
1
5
6259
7249 7348
87
89
30
29 92
90
32 88
31 91
38
37 85
39
84
83
34
33
82
64
35
41 80
42 79
57
60
10021 99
26 95
27
7114
8113
9112
10 111
110
12
13 108
14 107
15 106
16 105
18 103
19 102
20 101
22
94
24 97
25 96
120
119
70
68
67
6655
54
53
51
50
2
7447
7645 7744 7843
118
117
115
109
104
98
93
86
81
75
69
6358
52
46
40
36
28
23
17
11
6
4
3
56
71
61
BA BA
BA
SPI_SEL_A
CLKOUT
NC
NC
GND
GND
VIO(+3.3V)
GND
PAR_D22
PAR_D20
PAR_D18
PAR_D16
PAR_D15
GND
PAR_D12
PAR_D10
PAR_D8
PAR_D6
GND
PAR_D4
PAR_D2
PAR_D0
PAR_WR_N
PAR_INT
GND
PAR_A2
PAR_A0
PAR_FS2
PAR_CLK
GND
SPORT_RSCLK
SPORT_DR0
SPORT_RFS
SPORT_TFS
SPORT_DT0
SPORT_TSCLK
GND
SPI_MOSI
SPI_MISO
SPI_CLK
GND
SDA_0
SCL_0
GPIO1
GPIO3
GPIO5
GND
GPIO7
TMR_B
TMR_D
NC
GND
NC
NC
NC
WAKE_N
SLEEP_N
GND
UART_TX
BMODE1RESET_IN_N
UART_RX
GND
RESET_OUT_N
EEPROM_A0
NC
NC
NC
GND
NC
NC
TMR_C
TMR_A
GPIO6
GND
GPIO4
GPIO2
GPIO0
SCL_1
SDA_1
GND
SPI_SEL1/SPI_SS_N
SPI_SEL_C_N
SPI_SEL_B_N
GND
SERIAL_INT
SPI_D3
SPI_D2
SPORT_DT1
SPORT_DR1
SPORT_TDV1
SPORT_TDV0
GND
PAR_FS1
PAR_FS3
PAR_A1
PAR_A3
GND
PAR_CS_N
PAR_RD_N
PAR_D1
PAR_D3
PAR_D5
GND
PAR_D7
PAR_D9
PAR_D11
PAR_D13
PAR_D14
GND
PAR_D17
PAR_D19
PAR_D21
PAR_D23
GND
USB_VBUS
GND
GND
NC
VIN
VCC
WP
SCL SDA
VSS
A2
A1
A0
IN
IN
IN
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
16710-015
Figure 19. SDP-S Board Connections, Address Pins, and LDAC and RESET Pins

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 16 of 20
GND
C_HART
-VSENSE
RETURN
THROUGH-HOLE LOAD RESISOR OPTION IN GOLD PINS
VI_OUT
+VSENSE
THROUGH-HOLE COMPONENTS USED FOR SERIES RESIS TORS
PLACEHOLDER TO EXPERIMENT WITH SETTLING TIME
10
DNI
DNI
1K
1k
1K
DNI
1725698
10000PF
GND
DNI
1k
DNI
20
DNI
0.15uF 0.047uF
R33
C24
P3
C_HART
C25
C26
C27
RTN_TERMINAL
VI_OUT_TERMINAL
JP7
TP2
JP10
JP8
JP9
R12
R_SENSE
-VSENSE
R13
+VSENSE
VI_OUT
R11
R10
TP1
VIOUT_INT
-VSENSE
C_HART
VI_OUT
+
VSENS
E
NIC
VI_OUT_TERMINAL RTN_TERMINAL
1
1
1
12
1
1
1
1
1
GND
GND
GND
GND
12
12 12
IN
IN
IN
OUT
OUT
OUT
16710-016
Figure 20. AD5758 Output Stage

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 17 of 20
16710-017
Figure 21. Silkscreen
16710-018
Figure 22. Layer 1

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 18 of 20
16710-019
Figure 23. Ground and Power Plane, Layer 2 and Layer 3
16710-020
Figure 24. Layer 4 (Secondary)

EVAL-AD5758 User Guide UG-1268
Rev. 0 | Page 19 of 20
ORDERING INFORMATION
BILL OF MATERIALS
Table 6. Bill of Materials
Reference Designator Description Manufacturer Part Number
+VSENSE, −VSENSE, /FAULT, /LDAC, /RESET,
/SYNC, ADR-REF, CLKOUT,CHART,EXT-REF,
REFIN, REFOUT, RTN_TERMINAL, SCLK, SDI,
SDO, TP1, TP2, VIOUT, VI_OUT_TERMINAL
Black test points Components Corporation TP-104-01-00
AVDD1, AVDD2, AVSS, REGOUT_, VDPC+,VLOGIC Red test points Components Corporation TP-104-01-02
AVDD1-AVDD2-SHRT, JP2, JP3, JP4, JP6, JP7,
JP8, JP9, JP10, JP17
2-pin jumpers Amphenol FCI 69157-102
AVDD1/AVSS 3-pin header Phoenix Contact 1727023
AVDD2, EXT-REF, EXT-VLOGIC, EXT_REF_VIN,
REGOUT
2-pin headers Phoenix Contact 1727010
C1, C5, C6, C7 0.1 μF capacitors Murata GRM21BR71H104KA01L
C10 2.2 μF capacitor Murata GRM188R60J225KE19D
C9, C11 100 nF capacitors Dielectric Labs P62BN820MA2636
C12, C13, C14, C15, C16 0.1 μF capacitors TDK CGA2B3X7R1H104K050BB
C2, C3, C4, C17, C18 4.7 μF capacitors Murata GRM31CR71H475KA12L
C21 2.2 μF capacitor Murata GRM31CR71H225KA88L
C25 0.15 μF capacitor AVX 12065C154KAT2A
C26 0.047 μF capacitor AVX 12065C473JAT2A
C8 1 μF capacitor Murata GCM21BR71E105KA56L
D1 Zener diode NXP Semiconductors BZX585-C15
DS1 Red LED Vishay TLMS1000-GS08
DS3 Green LED Lumex SML-LX0603GW-TR
GND, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10,
TP11, TP12
White test points Components Corporation TP-104-01-09
JP1, JP11, JP12, JP14 3-pin jumpers Molex 22-03-2031
L2 47 μH inductor Coilcraft Inc. LPS4018-473MRB
P1 120-pin connector HRS FX8-120S-SV(21)
P2 7 row, 2-pin header Samtec TSW-107-08-G-D
P3 6-pin header Phoenix Contact 1725698
R_SENSE 20 Ω resistor (not
inserted)
Vishay-Dale CMF-5520R0BT-2
R2, R16, R17, R21, R22, R23, R24, R25 0 Ω resistors Multicomp MC0603WG00000T5E-TC
R6 500 Ω resistor Vishay Precision Group CRCW0603500RFKEA
R8 13.7 kΩ resistor TE Connectivity YR1B13K7CC
R9 13.7 kΩ resistor TE Connectivity RN73C1J13K7BTDF
R10, R12, R13 1 kΩ resistors Yageo CFR-25JB-1K0
R11 10 Ω resistor Ohmite OE1005
R5, R14 1 kΩ resistor Vishay Precision Group CRCW06031K00FKEAHP
R18, R27, R28 100 kΩ resistors Multicomp MC 0.063W 0603 1% 100K
S1 Toggle switch Tyco TT11EGPC104
U1 External reference Analog Devices ADR4525BRZ
U3 I2C serial EEPROM Microchip Technology 24LC32A/SN
U4 Single-channel,
16-bit DAC with
dynamic power
control
Analog Devices AD5758BCPZ
VLOGIC_SOURCE 3-pin, 2 row header Multicomp Company 2213S-06G

UG-1268 EVAL-AD5758 User Guide
Rev. 0 | Page 20 of 20
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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UG16710-0-5/18(0)