WILDSTAR ™ -II Hardware Reference Manual Doc No. 12921-0000 Rev. 6.0 Page iii
Annapolis Micro Systems, Inc.
7.2.9 PE TO PE BUS STANDARD INTERFACE (PE_BUS_STD_IF)........................7-26
7.2.10 PE TO PE BUS BASIC INTERFACE (PE_BUS_BASIC_IO) ............................7-29
7.3 WILDSTAR™-II PRO VHDL MODEL............................................................7-35
7.3.1 VHDL MODEL SIMULATION ENVIRONMENT.................................................7-35
7.4 VHDL INTERFACE COMPONENTS ............................................................7-36
7.4.1 CLOCK INTERFACE (CLOCK_INTERFACE)...................................................7-37
7.4.2 LAD BUS INTERFACE (LAD_INTERFACE) .....................................................7-39
7.4.3 SRAM DDRII INTERFACE (SRAM_DDRII_PORTX_INTERFACE)..................7-45
7.4.4 SRAM QDRII INTERFACE (SRAM_QDRII_PORTX_INTERFACE) ................. 7-47
7.4.5 DRAM INTERFACE (DRAM_INTERFACE).......................................................7-50
7.4.6 LED INTERFACE (LED_INTERFACE)..............................................................7-52
7.4.7 PE TO PE BUS INTERFACE (PECONN_PORTX_INTERFACE).....................7-53
7.4.8 ROCKET IO INTERFACE (RIO_PORTX_INTERFACE) (NOT AVAILABLE FOR
VME SYSTEMS)........................................................................................7-55
7.5 WILDSTAR™-II VHDL HOST MODEL .........................................................7-59
7.5.1 SIMULATED HOST API PROCEDURES..........................................................7-59
7.5.2 VHDL HOST MODEL SIMULATION ENVIRONMENT......................................7-71
7.5.3 USING TEMPLATES..........................................................................................7-71
7.5.4 USING VHDL RECORD TYPES........................................................................7-71
7.5.5 PCI CONTROLLER MODEL..............................................................................7-71
7.5.6 ON-BOARD MEMORY MODEL.........................................................................7-71
7.5.7 I/O CARD MODEL..............................................................................................7-72
7.5.8 VHDL MODEL CONFIGURATION ....................................................................7-72
7.5.9 WILDSTAR™-II SYSTEM CONFIGURATION (SYSTEM_CONFIG)................ 7-72
8WILDSTAR™ VHDL DESIGN CYCLE...............................................8-1
8.1 WILDSTAR™-II /VME AND /PCI VHDL DESIGN...........................................8-1
8.1.1 USING TEMPLATE VHDL DESIGN FILES......................................................... 8-1
8.1.2 CREATING A PE DESIGN................................................................................... 8-1
8.1.3 CREATING A HOST DESIGN .............................................................................8-1
8.1.4 CREATING A SYSTEM ARCHITECTURE..........................................................8-2
8.1.5 MODIFYING CONFIGURATION FILES .............................................................. 8-2
8.1.6 DESIGN SIMULATION ........................................................................................ 8-2
8.1.7 SYNTHESIZING A DESIGN ................................................................................8-4
8.1.8 PLACING AND ROUTING A DESIGN................................................................. 8-5
8.1.9 ANALYZING DESIGN PERFORMANCE.............................................................8-7
INDEX............................................................................................................I
APPENDIX A: WILDSTAR™-II BACKPLANE STANDARD INTERFACE PIN
MAPPING.................................................................................................. A1
APPENDIX B: WILDSTAR™-II PRO P2 BACKPLANE PIN MAPPING... B1
APPENDIX C: WILDSTAR™-II P0/P2 PIN USAGE.................................. C1
APPENDIX D: WILDSTAR™-II VHDL SRAM EXAMPLE......................... D1
SRAM EXAMPLE FOR WILDSTAR™-II /PCI AND /VME .................................... D1
MAIN FUNCTIONAL BLOCKS...........................................................................................D2
SOFTWARE DESCRIPTION.............................................................................................D3
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