Crystal LAN CS8920 Product manual

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CS8920
Ethernet Controller
Technical Reference
Manual
Version: 1.11
AN84REV1
March 27, 1996
Copyright © Crystal Semiconductor Corporation, 1996
(All Rights Reserved)
To obtain technical application support, call [phone] (from the US and Canada) or
512-442-7555 (from outside the US and Canada), and ask for CS8920 Application Support,
or send an email to: [email protected]

AN84REV1 2
CS8920 Technical Reference Manual
The information contained in this document is subject to change without notice. Crystal
Semiconductor Corporation makes no warranty of any kind with regard to this material
including, but not limited to, the implied warranties of merchant ability and fitness for a
particular purpose. Crystal Semiconductor Corporation shall not be liable for errors contained
herein or for incidental or consequential damages in connection with the furnishing,
performance, or use of this material.
This document contains information which is protected by copyright. All rights reserved. No
part of this document may be photocopied, reproduced, or translated to another language
without the prior written consent of Crystal Semiconductor Corporation.
The following are trademarks of Crystal Semiconductor: StreamTransfer, PacketPage, and
SMART Analog
Other trademarks used in this Technical Reference Manual include:
Ethernet is a registered trademark of Xerox Corp.
Artisoft and LANtastic are registered trademarks of Artisoft, Inc.
Banyan and VINES are registered trademarks of Banyan Systems.
Digital and PATHWORKS are registered trademarks of Digital Equipment Corporation.
Intel is a registered trademark of Intel Corporation.
LAN Server and IBM are registered trademarks of International Business Machines Corp.
Microsoft, LAN Manager, Windows 95, Windows for Workgroups, and Windows NT are
registered trademarks of Microsoft.
Novell and Netware are registered trademarks of Novell, Inc.
SCO is a registered trademark of Santa Cruz Organization, Inc.
UNIX is a registered trademark of AT&T Technologies, Inc.
Other product names may be trademarks of their respective companies.

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CS8920 Technical Reference Manual
TABLE OF CONTENTS
CS8920 ETHERNET CONTROLLER TECHNICAL REFERENCE MANUAL..............1
1.0 INTRODUCTION TO CS8920 TECHNICAL REFERENCE MANUAL....................6
2.0 HARDWARE DESIGN.....................................................................................................9
2.1 ETHERNET HARDWARE DESIGN FOREMBEDDED SYSTEMS AND MOTHERBOARDS .................9
2.1.1 General Description......................................................................................................9
2.1.2 Board Design Considerations .......................................................................................9
2.1.2.1 Crystal Oscillator................................................................................................................................................ 9
2.1.2.2 ISA Bus Interface............................................................................................................................................... 9
2.1.2.4 EEPROM ..........................................................................................................................................................10
2.1.2.5 LEDs.................................................................................................................................................................10
2.1.2.7 10BASE-2 and AUI Interfaces...........................................................................................................................10
2.1.3 Logic Schematics........................................................................................................10
2.1.4 Component Placement and Signal Routing.................................................................10
2.2 LAYOUT CONSIDERATIONS FOR THECS8920 .......................................................................20
2.2.1 General guidelines ......................................................................................................20
2.2.2 Power supply connections...........................................................................................20
2.2.2.1 Two layered printed circuit board (PCB)............................................................................................................22
2.2.2.2 Multi-layered printed circuit board.....................................................................................................................22
2.2.3 Routing of the digital signals ......................................................................................32
2.2.4 Routing of the analog signals......................................................................................32
2.2.4.1 Routing of the clock signals:...............................................................................................................................32
2.2.4.2 Biasing resistor at RES pin of the CS8920..........................................................................................................32
2.2.4.3 Routing of the 10BASE-T signals.......................................................................................................................32
2.2.4.4 Routing of the AUI signals..................................................................................................................................32
2.3 RECOMMENDED MAGNETICS FOR THECS8920 ...................................................................34
3.0 EEPROM-BASED CONFIGURATION.........................................................................36
3.1 FORMAT OF CONFIGURATIONDATA .....................................................................................36
3.2 RESET CONFIGURATIONBLOCK ...........................................................................................36
3.2.1 Reset Configuration Block Format ..............................................................................36

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3.2.1.1 Reset Configuration Block Header......................................................................................................................37
3.2.1.2 Configuration Data.............................................................................................................................................37
3.2.1.3 Checksum...........................................................................................................................................................37
3.2.2 Typical Reset Blocks ...................................................................................................38
3.2.2.1 Recommended Reset Configuration Block for a Legacy Adapter.........................................................................38
3.2.2.2 Recommended Reset Configuration Block for a PnP Adapter.............................................................................39
3.2.2.3 PnP with Automatic Wakeup Feature Enabled....................................................................................................39
3.2.2.4 BootPROM Considerations ................................................................................................................................40
3.2.2.5 Performance Considerations of Reset Configuration Block..................................................................................40
3.3 FORMAT OF THEDRIVER CONFIGURATIONBLOCK................................................................40
3.3.1 IEEE Physical Address...............................................................................................43
3.3.2 ISA Configuration Flags.............................................................................................43
3.3.3 PacketPage Memory Base............................................................................................43
3.3.4 Boot PROM Memory Base........................................................................................44
3.3.5 Boot PROM Mask .....................................................................................................44
3.3.6 Transmission Control..................................................................................................44
3.3.7 Adapter Configuration Word ......................................................................................44
3.3.8 Manufacturing Date....................................................................................................45
3.3.9 IEEE Physical Address (copy)....................................................................................45
3.3.10 16-bit Checksum.......................................................................................................46
3.3.11 EISA ID....................................................................................................................46
3.3.12 Serial Number............................................................................................................46
3.3.13 LFSR Checksum.......................................................................................................46
3.4 RECOMMENDED PLUG AND PLAY RESOURCE DATA..............................................................46
3.4.1 Serial Identifier............................................................................................................47
3.4.2 Resource Descriptors...................................................................................................47
3.5 PROGRAMMING ANDINITIALIZING THE EEPROM...............................................................53
3.5.1 Maintaining EEPROM Configuration Data.................................................................53
3.6 OBTAINING IEEE ADDRESSES.............................................................................................54
4.0 CS8920 INSTALLATION AND CONFIGURATION...................................................55
4.1 CS8920 EVALUATIONKIT DEVICE DRIVERS ANDSOFTWARE UTILITIES...............................55

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4.1.1 Software Distribution...................................................................................................55
4.1.2 Crystal’s Software Licensing Procedures.....................................................................55
4.2 ADAPTER INSTALLATION ANDCONFIGURATION....................................................................60
4.2.1 Installing the CS8920 Adapter.....................................................................................60
4.2.2 Configuring the CS8920 Adapter ................................................................................60
4.2.2.1 EISA System Installation....................................................................................................................................61
4.2.3 Testing the CS8920 Adapter........................................................................................61
4.2.3.1 Diagnostic Self-Test...........................................................................................................................................62
4.2.3.2 Diagnostics Network Test..................................................................................................................................62
4.2.4 Installing Network Device Drivers...............................................................................63
5.0 CONTACTING CUSTOMER SUPPORT AT CRYSTAL ...........................................64
5.1 CRYSTAL BBS.....................................................................................................................64
5.1.1 Connecting to the BBS ................................................................................................64
5.1.2 Guests ..........................................................................................................................64
5.1.3 Registered Callers........................................................................................................64
6.0 INDEX...............................................................................................................................65

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CS8920 Technical Reference Manual
1.0 Introduction to CS8920
Technical Reference Manual
This Manual provides the information
which will be helpful in designing a board
using the CS8920, programming the
associated EEPROM, and installing and
running the CS8920 device drivers. It is
expected that the user of this Technical
Reference Manual will have a general
knowledge of hardware design, Ethernet,
the ISA bus, and networking software.
Recommended sources of background
information are:
a) ISA System Architectureby Shanley
and Anderson, Mindshare Press, 1992,
ISBN 1-881609-05-7
b) Ethernet, Building a Communication
Infrastructure, by Hegering and Lapple,
Addison-Wesley, 1993, ISBN 0-201-
62405-2
c) Netware Training Guide: Networking
Technologies, by Debra Niedenmiller-
Chaffis, New Riders Publishing, ISBN
1-56205-363-9
As shown in the Figure 1.1, the CS8920
requires a minimum number of external
components. The EEPROM stores
configuration information such as interrupt
number, DMA channel, I-O base address,
memory base address, and IEEE Individual
Address. The EEPROM can be eliminated
on a PC motherboard if that information in
stored in the system CMOS. Note also that
the Boot PROM is only needed for diskless
workstations that boot DOS at system
power up, over the network. Also, the LEDs
are optional.
Figure 1.1 - Hardware Application Summary
Boundary
RAM
ISA
Bus
Logic
Memory
Manager
Media Access
Control
(MAC).
Ethernet
protocol
processing.
EEPROM
Control
Encoder,
Decoder
&
PLL
10BASE-T
RX Filters &
Receiver
10BASE-T
TX Filters &
Transmitter
AUI
Transmitter
AUI
Collision
AUI
Receiver
Clock
Power
Manage
Scan
Test Logic
LED
Control
EEPROM:
Stores Configuration
Information &
IEEE Address
57
pins
ISA Bus
Boot PROM:
Used to boot diskless
workstations.
AUI
Transformer
(Attachment
Unit
Interface)
10BASE-T
Transformer

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CS8920 Technical Reference Manual
The hardware design considerations for
both motherboards and adapter cards are
discussed in Chapter 2.0. The EEPROM
programming considerations are described
in Chapter 3.0. The current CS8920 data
sheet can be found in section 6.0.
Crystal provides a complete set of device
drivers, as discussed in Chapter 4.0. The
drivers reside between the networking
operating system (NOS) and the CS8920.
On the CS8920 side, the drivers understand
how to program and read the CS8920
control and status registers, and how to
transfer user data between the CS8920 and
the PC main memory via the ISA bus. On
the NOS side, the drivers provide the
standardized services and functions
required by the NOS, and hide all details of
the CS8920 hardware from the NOS. The
EEPROM device programs the CS8920
whenever a hardware reset occurs, and call
also store state/configuration information
for the driver.
Crystal’s Software Driver Distribution
Policy is as follows. This developer kit
contains a single-user copy of object code
which is available only for internal testing
and evaluation purposes. This object code
may not be distributed without first signing
a LICENSE FOR DISTRIBUTION OF
EXECUTABLE SOFTWARE, which may
be obtained by contacting your sales
representative. The LICENSE FOR
DISTRIBUTION OF EXECUTABLE
SOFTWAREgives you unlimited, royalty-
free rights to distribute Crystal-provided
object code.
The drivers supported are shown in Table
1.1.
Operating System Software
e.g., File Manager
CS8920 Registers & Memory
CS8920-specific device drivers:
e.g., NDIS & ODI compatible drivers
Network Operating System
e.g., Novell or Microsoft
Applications
EEPROM
Figure 1.2 - Software Application Summary

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CS8920 Technical Reference Manual
Driver Operating System Network Operation System
DOS ODI Client DOS 6.2 to 3.3, Novell 4.X, 3.12
Win 3.1,
Windows for Workgroups 3.11
OS/2 ODI Client OS/2 2.2, 2.1, Warp Novell 4.X, 3.12
Netware Server Novell 4.X, 3.12
NDIS 2.0.1 - DOS DOS 6.2 to 3.3 LAN Manager, LAN Server,
Win 3.1 Windows for Workgroups 3.11
NDIS 2.0.1 - OS/2 OS/2 2.2, 2.1, 3.0 (Warp) LAN Manager, LAN Server,
LANtastic
NDIS 3.x Windows NT NT Server, NT Workstation,
Windows ‘95 Novell 4.X, 3.X
Windows for Workgroups
Packet V1.09 DOS 6.2 to 3.3 TCP/IP stacks including:
PC/TCP, SUN PC-NFS,
Wollongong
SCO UNIX SCO Unix Rel 3.2 V4.0, 4.2 SCO Open Server 3.0, 5.0
Boot PROM Novell 4.X, 3.12
LAN Manager, LAN Server
Setup & Installation Utility DOS 6.2 to 3.3
Table 1.1 - Supported Drivers

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CS8920 Technical Reference Manual
2.0 Hardware Design
This section gives design guidance for both
embedded and adapter card designs,
including design considerations such as
choosing transformers, and laying out the
board.
2.1 Ethernet Hardware Design for
Embedded Systems and
Motherboards
This section describes the hardware design
of a four-layer, 10BASE-T solution
intended for use on PC motherboards, or in
other embedded applications. The goal of
this design is use minimal board space and
minimal material cost. Therefore, a number
of features (BootPROM, AUI, 10BASE-2)
are not supported in this particular PCB
design. An example of this circuit is
included in the CS8900 Technical
Reference Manual, and is implemented in
an ISA form factor. This same circuit can
be implemented directly on the processor
PCB.
2.1.1 General Description
The small footprint, high performance and
low cost of the CS8920 Ethernet solution,
makes the CS8920 an ideal choice for
embedded systems such as personal
computer (PC) mother boards. The very
high level of integration in the CS8920
results in a very low component count
Ethernet design. This makes it possible to
have a complete solution fit in an area of
1.75 square inches. The full Plug & Play
support, Wake-Up frame and Advanced
Power Management make the CS8920 ideal
for design of new generation of Green PC
platforms. Features like full duplex and
Auto-Negotiation (N-Way) make designs
using CS8920 suitable for LANs that are
getting upgraded with full duplex and
switching hubs. Since the analog filters are
integrated in to the CS8920, a card can
more easily made compliant with FCC part
15 class (B).
2.1.2 Board Design Considerations
2.1.2.1 Crystal Oscillator
The CS8920, in this reference design, uses
a 20.000 MHz crystal oscillator. The
crystal has a maximum load capacitance of
18 pF. The rest of the oscillator circuitry is
built internal to the CS8920. Please note
that the crystal must be placed very close to
XTL1 and XTL2 pins of the CS8920.
This crystal oscillator can be eliminated if
there is an accurate clock signal (20.00
MHz +/- 0.01% and 45-55 duty cycle)
available in the system.
2.1.2.2 ISA Bus Interface
The CS8920 has a direct ISA bus interface.
Note that the ISA bus interface is simple
enough to allow the CS8920 to interface
with variety of microprocessors directly or
with the help of simple programmable logic
such as a PAL or a GAL.
This reference design actually has the form
factor of an ISA adapter card. In this
design, all the ISA bus connections from
the CS8920 are directly routed to the ISA
connector. The pin-out of the CS8920 is
such that if the CS8920 is placed as shown
in Figure 2.1.1a, there will be no cross-over
of the ISA signals.
The CS8920 can be accessed in I/O mode
or memory mode. In memory mode, the
CS8920 can be in the conventional or
upper memory of the PC (the lower1 Mega

AN84REV1 10
CS8920 Technical Reference Manual
bytes of address space) or in extended
memory address space. Address decoders
for I/O as well as memory mode are on chip
for the CS8920.
2.1.2.4 EEPROM
A 128 word (128 X16 bit) EEPROM
(location U3) is used in the reference
design to interface with the CS8920. This
EEPROM holds the IEEE assigned
Ethernet MAC (physical) address for the
board (see Section 3.3.1). The EEPROM
also holds other configuration information
for the CS8920. The EEPROM also holds
the Plug & Play resource information. The
last few bytes of the EEPROM are used to
store information about the hardware
configuration and software requirements.
Since the CS8920 has full Plug & Play
support, it requires an EEPROM to
configure itself after a reset.
Please refer to the CS8920 data sheet for
information about programming the
EEPROM. Please refer to the Section 3.0
of this document for information about
EEPROM internal word assignments.
2.1.2.5 LEDs
Many embedded systems do not require
LEDs for Ethernet traffic. Therefore this
reference design does not implement any
LEDs. However, the CS8920 has direct
drives for the four LEDs. Please refer to
the data sheet for the CS8920 for a
description of the LED functions available.
2.1.2.6 10BASE-T Interface
The 10BASE-T interface for the CS8920 is
straight forward. Please refer to Figure
2.1.4 for connections and components of
this circuit. Transmit and receive signal
lines from the CS8920 are connected to an
isolation transformer at location T1. This
isolation transformer has a 1:1 ratio
between the primary and the secondary
windings on the receive side, and a 1:√2
(1:1.41) ratio between the primary and the
secondary windings for the transmit lines.
Resistor R1 provides termination for the
receive lines. Resistors R2 and R3 are in
series with the differential pair of transmit
lines for impedance matching.
2.1.2.7 10BASE-2 and AUI Interfaces
As many embedded systems require only a
10BASE-T interface, this reference design
implements only the 10BASE-T interface.
However, should a user require a 10BASE-
2 or AUI interface, the CS8920 provides a
direct interface to the AUI. Please refer to
the CS8900 Technical Reference Manual
or the CS8920 datasheet for details about
the AUI interface.
2.1.3 Logic Schematics
Figures 2.1.2 and 2.1.4 detail the logic
schematics for the various circuits used in
the reference design.
2.1.4 Component Placement and Signal
Routing
Please refer to the Section 2.2 of this
document for more details on the placement
of components on the board. It is important
to provide very clean and adequate +5 V
and ground connections to the CS8920.

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CS8920 Technical Reference Manual
2.1.5 Bill of Material
Table 2.1 has a list components that are
typically used to assemble this adapter
card. For most of the components, there
are several alternative manufacturers.
Item Reference # Descri
p
tion Quantit
y
Vendor Part Number
1 C1, C2, C5,
C7, C8, C9,
C10, C11,
C12, C13,
C14
Capacitor, 0.1 µF, X7R, SMT
0805 11
2 C15
,
C16
,
Capac
i
to
r
,
22
µ
F
,
S
MT 7
3
4
3
3
3 C18 Ca
p
acitor
,
68
p
F
,
NPO
,
SMT 1
4R2
,
R3 Resistor
,
24.3
,
1%
,
1/8W
,
SMT 2
5 R1 Resistor
,
100
,
1%
,
1/8W
,
SMT 1
6 R4 Resistor
,
4.99K
,
1%
,
SMT 1
7* X1 Cr
y
stal
,
20.000 MHz 1 M-tron ATS-49
,
20.000
8 J1 Connector
,
RJ45
,
8
p
in 1 AMP 555164-1
9 T1 Transformer
,
2
,
1:1
,
1:1.41 1 Valor
ST7011 (SOIC)
10 U1 ISA Ethernet Controlle
r
1Cr
y
stal CS8920
11* U3 2K EEPROM 1 Microchi 93C56
(
8
p
in SOIC
)
12 Board bracket 1 Gom
p
f
9340
13 CDB8920 PCB Rev A 1
14 4/40 Screws 2
* Depending on system resources, these parts may not be needed.
Table 2.1. CS8920 Motherboard Design Bill of Materials

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CS8920 Technical Reference Manual
Figure 2.1.1a. Placement of Components, Top Side

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CS8920 Technical Reference Manual
Figure 2.1.1b. Placement of Components, Solder Side

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CS8920 Technical Reference Manual
Figure 2.1.1c. Ground Plane

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CS8920 Technical Reference Manual
Figure 2.1.1d. Power Plane

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CS8920 Technical Reference Manual
Figure 2.1.1e. Signal Routing, Solder Side

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CS8920 Technical Reference Manual
Figure 2.1.1f. Signal Routing, Component Side

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CS8920 Technical Reference Manual
10BT_R0-
10BT_R0+
10BT_TD-
10BT_TD+
U1
CS8920
LABUS
SABUS
SD BUS
WAKEUP
Figure 2.1.2. Overall Schematic

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CS8920 Technical Reference Manual
C17
TANT TANT TANT
22µF22
µ
F22
µ
F
C16 C15
+
+5V
GND
++
Figure 2.1.3. Decoupling Capacitors Schematic
10BT_RD-
10BT_RD+
10BT_TD-
10BT_TD+
10BT_RD-
0.1
µ
F
0.1 µ F
10BT_RD+
R2
R3
24.3 Ω
C5
C18
68pF
R1
100
Ω
C2
1
2
3
6
7
8
I11
I12
I13
I21
I22
I23
O11
O12
O13
O21
O22
O23
10BT_XFR_S
1:1
1:1.41
T1
16
15
14
11
10
9
RD-
RD+
TD-
TD+
CON_RJ458PSHLD
8
7
6
5
4
3
2
1
0.01
µ
F 0.01
µ
F
C6 C4
1 kV 1 kV
J1
24.3 Ω
Figure 2.1.4. 10BASE-T Schematic

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CS8920 Technical Reference Manual
2.2 Layout considerations for the
CS8920
The CS8920 is a mixed signal device
having digital and analog circuits for an
Ethernet communication. While doing the
PCB layout and signal connections, it is
important to take the following precautions:
(a) Provide a low inductive path to
reduce power and ground
connection noise.
(b) Provide proper impedance
matching especially to the Ethernet
analog signals.
(c) Provide low inductive path, wider
and short traces, for all analog
signals.
It is important that a PCB designer follow
suggestions made in this document for
proper and reliable operation of the
CS8920. These guidelines will also help to
ensure good EMI test results.
2.2.1 General guidelines
Figure 2.2.1 shows component placement
for an ISA COMBO Ethernet adapter card
using a CS8900. For a CS8920 Combo
card, substitute CS8920 in place of
CS8900. The placement of the CS8920
should be such that the routes of the analog
signals and the digital signals are not
intermixing. No signal should route
beneath the CS8920 on any plane.
2.2.2 Power supply connections
The CS8920 has 3 analog and 5 digital
power pin pairs (Vcc and GND).
Additional ground connections are
provided. Each power pin pair should be
connected to a 0.1 µF bypass capacitor.
Connect the extra ground pins directly to
the ground plane.