Dave Embedded Systems diDo User manual

HARDWARE MANUAL
ARM Cortex-A8 CPU Module Family
DAVE Embedded Systems www.dave.eu [email protected]
ULTRA Line

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Table of Contents
1 Preface.....................................................................................................................................6
1.1 About this manual.............................................................................................................6
1.2 Copyrights/Tra emarks.....................................................................................................6
1.3 Stan ar s..........................................................................................................................6
1.4 Disclaimers.......................................................................................................................6
1.5 Warranty............................................................................................................................6
1.6 Technical Support.............................................................................................................7
1.7 Relate ocuments...........................................................................................................8
1.8 Conventions, Abbreviations, Acronyms............................................................................8
2 Intro uction.............................................................................................................................11
2.1 Pro uct Highlights...........................................................................................................12
2.2 Block DiagramBlock Diagram.........................................................................................13
2.3 Feature Summary...........................................................................................................14
3 Design overview.....................................................................................................................16
3.1 “DaVinci” DM814x / “Sitara” AM387x CPU.....................................................................16
3.2 DDR3 memory bank.......................................................................................................18
3.3 NOR flash bank...............................................................................................................18
3.4 NAND flash bank............................................................................................................18
3.5 Memory Map...................................................................................................................19
3.6 Power supply unit...........................................................................................................19
3.7 CPU mo ule connectors.................................................................................................19
4 Mechanical specifications......................................................................................................21
4.1 Boar Layout...................................................................................................................21
4.2 Connectors......................................................................................................................23
5 System Logic..........................................................................................................................24
5.1 Power..............................................................................................................................24
5.2 PMIC...............................................................................................................................24
5.3 Reset...............................................................................................................................24
5.3.1 MRST (J2.102)........................................................................................................24
5.3.2 PORSTn (J2.109)....................................................................................................24
5.3.3 RSTOUTn (J2.91)....................................................................................................25
5.3.4 CPU_RESETn (J2.15).............................................................................................25
5.3.5 JTAG_TRSTn (J2.100)............................................................................................25
5.4 Voltage monitor...............................................................................................................25
5.5 Boot options....................................................................................................................25
5.5.1 Default boot configuration.......................................................................................26
5.5.2 Boot sequence customization.................................................................................27
5.6 Clock scheme.................................................................................................................27
5.7 Recovery.........................................................................................................................27
5.7.1 JTAG Recovery.......................................................................................................27
5.7.2 UART Recovery.......................................................................................................28
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5.7.3 SD/MMC Recovery..................................................................................................28
5.8 Multiplexing.....................................................................................................................28
5.9 RTC.................................................................................................................................29
6 Pinout table............................................................................................................................30
6.1 Carrier boar mating connector J1.................................................................................32
6.2 Carrier boar mating connector J2.................................................................................38
6.3 CPU mo ule mount options............................................................................................45
6.4 A itional notes...............................................................................................................46
6.4.1 EN_BCK_LS............................................................................................................46
7 Peripheral interfaces..............................................................................................................47
7.1 Digital Vi eo Output (DVO).............................................................................................47
7.1.1 VOUT0.....................................................................................................................47
7.1.2 VOUT1.....................................................................................................................48
7.2 HDMI...............................................................................................................................49
7.3 Analog SDTV out............................................................................................................50
7.4 Digital Vi eo Input ports..................................................................................................51
7.4.1 VIN0.........................................................................................................................52
7.4.2 VIN1.........................................................................................................................54
7.5 Ethernet ports.................................................................................................................55
7.5.1 EMAC_RMREFCLK................................................................................................56
7.5.2 Ethernet 10/100.......................................................................................................56
7.5.3 Gigabit EMAC..........................................................................................................57
7.6 CAN ports.......................................................................................................................58
7.6.1 DCAN0.....................................................................................................................58
7.6.2 DCAN1.....................................................................................................................58
7.7 UARTs.............................................................................................................................59
7.7.1 UART0.....................................................................................................................59
7.7.2 UART3.....................................................................................................................60
7.7.3 UART5.....................................................................................................................60
7.8 MMC/SD channels..........................................................................................................61
7.8.1 MMC/SD/SDIO0......................................................................................................61
7.8.2 MMC/SD/SDIO1......................................................................................................62
7.8.3 MMC/SD/SDIO2......................................................................................................63
7.9 USB ports........................................................................................................................63
7.9.1 USB0.......................................................................................................................63
7.9.2 USB1.......................................................................................................................64
7.9.3 USB2.......................................................................................................................64
7.9.4 Other USB signals...................................................................................................64
7.10 Touchscreen..................................................................................................................65
7.11 EEPROM.......................................................................................................................65
7.12 Keypa controller..........................................................................................................65
7.13 PCI Express..................................................................................................................66
7.14 SPI buses......................................................................................................................67
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7.14.1 SPI1.......................................................................................................................67
7.14.2 SPI2.......................................................................................................................68
7.14.3 SPI3.......................................................................................................................68
7.15 I2C buses......................................................................................................................69
7.15.1 I2C2.......................................................................................................................69
7.15.2 I2C3.......................................................................................................................69
7.16 SATA.............................................................................................................................70
7.17 Au io interfaces............................................................................................................70
7.17.1 McASP2.................................................................................................................71
7.18 GPIOs...........................................................................................................................71
7.19 Local Bus......................................................................................................................71
8 Operational characteristics....................................................................................................75
8.1 Maximum ratings.............................................................................................................75
8.2 Recommen e ratings....................................................................................................75
8.3 Power consumption........................................................................................................75
8.3.1 Set 1........................................................................................................................76
8.3.2 Use cases................................................................................................................76
8.4 Heat Dissipation..............................................................................................................77
9 Application notes....................................................................................................................78
Index of Tables
Tab. 1: Relate ocuments........................................................................................................8
Tab. 2: Abbreviations an acronyms use in this manual..........................................................9
Tab. 3: CPU, Memories, Busses..............................................................................................14
Tab. 4: Peripherals...................................................................................................................15
Tab. 5: Electrical, Mechanical an Environmental Specifications............................................15
Tab. 6: DM814x/AM387x comparison......................................................................................18
Tab. 7: DDR2 specifications.....................................................................................................18
Tab. 8: NOR flash specifications..............................................................................................18
Tab. 9: NAND flash specifications............................................................................................19
Tab. 10: ZFF form factor – example of pinout ifferences.......................................................20
Illustration Index
Fig. 1: DIDO CPU mo ule.........................................................................................................11
Fig. 2: DIDO (top-right), NAON (top-left) an MAYA (bottom)...................................................11
Fig. 3: DIDO SOM (top view)....................................................................................................12
Fig. 4: Boar layout - top view..................................................................................................21
Fig. 5: Boar layout - size view.................................................................................................22
Fig. 6: Connectors layout..........................................................................................................23
Fig. 7: Simplifie schematics of EN_BCK2_LS internal pin configuration................................46
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1 Preface
1.1 About this manual
This Hardware Manual describes the DIDO CPU modules
family design and functions.
Precise speci cations for the Texas Instruments DM814x and
AM387x processors can be found in the CPU datasheets and/or
reference manuals.
1.2 Copyrights/Trademarks
Ethernet® is a registered trademark of XEROX Corporation.
All other products and trademarks mentioned in this manual
are property of their respective owners.
All rights reserved. Speci cations may change any time without
noti cation.
1.3 Standards
DAVE Embedded Systems Srl is certi ed to ISO 9001
standards.
1. Disclaimers
DAVE Embedded Systems does not assume any responsibility
about availability, supplying and support regarding all the
products mentioned in this manual that are not strictly part of
the DIDO CPU module.
DIDO CPU Modules are not designed for use in life support
appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal
injury. DAVE Embedded Systems customers who are using or
selling these products for use in such applications do so at their
own risk and agree to fully indemnify DAVE Embedded
Systems for any damage resulting from such improper use or
sale.
1.5 Warranty
DIDO is warranted against defects in material and
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workmanship for the warranty period from the date of
shipment. During the warranty period, DAVE Embedded
Systems will at its discretion decide to repair or replace
defective products. Within the warranty period, the repair of
products is free of charge as long as warranty conditions are
observed.
The warranty does not apply to defects resulting from improper
or inadequate maintenance or handling by the buyer,
unauthorized modi cation or misuse, operation outside of the
product’s environmental speci cations or improper installation
or maintenance.
DAVE Embedded Systems will not be responsible for any
defects or damages to other products not supplied by DAVE
Embedded Systems that are caused by a faulty DIDO module.
1.6 Technical Support
We are committed to making our product easy to use and will
help customers use our CPU modules in their systems.
Technical support is delivered through email to our valued
customers. Support requests can be sent to
[email protected].
Software upgrades are available for download in the restricted
access download area of DAVE Embedded Systems web site:
http://www.dave.eu/reserved-area. An account is required to
access this area and is provided to customers who purchase the
development kit (please contact [email protected] for
account requests)..
Please refer to our Web site at
http://www.dave.eu/dave-cpu-module-dm814x-dido.html for the
latest product documentation, utilities, drivers, Product
Change Noti cations, Board Support Packages, Application
Notes, mechanical drawings and additional tools and software.
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1.7 Related documents
Document Location
DAVE Embedded
Systems
Developers Wiki
http://wiki.dave.eu/index.php/Main_Pa
ge
TMS32 DM814x
DaVinci
Technical
Reference Manual
http://www.ti.com/litv/pdf/sprugz8d
DM814x Overview
(on TI Embedded
Processors Wiki )
http://processors.wiki.ti.com/index.ph
p/DM814x_Overview
Integration guide
(on DAVE
Embedded
Systems
Developers Wiki)
http://wiki.dave.eu/index.php/Integrati
on_guide_%28Dido%29
Tab. 1: Related documents
1.8 Conventions, Abbreviations, Acronyms
Abbreviation Definition
BTN Button
DSP Digital Signal Processor
DVO Digital Video Output
GPI General purpose input
GPIO General purpose input and output
GPO General purpose output
HDVPSS HD Video Processing Subsystems
HDVCIP HD Video Image Coprocessing
NELK NAON Embedded Linux Kit
PCB Printed circuit board
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Abbreviation Definition
RTC Real time clock
SOM System on module
VIP Video Input Port
PMIC Power Management Integrated Circuit
ZFF Z Form Factor
Tab. 2: Abbreviations and acronyms used in this manual
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Revision History
Version Date Notes
.9. March 2 13 First Draft
.9.1 March 2 13 First Release
.9.2 March 2 13 First Release with DIDO
development kit
Minor fixes
1. . April 2 13 Released with NELK 4. .
Minor fixes
1. .1 May 2 13 Added information on
EMAC_RMREFCLK signal
Minor fixes
1. .2 December 2 13 Fixed JTAG_TDO and JTAG_TCK
pinout table entries
1. .3 January 2 14 Updated pin J2.97 information
Minor fixes
1. .4 April 2 14 SPI2: removed J2.36 from the
muxable signals
Added HDMI CEC and HPDET
information
1. .5 August 2 14 Added EMAC_RMREFCLK
termination resistors information
Updated block diagram
Minor fixes
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2 Introduction
DIDO is a ready-to-use CPU module/SOM family, based on
Texas Instruments
Cortex-A8 high performance
application processor from
DM814x (“DaVinci”) and
AM387x (“Sitara”) models.
DIDO is is the cutting edge
solution for a high range of
applications, including video
surveillance cameras,
medical video analysis,
smart home controllers,
security systems,
automation and point of
service.
DIDO is the rst
product of DAVE
Embedded Systems
ULTRA Line CPU
modules class, which
includes best-in-class
solutions and
full-featured SOMs.
DIDO shares the same
DM814x processor
with MAYA (LITE Line)
and NAON (ESATTA
Line) and is built with
the same connectors
format (ZFF) as NAON
and LIZARD (ESATTA
Line).
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Fig. 1: DIDO CPU module
Fig. 2: DIDO (top-right), NAON
(top-left) and MAYA (bottom)

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2.1 Product Highlights
●Top class CPU module family based on Texas
Instruments DM814x/AM387x processors models.
●ARM Cortex-A8 architecture @ up to 1 GHz
●Up to 2 GB DDR3 @ 533 MHz SDRAM
●HD Video Encoding/Decoding Capabilities
(High-De nition Video Image Coprocessing – HDVICP v2
engine)
●Multiple video input and output channels
●C674x DSP engine (available on DM8148)
●NEON Multimedia co-processor and PowerVR® SGX
530 Vector/3D Graphics Engine
●On-board flash (NOR and NAND) storage
●Small form factor
●Rich interfaces set including PCI Express, dual CAN,
dual Ethernet, SATA and native 3.3V I/O
●NAON and LIZARD (ESATTA Line) pinout compatible
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Fig. 3: DIDO SOM (top view)

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2.2 Block DiagramBlock Diagram
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2.3 Feature Summary
Feature Specifications Options
CPU “DaVinci” DM814x
“Sitara” AM387x
ARM v7 architecture
Up to 1 GHz
RAM DDR3 SDRAM @ 533 MHz
Up to 2 GB
Storage Flash NOR SPI
Flash NAND on Local bus
I²C 32 kbit EEPROM
External local
bus
16 bit GPMC
Expansion bus One PCI Express 2. Port With Integrated
PHY (5. GT/s Endpoint/Root Complex
port)
Tab. 3: CPU, Memories, Busses
Feature Specifications Options
Graphics
Controller
HD Video Processing Subsystem
(HDVPSS)
1x up to 24 bit HD Video Output port
1x up to 18 bit HD Video Output port
1x HDMI 1.3 channel + DDC
Analog TV output
TFT/RGB support
2D/3D Engines NEON Multimedia SIMD coprocessor
PowerVR SGX 53 3D Accelerator
Coprocessors Up to 75 MHz C674x VLIW DSP
HD Video Coprocessor HDVICP v2
Video capture 2x HD Video Input port
USB 2x USB Host 2. , 48 Mbps, with PHY
1x USB OTG, 48 Mbps (integrated PHY)
UARTs 3x UARTs
GPIO Up to 128 lines, shared with other
functions (interrupts available)
Input
interfaces
TSC2 3 4-wire resistive touch screen
controller
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Feature Specifications Options
Available ADC channel
Up to 8x8 keypad controller
Networks 1x Fast Ethernet with PHY
1x GRMII 1 /1 /1 Mbps interface
High-end Dual CAN controller
Storage Serial ATA 3. Gbps with integrated PHY
SD/MMC Up to 3x MMC/SD/SDIO Serial interfaces
(up to 48 MHz)
Serial buses 2x I²C, 3x SPI
Audio 1x McASP channel
Timers Up to 6 programmable general purpose
timers (PWM function available)
RTC On board (provided by TPS659113
PMIC), external battery powered
Debug JTAG
EMU port
Tab. : Peripherals
Feature Specifications Options
Supply
Voltage
+3.3V
Active power
consumption
See section 8.3 - Power consumption
Dimensions 68.6 mm x 59.7 mm
Weight <tbd>
MTBF <tbd>
Operation
temperature
..7 °C
-4 ..+85 °C
Shock <tbd>
Vibration 1 G resistance
Connectors 2x 14 pin
Connectors
insertion/remo
val
<tbd>
Tab. 5: Electrical, Mechanical and Environmental Specifications
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3 Design overview
The heart of DIDO module is composed by the following
components:
●Texas Instruments DM814x/AM387x processor
●Power supply unit
●DDR3 memory banks
●NOR and NAND flash banks
●2x 140 pin connectors with interfaces signals
This chapter shortly describes the main DIDO components.
3.1 “DaVinci” DM81 x / “Sitara” AM387x CPU
DM814x DaVinci™ and AM387x Sitara™ are highly-integrated,
scalable and programmable CPU families from Texas
Instruments.
DaVinci™ digital media processor solutions are tailored for
digital audio, video, imaging, and vision applications.
Sitara™ ARM microprocessors (MPUs) are designed to
optimize performance and peripheral support for customers in
a variety of markets.
The architecture is designed to provide video, image, graphics
and processing power suf cient to support the following:
●Home and Industrial automation
●Test and measurement
●Digital Signage
●Medical instrumentation
●Remote monitoring
●Motion control
●Point-of-Sale
●Single Board Computers
The following subsystems are part of the device:
●Microprocessor unit (MPU) subsystem based on the ARM®
Cortex™-A8 architecture:
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ARM Cortex-A8 RISC processor, with Neon™
Floating-Point Unit, 32KB L1 Instruction Cache, 32KB L1
Data Cache and 512KB L2 Cache
CoreSight Embedded Trace Module (ETM)
ARM Cortex-A8 Interrupt Controller (AINTC)
Embedded PLL Controller (PLL_ARM)
●PowerVR SGX 530 subsystem for vector/3D graphics
acceleration to support display and gaming effects
●The HDVICP2 is a Video Encoder/Decoder hardware
accelerator supporting a range of encode, decode, and
transcode operations for most major video codec standards.
The main video Codec standards supported in hardware are
MPEG1/2/4 ASP/SP, H.264 BL/MP/HP, VC-1 SP/MP/AP,
RV9/10, AVS-1.0, and ON2 VP6.2/VP7.
●The C674x DSP core is the high-performance floating-point
DSP generation in the TMS320C6000™ DSP platform and is
code-compatible with previous generation C64x Fixed-Point
and C67x Floating-Point DSP generation. The C674x
Floating-Point DSP processor uses 32KB of L1 program
memory with EDC and 32KB of L1 data memory. The DSP
has 256KB of L2 RAM with ECC, which can be de ned as
SRAM, L2 cache, or a combination of both.
●The high de nition video processing subsystem (HDVPSS)
includes video/graphics display and capture processing
using the latest TI developed algorithms, flexible
compositing and blending engine, and a full range of
external video interfaces in order to deliver high quality
video contents to the end devices.
The following table shows a comparison between the devices,
highlighting the differences:
Processor DSP 3D HDVICP HDVPSS Max clock
speed
DM8148 Yes Yes Yes Yes 1 GHz
DM8147 Yes n.a. Yes Yes 1 GHz
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Processor DSP 3D HDVICP HDVPSS Max clock
speed
AM3874 n.a. Yes n.a. Yes 1 GHz
AM3872 n.a. n.a. n.a. Yes 1 GHz
AM3871 n.a. n.a. n.a. n.a. 1 GHz
Tab. 6: DM814x/AM387x comparison
3.2 DDR3 memory bank
DDR3 SDRAM memory bank is composed by 4x 16-bit width
chips resulting in 2x 32-bit combined width banks.
The following table reports the SDRAM speci cations:
CPU connection SDRAM bus
Size min 128 MB
Size max 2 GB
Width 32 bit
Speed 533 MHz
Tab. 7: DDR2 specifications
3.3 NOR flash bank
NOR flash is a Serial Peripheral Interface (SPI) device. By
default this device is connected to SPI channel 0 and acts as
boot memory.
The following table reports the NOR flash speci cations:
CPU connection SPI channel
Size min 4 MByte
Size max 128 MByte
Bootable Yes
Tab. 8: NOR flash specifications
3. NAND flash bank
On board main storage memory is a 8-bit wide NAND flash. By
default it is connected to GPMC_NCS0 chip select. Optionally it
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can be connected to GPMC_NCS7.
CPU connection GPMC bus
Page size 512 byte, 2 kbyte or 4 kbyte
Size min 32 MByte
Size max 2 GByte
Width 8 bit
Bootable Yes
Tab. 9: NAND flash specifications
3.5 Memory Map
The total system memory is divided across various
processors/subsystems. Due to this “multiprocessor” nature,
Memory Mapping for DIDO Module is quite complex, since it
involves the Cortex-A8 core, the two Media Controllers
(Cortex-M3, that take care of the HDVPSS and HDVCIP
subsystems) and the DSP. NELK Memory Map is described in
detail on the dedicated page on the Developer's Wiki:
http://wiki.dave.eu/index.php/Memory_organization_%28Dido
%29
3.6 Power supply unit
DIDO, as the other Performance Line CPU modules, embeds all
the elements required for powering the unit, therefore power
sequencing is self-contained and simpli ed. Nevertheless,
power must be provided from carrier board, and therefore
users should be aware of the ranges power supply can assume
as well as all other parameters. For detailed information,
please refer to Section 5.1.
3.7 CPU module connectors
All interface signals DIDO provides are routed through two 140
pin 0.6mm pitch stacking connectors (named J1 and J2). The
host board must mount the mating connectors and connect the
desired peripheral interfaces according to DIDO pinout
speci cations.
DIDO modules belongs to the ULTRA Line product class, but
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the basic connectors pinout (called ZFF, Z Form Factor) is
compatible with NAON and LIZARD SOMs. This means that the
interfaces that are in common with the modules of the same
class are routed on the same connector pins: for example, USB
ports (which are implemented on each module) can be found on
the same J1 and J2 pins. On the contrary, speci c interfaces
that are available only on one module are replaced with
different interfaces on the other modules. As an example, the
following table reports the three con guration of pin J2.33:
Module LIZARD NAON DIDO
Pin J2.33 J2.33 J2.33
Interface LATCH VOUT -
Pin name LATCHED_A2 VOUT _FLD/CA
M_PCLK/GPMC_
A12/GP2_ 2
DGND
Function Latched
address bit 2
Digital Video
Output Field ID
output
Ground
Tab. 10: ZFF form factor – example of pinout differences
For mechanical information, please refer to Section 4
(Mechanical speci cations). For pinout and peripherals
information, please refer to Sections 6 (Pinout table) and 7
(Peripheral interfaces).
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