Digital Equipment KXJ11-CA User manual

EK-KXJCA-IN-001
KXJ11-CA
Single-Board Computer.
Installation Guide

EK-KXJCA-IN-001
KXJ11-CA
Single-Board Computer
Installation Guide
Prepared by Educational Services
of Digital Equipment Corporation

1st Edition, December 1986
Copyright @ 1986 by Digital Equipment Corporation.
All Rights Reserved.
Printed in U.S.A.
The reproduction of this material, in part or whole, is strictly prohibited. For copy
information, contact
the Educational Services Department, Digital Equipment
Corporation, Marlboro, Massachusetts
01 752.
The information in this document is subject to change without notice. Digital
Equipment Corporation assumes no responsibility for any errors
that may appear in
this document.
The
following are trademarks of Digital Equipment Corporation, Maynard,
Massachusetts 01754.
mamaD!DTM
KA630 Q-Bus
VAX
DEC
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MicroVAX RSTS VMS
DECUS PDP
RSX VT
DECwriter P/OS RT Work Processor
DIBOL Professional UNIBUS

Contents
Chapter 1 - Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-1
Chapter 2 - Selecting Operating Features. . . . . . . . . . . . . . . . .. 2-1
2.1 Boot/Self-Test Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-3
2.2 Q-Bus Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-8
2.3 Q-Bus Base Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-9
2.4 DMA Requests ...................................... 2-11
2.5 Locked Instruction Enable
............................... 2-12
2.6 BREAK Enable Selection
............................... 2-13
2. 7 HALT Option Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.8 Power-Up Option Selection .............................. 2-15
2.9 PROM Addressing ................................... 2-16
2.10 SLU1 Baud Rate .................................... 2-17
2.11 SLU1 Transmitter ................................... 2-19
2.12 SLU1 Receiver
..................................... 2-20
2.13 SLU2 Channel A Receiver .............................. 2-21
2.14 SLU2 Channel B Transmitter
............................ 2-22
2.15 SLU2 Channel B Receiver
.............................. 2-24
2.16 Real-Time Clock
Interrupt .............................. 2-25
Chapter 3 - Power Supply Considerations. . . . . . . . . . . . . . . . .. 3-1
Chapter 4 - Installing the KXJ11-CA in a Backplane. . . . . . . . . .. 4-1
4.1 Edge Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . .. 4-3
Chapter 5 - Connectors and External Cabling . . . . . . . . . . . . . .. 5-1
5.1 Parallel I/O Interface (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-1
5.2 Serial 110 Lines (J1, J2, J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-2
5.3 Loopback Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-8
Chapter 6 - Diagnostics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-1
6.1 Error Detection and Reporting with the LEDs. . . . . . . . . . . . . . . . . .. 6-1
6.2 Diagnostic Testing with XXDP+. . . . . . . . . . . . . . . . . . . . . . . . . .. 6-3
iii

Figures
2-1 KXJ11-CA Jumper Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
2-2 Memory Mapping -PROM in Low Melnory. . . . . . . . . . . . . . . . . . .. 2-3
2-3 Memory Mapping -PROM in High Menlory . . . . . . . . . . . . . . . . . .. 2-4
2-4 Boot/Self-Test Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-5
2-5 Q- Bus Size Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-8
2-6 Q- Bus Base Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2-7 DMA Requests ...................................... 2-11
2-8 Locked Instruction Enabie ............................... 2-12
2-9 BREAK Enable ..................................... 2-13
2-10 HALT Option Selection ................................ 2-14
2-11 Power-Up Option Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2-12 PROM Addressing
................................... 2-16
2-13 SLU1 Baud Rate
.................................... 2-17
2-14 SLU1
Transmitter ................................... 2-19
2-15 SLU1 Receiver
..................................... 2-20
2-16 SLU2 Channel A Receiver .............................. 2-21
2-17 SLU2 Channel B Transmitter
............................ 2-23
2-18 SLU2 Channel B Receiver .............................. 2-24·
2-19 Real-Time Clock Interrupt .............................. 2-25
4-1 Backplane Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
4-2 Using Grant Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-2
5-1 Parallel 110 Interface Pin Assignments . . . . . . . . . . . . . . . . . . . . . .. 5-1
5-2 J2 and J3 Pin Assignments (lO-Pin) . . . . . . . . . . . . . . . . . . . . . . . .. 5-3
5-3 J1 Pin Assignments (40-Pin) ...................... : . . . . . .. 5-3
5-4 Loopback Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-8
Tables
2-1 Factory Shipped Jumper Configuration . . . . . . . . . . . . . . . . . . . . . .. 2-2
2-2 Boot/Self-Test Switch Functions . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-5
2-3 Q-Bus Base Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-9
2-4 SLU1 Baud Rate Jumpering .............................. 2-18
4-1 KXJ11-CA Pin Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-3
5-1 RS422/RS423 Interface to J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-4
5-2 RS232-C Interface to J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-6
5-3 CCITTN.35 Interface to J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-7
6 .. 1 LED Display Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-2
iv

Chapter 1
Introduction
This guide describes how to install the KXJ 11-CA module.
NOTE
Before changing the factory shipped jumper configuration, make
sure the jumpers match the jumpers shown in Figure 2-1, and ver-
ify
that the module is operating as described in Section 6.2.
Installation includes
the following activities.
1. Selecting operating characteristics and installing appropriate jumpers
(Chapter
2)
2. Determining power supply requirements (Chapter 3)
3. Installing the board into a backplane (Chapter 4)
4. Selecting and connecting cables from serial and parallel 110 interfaces to
external devices (Chapter 5)
5. Verifying proper operation (Chapter 6)
1-1

Chapter 2
Selecting Operating Features
Several characteristics of the KXJ11-CA are defined by jumper settings. This section
describes the characteristics that
are part of the factory-shipped configuration. It also
shows
how to change these characteristics by changing the appropriate jumpers.
Figure
2-1 illustrates the factory-shipped jumper settings. Table 2-1 summarizes the
meaning of each jumper setting. The sections that
follow describe the various jumper
setting alternatives available.
M65
M64 I M66
o 0
Figure 2-1
M48 M47 M34 0 0
M33
M32 0 0 M31
M30 0 0 M29
M44 0 0 M43 M28 0 0 M27
M60~M59 0 M54 M42~M41 M26 0 0 M25
M58
0 0 M57 fOlM53 M40~M39 M24 0 0 M23
M56
~ M55 ~ M52
SLUI !SLU2 SLU2
I r:~cel r:'" II '"~:""
I
M20~
I 010 SWITCH ~~~ : r ~
I~ M63 M61
...---f M62
; .§] 1 FI:[oI' M';:"
_____ I 000 ~
g ~ M2 M4 M6 Ml5 M14
D
D
KXJII-CA Jumper Layout
2-1
M37~
Ml9 0 0 M38
Ml8 0 ?? \ O-M35
V
M461 f"O"Ol M36
M45
'+-+-' '\';149
~ 0 0 0 ~o M51 M50
1:2:2]0

Table 2-1 Factory Shipped JUlnper Configuration
Function
Q-Bus Size
Q-Bus Base Address
ID Switch Position
DMA Requests
SLU2 Channel A Receiver
8036 Counter/Timer
SLU2 Channel A Transmitter
Locked Instruction Enable
BREAK Enable
HALT Option Selection
Power-Up Option Selection
PROM Addressing
SLU1 Baud Rate
SLU1 Transmitter
SLU1 Receiver
SLU2 Channel A Receiver
SLU2 Channel B Transmitter
SLU2 Channel B Receiver
Real-Time Clock
Interrupt
Boot/Self-Test Switch Position
NOTE
Setting
22 bits
17760240
5
Enabled
Disabled
Enabled
Disabled
Enabled
MicroODT
Firmware
15-bit
9600
RS423
RS423
RS422
RS422
RS422
60Hz
5
Jumpers Installed
M3 to M4
M5
to M6
M1 to M2
M10 to MIl
M7 to M8
M65
to M66
M12
to M13
M14
to M15
No jumper
No jumper
M56 to M55
M60 to M59
M62
to M61
No
jumper
M34 to M33
M32
to M31
M30 to M29
M28
to M27
M26
to M25
M24
to M23
M38
to M36
M51
to M50
M42 to M41
M40 to M39
M20 to M21
M52
to M53
The SLU2 Channel A Transmitter is not configured with jumpers,
but is configured by selecting appropriate signals on connector J1.
2-2

2.1 Boot/Self-Test Switch
The boot/self-test switch is a I6-position switch that is used if the board is configured
to execute firmware (rather
than MicroODT) upon power-up. It has three functions.
1. It determines how the KXJII-CA will act when a special interrupt condition
exists, including whether or not self-tests
will run (see Section 3.5, The
KXJJJ-CA Single-Board Computer User's Guide, EK-KDJCA-UG-OOI).
2. It determines whether special interrupt handling is performed either by
user code or by firmware.
3. It determines where in memory the on-board PROM is mapped. There are
two alternatives -
low memory or high memory. The memory maps associ-
ated with
low and high PROM mapping are shown in Figures 2-2 and 2-3,
respectively.
17777777
17774000
17773777
17773000
17772777
17770000
17767777
17760000
17757777
,.1".
,."
2200000
2177777
2174000
2173777
2173000
2172777
2170000
2167777
2160000
2157777
2000000
1777777
77777
POWER UP
1
I/O PAGE
MONITOR AND
DIAGNOSTICS 1
NXM
,.~
"r"
POWER UP
T
NATIVE
FIRMWARE
MONITOR AND
DIAGNOSTICS 1
USER PROM
RAM
o
l~p'Ror~/RAM SPACE ":_
• ADDRESSES 77777-0 MATCH ADDRESSES 2077777-2000000
\1R-17263
Figure 2-2 Memory Mapping -PROM in Low Memory
2-3

17777777 I
17774000
17773777
POWER UP
17773000
I /0 PAGE
17772777
17770000
1
1776777 7
MONITOR AND
DIAGNOSTICS
1776000
0
1775777
7
,.1.-
NXM
.... 1.-
....
I'i""
220000
0
217777 7 I
2174000
217377 7 POWER
UP
217300
0
2172777
NATIVE
FIRMWARE
217000 0 1
216777
7
MONITOR AND
DIAGNOSTICS
216000 0
215777
7
USER PROM
200000 0
1777777
RAM
0
MR-17262
Figure 2-3 Memory Mapping -
PROM in High Memory
2-4

The location of the boot/self-test switch is shown in Figure 2-4. Table 2-2 summarizes
the functions associated with each switch position.
Table
2-2
Switch
Position
0
1
BOOT/SELF-
TEST SWITCH
D
DI
..
..
.. . ....
..
.. ..
.. ..
....
D
D
Figure 2-4
Boot/Self-Test Switch
Boot/Self- Test Switch Functions
KXJII-CA
Special Interrupt Response
User PROM application code is
executed. No self-tests
are
performed.
User PROM application code is
executed. Auto self-tests
are
performed.
2-5
.. .
.. .
'0
..
..
Special
.....
...
MR-16215
Interrupt
Handling
Firmware
Firmware
PROM
Mapping
Low
Low

Table 2-2 Boot/Self-Test Switch Functions (Cont)
Special
Switch
KXJII-CA
Interrupt
PROM
Position Special Interrupt Response Handling Mapping
2 User PROM application code is Firmware Low
executed. Auto self-tests
are
performed. The user (P)ROM
checksum test is also performed.
3 Application code is booted from Firmware High
a TU58 via
SLUl. Auto self-tests
are performed, then the TU 58
primary bootstrap is executed.
4 MicroODT is entered. No self-tests Firmware High
are performed.
5 Auto self-tests
are performed. Firmware High
The KXJII-CA awaits command from
the arbiter via TPRO.
6 No self-tests
are performed. Firmware High
The KXJII-CA awaits a command
from
the arbiter via TPRO.
7 Auto self-tests
are performed None High
continuously. No application
code is booted or executed.
Loopback connectors (see
Section 5.3) are installed
for
these tests.
8 User PROM application code is
User Code Low
executed. No self-tests
are
performed.
9
User PROM application code is
User Code Low
executed. Auto self-tests
are
performed.
10
User PROM application code is
User Code Low
executed. Auto self-tests
are
performed. The user (P)ROM
checksum test is also performed.
11
Application code is booted from
User Code High
a TU58 via
SLUl. Auto self-tests
are performed, then the TU58
primary bootstrap is executed.
12
MicroODT is entered. No self-tests
User Code High
are performed
2-6

Table 2-2
Switch
Position
13
14
15
Boot/Self-Test Switch Functions (Cont)
KXJII-CA
Special Interrupt Response
Auto self-tests are performed.
The KXJ11-CA awaits a command
from
the arbiter via TPRO.
No self-tests are performed.
The KXJ11-CA awaits a command
from
the arbiter via TPRO.
Auto self-tests are performed
continuously. No application
code is booted or executed.
Loopback connectors (see
Section 5.3~ are installed
for these tests.
NOTES
Special
Interrupt
Handling
User Code
User Code
None
1. Switch position 5 is the factory-shipped configuration.
2. The encoded value of the boot/self-test switch position is avail-
able in
the KXJCSRB register in bits <7:4 >. For example,
switch position 1 would be encoded as 0001 in KXJCSRB
<7:4>.
3. The user (P)ROM checksum test looks for a checksum at the
highest word address of user (P)ROM. Similarly, the firmware
checksum
test looks for a checksum at the highest word ad-
dress of
the firmware PROM. Either checksum is calculated
and checked according to the following DECPROM algorithm:
CHECKSUM = 0
FOR I = number of PROM addresses to be checksumed
DO CHECKSUM = CHECKSUM + contents of address
(high order carry from addition is discarded)
CHECKSUM = ROTATE_LEFT_ONE_BIT (bitO ~ bit1,
bit1
~ bit2, .... ,bit15 ~ bitO) NEXT I
4. Special interrupt handling can be performed by user code in
switch positions 8-15. This function is useful in applications
that need to continue running after the Q-Bus signal BHALT
or
the Q-Bus signal BINIT has been asserted. For switch posi-
tions 0 through
7, special interrupt handling is done by
firmware.
5. If the KXJ11-CA is in standalone mode, switch positions 5, 6,
13, and 14 should not be used. These positions cause
the
KXJ11-CA to idle and wait for a command. In standalone
mode,
the KXJ11-CA will idle indefinitely, waiting for an arbi-
ter command that will never come.
2·7
PROM
Mapping
High
High
High

2.2 Q-Bus Size
The KXJ11-CA may be configured to handle 16-, 18-, or 22-bit Q-Bus addressing. This
is accomplished with
the Q-Bus size jumpers (see Figure 2-5). 22-bit addressing is se-
lected as part of the factory-shipped configuration.
Jumper Connection Description
M3
b b
M:5
22-bit addressing selected*
M4 M6
M3 0 b M5
18-bit addressing selected
M4
0 M6
M3
X 0
M5
16-bit addressing selected
M4 0
M6
..... 01 L-- __ ID
01
....
..
.. ..
.. ..
...
.. ..
D
D
Figure 2-5
Q-Bus Size Selection
* Factory-shipped configuration
2-8
10
M30
oM5
M40
oM6
: .. :::
MR-16216

.2.3 Q-Bus Base Address Selection
In systems with multiple I/O processor boards, make sure each board has a unique
Q-Bus base address to distinguish the boards from one another. This is accomplished
on
the KXJII-CA by setting the ID switch and installing or removing a jumper which
connects Ml and M2.
Table
2-3 lists the base addresses that can be selected. Table 2-3 lists 22-bit addresses.
If the KXJII-CA is configured for 16- or 18-bit addressing, use the lower 16 or 18 bits
of the addresses specified in Table 2-3.
Table
2-3 Q-Bus Base Address Selection
Base Address Base Address
ID Switch Position (Jumper IN) (Jumper OUT)
0 * *
1 * *
2 17760100 17762100
3 17760140 17762140
4 17760200 17762200
5t 17760240t 17762240
6 17760300 17762300
7 17760340 17762340
8 17775400 17777400
9 17775440 17777440
10 17775500 17777500
11 17775540 17777540
12 17775600 17777600
13 17775640 17777640
14 17775700 17777700
15 17775740 17777740
* These switch positions disable the Q-Bus interface. That is, the KXJII-CA is run-
ning in standalone mode.
Factory-shipped configuration
2-9

Figure 2-6 shows the locations of jumper connections M1 and M2, and the ID switch.
The factory-shipped base address is 17760240.
Jumper Connection
M1
M2
Description
Factory-shipped configuration
Base address = 17760240
..... 0 IL----------'I.~
Figure 2-6
.. .
D
D
Q- Bus Base Address Selection
2-10
: .. :::
MA-16217

2.4 DMA Requests
DMA requests to the on-board DMA transfer controller (DTC) may come from several
sources. The
KXJII-CA has a set of jumpers that enable or disable DMA requests
from: (1)
the SLU2 channel A receiver, (2) the SLU2 channel A transmitter, or (3) the
on-board 8036 PIO counter/timer. The location of these jumpers is shown in Figure
2-7. Only two of the three sources may be specified (jumpered) at one time. The two
sources
that are jumpered as part of the factory configuration are SLU2 channel A
receiver and SLU2 channel A transnlitter.
Jumper Connection
MIl MIO
M9 M8 M7
0---0
0 0 0
MIl MIO
M9
M8 M7
0 0 0----0
0
MIl MIO M9 M8 M7
0 0 0
0---0
NOTE
Description
Allows
DMA channel 0 requests from SLU2
channel A receiver*
Allows D
MA channel I requests from PIO
counter/timer (pin CI used as request line)
Allows DMA channel I requests from SLU2
channel A transmitter*
Do not connect a jumper between
MIO and M9. This configuration
is not supported.
Mll Ml0 M9 .MS M7
o 0 0 0 0
Figure 2-7
* Factory-shipped configuration
DMA Requests
2-11
D
D .....
...
MR-,6218

2.5 Locked Instruction Enable
The KXJII-CA has a set of jumpers that enable or disable the locking characteristic of
the WRTLCK, TSTSET, and ASRB interlocked instructions. The location of the jump-
ers is shown in Figure 2-8. Locking is disabled as part of the factory-shipped configura-
tion. For
most applications, locking must be disabled. If locking is enabled, a Q-Bus
timeout may cause a
trap to location 4 if the Q-Bus is heavily loaded, and one of these
instructions is executed.
JunIper Connection
M64 M65 M66
0 0 0
M64 M65 M66
0 0 0
M64 M65 M66
o 0 0
Figure 2-8
Description
The locking characteristic of
the WRTLCK,
TSTSET, and ASRB instructions is enabled
The locking characteristic of
the WRTLCK,
TSTSET, and ASRB instructions is
disabled*
..... 01 '--- _I.~
;; ;pl,--- ---,I 0
Locked Instruction Enable
D
D
.
. .
. .....
.. .
MR-l086-1235
* Factory-shipped configuration
2-12

2.6 BREAK Enable Selection
There is a jumper on the board that enables or disables console BREAK requests from
SLUI (the on-board DLART) to the J-I1. The location of this jumper is shown in
Figure 2-9. A
BREAK is generated by SLUI when a console terminal is attached to
the system and the BREAK key on the console keyboard is pressed. When BREAK is
received,
the J-II executes MicroODT. BREAK requests are enabled as part of the
factory-shipped configuration.
Junlper Connection
MI3
MI3
0----0
o 0
MI2
MI2
M12 M13
OO~
I~
Description
Console BREAK
requests enabled*
Console
BREAK requests disabled
D
D
...
... ..
Figure 2-9
BREAK Enable
* Factory-shipped configuration
2·13
. .
. .. :::
MR-16219