Espressif Systems ESP8266 Series Instruction Manual

www.espressif.com
ESP8266
Hardware Design Guidelines
Version 2.4
Espressif Systems
Copyright © 2018

About This Guide
This document provides product information of ESP8266EX series, including ESP8266EX
chip, ESP-LAUNCHER development board and ESP8266EX modules.
Release Notes
Documentation Change Notification
Espressif provides email notifications to keep customers updated on changes to
technical documentation. Please subscribe at https://www.espressif.com/en/subscribe.
Certification
Download certificates for Espressif products from https://www.espressif.com/en/
certificates.!
Date
Version
Release Notes
2015.12
V1.3
Initial release.
2016.01
V1.4
Update Section 1.5.2, Section 1.5.3 and Section 1.6.
2016.06
V1.5
Update Section 3.1.
2016.07
V1.6
Update Section 2.1.
2017.01
V2.0
Updated the minimum voltage of ESP8266EX to 2.5V;
Updated Table 1-1.
2017.04
V2.1
Updated the chip’s output impedance from 50Ωto 39+j6 Ω;
Added a note that the size of ESP-LAUNCHER’s Flash1 and Flash2 is 32
Mbit;
Updated Section 1.4.5.
2017.06
V2.2
Updated Section 1.4.2.
2018.04
V2.3
Updated the name of the document from “ESP8266 System Description”
to “ESP8266 Hardware Design Guidelines”;
Updated all the figures in the document;
Updated Section 1.4 Schematic Checklist;
Updated Chapter 3 ESP8266EX Module.
2018.12
V2.4
Updated description in Section 1.4.2 about reset;
Updated formatting.

Table of Contents
1. ESP8266EX 1............................................................................................................................
1.1. Overview!1"....................................................................................................................................
1.2. Specifications!2".............................................................................................................................
1.3. Pin Definitions!3"............................................................................................................................
1.4. Schematic Checklist!5"..................................................................................................................
1.4.1. Power Supply!6"...............................................................................................................
1.4.2. Power-on Sequence and Power Reset!8".........................................................................
1.4.3. Flash!8".............................................................................................................................
1.4.4. Crystal Oscillator!9"..........................................................................................................
1.4.5. RF!10"...............................................................................................................................
1.4.6. External Resistor 12K!10".................................................................................................
1.4.7. UART!10"...........................................................................................................................
1.5. Slave SDIO/SPI!11"........................................................................................................................
1.6. PCB Layout Design!12"..................................................................................................................
1.6.1. General Principles of PCB Layout Design!12"..................................................................
1.6.2. Positioning a ESP32 Module on a Base Board!13"..........................................................
1.6.3. Standalone ESP8266EX Module!14"................................................................................
1.6.4. ESP8266EX as a Slave Device!17"...................................................................................
1.6.5. Typical Layout Problems and Solutions!18"......................................................................
1.7. PCB Layout Design!19"..................................................................................................................
1.7.1. UART to Wi-Fi Smart Device!19"......................................................................................
1.7.2. Sensor!19".........................................................................................................................
1.7.3. Smart Light!20".................................................................................................................
1.7.4. Smart Plug!20"..................................................................................................................
2. ESP-LAUNCHER 21..................................................................................................................
2.1. Overview!21"..................................................................................................................................
2.2. Modules and Interfaces!21"............................................................................................................
2.3. Schematics!24"..............................................................................................................................
2.3.1. Interfaces!24"....................................................................................................................
2.3.2. 5V Power Supply!25"........................................................................................................
2.3.3. Test Module!25"................................................................................................................

2.4. Test Board!26"................................................................................................................................
3. ESP8266EX Module 27.............................................................................................................
3.1. ESP-WROOM-S2!27".....................................................................................................................
3.2. ESP-WROOM-02!27".....................................................................................................................
3.3. ESP-WROOM-02D/ESP-WROOM-02U!28...................................................................................

"
1. ESP8266EX
1. ESP8266EX
1.1. Overview
Espressif’s ESP8266EX delivers a highly integrated Wi-Fi SoC solution to meet the
continuous demand for efficient power usage, compact design and reliable performance in
the industry.
With its complete and self-contained Wi-Fi networking capabilities, ESP8266EX can
perform either as a standalone application, or as a slave to a host MCU. When ESP8266EX
hosts an application, it promptly boots up from the external flash. The integrated high-
speed cache optimizes the system's performance and memory.
Also, ESP8266EX can be applied to any micro-controller design as a Wi-Fi adaptor through
SPI/SDIO or I2C/UART interfaces.
Besides the Wi-Fi functionalities, ESP8266EX also integrates an enhanced version of
Tensilica’s L106 Diamond series 32-bit processor and on-chip SRAM. It can be interfaced
with external sensors and other devices through the GPIOs, resulting in low development
cost at early stage and minimum footprint. Software Development Kit (SDK) provides
sample codes for various applications.
ESP8266EX integrates antenna switches, RF balun, power amplifier, low-noise receive
amplifier, filters and power management modules. The compact design minimizes the PCB
size and the external circuitry.
ESP8266EX enables sophisticated features, such as:
•Fast switching between sleep and wake-up modes for efficient energy use;
•Adaptive radio biasing for low-power operation;
•Advanced signal processing;
•Spur cancellation;
•Radio co-existence mechanisms for common cellular, Bluetooth, DDR, LVDS, LCD
interference mitigation.
Figure 1-1 shows the functional blocks of ESP8266EX.
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1. ESP8266EX
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Figure 1-1. ESP8266EX Block Diagram
1.2. Specifications
RF balun
Switch
RF
receive
RF
transmit
Analog
receive
Analog
transmit
PLL VCO 1/2 PLL
Digital baseband
MAC Interface
PMU Crystal Bias circuits SRAM PMU
SDIO
I2C
PWM
ADC
SPI
UART
GPIO
I2S
Flash
Registers
CPU
Sequencers
Accelerator
Table 1-1. ESP8266EX Specifications
Categories
Items
Parameters
Wi-Fi
Standard
FCC/CE/TELEC/SRRC
Protocols
802.11 b/g/n/e/i
Frequency Range
2.4G ~ 2.5G (2400M ~ 2483.5M)
Tx power
802.11 b: ＋20 dBm
802.11 g: ＋17 dBm
802.11 n: ＋14 dBm
Rx Sensitivity
802.11 b: -91 dBm (11 Mbps)
802.11 g: -75 dBm (54 Mbps)
802.11 n: -72 dBm (MCS7)
Antenna
on-board, external, IPEX connector, ceramic chip
Hardware
Peripheral interface
UART/SDIO/SPI/I2C/I2S/IR Remote Control
GPIO/PWM
Operating voltage
2.5V ~ 3.6V
Operating current
Average: 80 mA
Operating temperature range
-40℃~ 125℃
Storage temperature range
-40℃~ 125℃
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1. ESP8266EX
1.3. Pin Definitions
The pin layout for the 32-pin QFN package is illustrated in Figure 1-2.
"
Figure 1-2. ESP8266EX Pin Layout
Table 1-2 lists the definitions and functions of each pin.!
Package size
QFN32-pin (5 mm x 5 mm)
External interface
N/A
Software
Wi-Fi mode
Station/SoftAP/SoftAP+Station
Security
WPA/WPA2
Encryption
WEP/TKIP/AES
Firmware upgrade
UART Download/OTA (via network)
Software development
SDK for customized development/cloud server
development
Network Protocols
IPv4, TCP/UDP/HTTP/FTP
User configuration
AT Instruction Set, Cloud Server, Android/ iOS app
Categories
Items
Parameters
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1. ESP8266EX
Table 1-2. ESP8266EX Pin Definitions
Pin
Name
Type
Function
1
VDDA
P
Analog Power 2.5V ~ 3.6V
2
LNA
I/O
RF antenna interface
Chip output impedance=39+j6 Ω. It is suggested that users retain
the π-type matching network which matches the antenna.
3
VDD3P3
P
Amplifier Power 2.5V ~ 3.6V
4
VDD3P3
P
Amplifier Power 2.5V ~ 3.6V
5
VDD_RTC
P
NC (1.1V)
6
TOUT
I
ADC pin. It can be used to test the power-supply voltage of
VDD3P3 (Pin3 and Pin4) and the input power voltage of TOUT (Pin
6). However, these two functions cannot be used simultaneously.
7
CHIP_EN
I
Chip Enable
High: On, chip works properly
Low: Off, small current consumed
8
XPD_DCDC
I/O
Deep-sleep wakeup (need to be connected to EXT_RSTB);
GPIO16
9
MTMS
I/O
GPIO 14; HSPI_CLK
10
MTDI
I/O
GPIO 12; HSPI_MISO
11
VDDPST
P
Digital/IO Power Supply (1.8V ~ 3.3V)
12
MTCK
I/O
GPIO 13; HSPI_MOSI; UART0_CTS
13
MTDO
I/O
GPIO 15; HSPI_CS; UART0_RTS
14
GPIO2
I/O
UART Tx during flash programming; GPIO2
15
GPIO0
I/O
GPIO0; SPI_CS2
16
GPIO4
I/O
GPIO 4
17
VDDPST
P
Digital/IO Power Supply (1.8V ~ 3.3V)
18
SDIO_DATA_2
I/O
Connects to SD_D2 (Series R: 200Ω); SPIHD; HSPIHD; GPIO 9
19
SDIO_DATA_3
I/O
Connects to SD_D3 (Series R: 200Ω); SPIWP; HSPIWP; GPIO 10
20
SDIO_CMD
I/O
Connects to SD_CMD (Series R: 200Ω); SPI_CS0; GPIO 11
21
SDIO_CLK
I/O
Connects to SD_CLK (Series R: 200Ω); SPI_CLK; GPIO 6
22
SDIO_DATA_0
I/O
Connects to SD_D0 (Series R: 200Ω); SPI_MSIO; GPIO 7
23
SDIO_DATA_1
I/O
Connects to SD_D1 (Series R: 200Ω); SPI_MOSI; GPIO 8
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1. ESP8266EX
1.4. Schematic Checklist
The highly-integrated design of ESP8266EX reduces the number of components required.
Besides ESP8266EX, less than 10 resistors and capacitors, one crystal oscillator and one
SPI flash are needed to make a complete module with wireless communication capability.
The following is a detailed description of ESP8266EX schematics, and the layout design
which ensures optimum functionality.
The complete circuit diagram of ESP8266EX is illustrated in Figure 1-3.!
24
GPIO5
I/O
GPIO 5
25
U0RXD
I/O
UART Rx during flash programming; GPIO 3
26
U0TXD
I/O
UART Tx during flash progamming; GPIO 1; SPI_CS1
27
XTAL_OUT
I/O
Connects to crystal oscillator output, can be used to provide BT
clock input
28
XTAL_IN
I/O
Connects to crystal oscillator input
29
VDDD
P
Analog Power 2.5V ~ 3.6V
30
VDDA
P
Analog Power 2.5V ~ 3.6V
31
RES12K
I
Serial connection with a 12 kΩresistor and connect to the ground
32
EXT_RSTB
I
External reset signal (Low voltage level: Active)
Pin
Name
Type
Function
📖Note:
GPIO2, GPIO0, and MTDO are configurable on PCB as the 3-bit strapping register that determines the
booting mode and the SDIO timing mode.
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1. ESP8266EX
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Figure 1-3. ESP8266EX Schematics
The ESP8266EX schematics include seven aspects:
•Power supply
•Power-on sequence and reset
•Flash
•Crystal oscillator
•RF
•External resistor
•UART
1.4.1. Power Supply
1.4.1.1. Digital Power Supply
ESP8266EX has two digital pins for power supply, Pin11 and Pin17. For digital power
supply, there is no need to add additional filter capacitors. The operating voltage range of
digital power supply pins is 1.8V ~ 3.3V.!
GPIO15
RST
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SCK/CLK
SCS/CMD
SHD/SD2
UTXDA
WIFI_ANT
GPIO14 GPIO12
URXD
GPIO13
GPIO16
GPIO0
CH_PU
GPIO2 GPIO4
GPIO5
TOUT
SWP/SD3
SDO/SD0
SDI/SD1
UTXD
SHD/SD2
GND
GND
VDD33
GND
GNDGND
GND
VDD33
GND
VDD33
GND
GND
GND
GND
VDD33
GND
GND
GND
ANT1
1
2
R1
12K±1%
C7
TBD(NC)
C1
6.8pF
C3
0.1uF
L3 4.3nH
C8
1uF(NC)
U3FLASH
/CS
1
DO 2
/WP 3
GND
4
DI 5
CLK
6
/HOLD
7
VCC 8
L1
2.4pF
R3 200R
C4 2.2nH
L2
3.0pF
C6
1uF
U1
26MHz±10ppm
XIN
1
GND
2XOUT 3
GND 4
U2ESP8266EX
VDDA
1
LNA
2
VDD3P3
3
VDD3P3
4
VDD_RTC
5
TOUT
6
CHIP_EN
7
XPD_DCDC
8
MTMS
9
MTDI
10
VDDPST
11
MTCK
12
MTDO
13
GPIO2
14
GPIO0
15
GPIO4
16
VDDPST 17
SD_DATA_2 18
SD_DATA_3 19
SD_CMD 20
SD_CLK 21
SD_DATA_0 22
SD_DATA_1 23
GPIO5 24
U0RXD 25
U0TXD 26
XTAL_OUT 27
XTAL_IN 28
VDDD 29
VDDA 30
RES12K 31
EXT_RSTB 32
GND 33
C5
10uF
R2 499R
C2
6.8pF
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1. ESP8266EX
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Figure 1-4. ESP8266EX Digital Power Supply Pins
1.4.1.2. Analog Power Supply
ESP8266EX has five analog pins for power supply, including Pin1, Pin3, Pin4 that are the
power supply for internal PA and LNA; and Pin29, Pin30 for the internal PLL. The operating
voltage for analog power supply pins is 2.5V ~ 3.6V.
Note that the power supply channel might be damaged due to the sudden increase of
current when ESP8266EX is transmitting analog signals. Therefore, an additional 10 μF
capacitor with a 0603 or 0805 package is needed to match the 0.1 μF capacitor.
"
Figure 1-5. ESP8266EX AVDD
VDD33
U2ESP8266EX
CHIP_EN
XPD_DCDC
MTMS
9
MTDI
10
VDDPST
11
MTCK
12
MTDO
13
GPIO2
14
GPIO0
15
GPIO4
16
VDDPST
17
SD_DATA_2
WIFI_ANT
GND
VDD33
GND
GND GND
VDD33
GND
GND
GND
ANT1
1
2
R1
12K±1%
C7
TBD(NC)
L3 4.3nH
C3
0.1uF
10pF
C8
1uF(NC)
C4 2.2nH
L1 L2
C6
1uF
C5
10uF
VDDA
1
LNA
2
VDD3P3
3
VDD3P3
4
VDD_RTC
5
XTAL_IN 28
VDDD
29
VDDA 30
RES12K 31
EXT_RSTB 32
GND 33
📖Note:
•ESP8266EX’s EMC is in conformity with FCC and CE requirements. There is no need to add ferrite
beads in the analog power-supply circuit.
•When using a single power supply, the recommended output current is 500 mA.
•It is suggested that users add an ESD tube at the power entrance.
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1. ESP8266EX
1.4.2. Power-on Sequence and Power Reset
1.4.2.1. Power-on Sequence
ESP8266EX uses a 3.3V system power supply. The chip should be activated after the
power rails have stabilized. This is achieved by delaying the activation of CH_EN (Pin7) by
time T after the 3.3V rails have been brought up. The recommended delay time (T) is given
by the parameter of the RC circuit. For reference design, please refer to Figure ESP-
WROOM-02 Peripheral Schematics in the ESP-WROOM-02 Datasheet.
1.4.2.2. Reset
Pin32 EXT_RSTB serves as the reset pin of ESP8266EX. This pin contains an internal pull-
up resistor and is active low. To avoid resets caused by external interference, we
recommend that you keep the PCB trace of EXT_RSTB as short as possible, and add an
RC circuit at the EXT_RSTB pin.
Pin7 CHIP_EN serves as the enable pin of ESP8266EX. In this case, ESP8266EX powers
off when this pin is held low. Pin7 CHIP_EN also serves as the reset pin of ESP8266EX. In
this case, ESP8266EX reboots when the input level of this pin is below 0.6 V and lasts for
at least 200 μs.
We recommend that you use CHIP_EN, instead of EXT_RSTB, to reset the chip.
1.4.3. Flash
The demo flash used on ESP8266EX is an SPI Flash with 2-MB ROM in an SOP8 (208 mil)
package. Pin21 SD_CLK is connected to the flash CLK pin together with a 0402 resistor in
serial connection, which reduces the drive current and eliminates external interruption. The
initial resistance of the resistor is 200Ω.!
⚠Notice:
If CHIP_EN is driven by a power management chip, then the power management chip controls the
ESP8266EX power state. When the power management chip turns on/off Wi-Fi through the high/low level on
GPIO, a pulse current may be generated. To avoid level instability on CHIP_EN, an RC delay (R=10 kΩ,
C=100 nF) circuit is required.
⚠Notice:
CHIP_EN cannot be left floating.
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1. ESP8266EX
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Figure 1-6. ESP8266EX Flash
1.4.4. Crystal Oscillator
ESP8266EX can support 40 MHz, 26 MHz and 24 MHz crystal oscillators. The accuracy of
crystal oscillators should be ± 10 PPM, and the operating temperature range should be
between -20°C and 85°C.
Please select the right type of crystal oscillator that is used in the ESP Flash Download Tool.
In circuit design, capacitors C1 and C2, which are connected to the ground are added to
the input and output terminals of the crystal oscillator respectively. The values of the two
capacitors can be flexible, ranging from 6 pF to 22 pF. However, the specific capacitive
values of C1 and C2 depend on further testing of and adjustment to the overall
performance of the whole circuit. The crystal precision should be ±10 PPM.
"
Figure 1-7. ESP8266EX Crystal Oscillator
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SCK/CLK
SCS/CMD
SHD/SD2
GPIO5
SWP/SD3
SDO/SD0
SDI/SD1
SHD/SD2
GND
VDD33
U3FLASH
/CS
1
DO 2
/WP 3
GND
4
DI 5
CLK
6
/HOLD
7
VCC 8
R3 200R
U2
VDDPST 17
SD_DATA_2 18
SD_DATA_3 19
SD_CMD 20
SD_CLK 21
SD_DATA_0 22
SD_DATA_1 23
GPIO5 24
UTXDA
GNDGND
GND
C2
C1 U1
26MHz±10ppm
XIN
1
GND
2XOUT 3
GND 4 U0RXD 25
U0TXD 26
XTAL_OUT 27
XTAL_IN 28
VDDD 29
⚠Notice:
Defects in the craftsmanship of the crystal oscillators (for example, high frequency deviation and unstable
working temperature) may lead to the malfunction of ESP8266EX, resulting in the decrease of overall
performance.
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1. ESP8266EX
1.4.5. RF
The impedance of the ESP8266 PA output end is (39+j6)Ω, so the matched impedance is
(39-j6)Ω(from antenna to the chip).
"
Figure 1-8. ESP8266EX RF
1.4.6. External Resistor 12K
An external ground resistor should be connected o the ERS12K pin (Pin31). The ground
resistor requires high accuracy when controlling the bias current. An accuracy of 12K ± 1%
is recommended.
"
Figure 1-9. ESP8266EX External Resistor
1.4.7. UART
Users need to connect a 499Ωresistor to the U0TXD line in order to suppress the 80 MHz
harmonics.
"
Figure 1-10. ESP8266EX UART
WIFI_ANT
GNDGND
GND
ANT1
1
2
L1
2.4pF
C4 2.2nH
L2
3.0pF
VDDA
1
LNA
2
VDD3P3
3
VDD3P3
4
VDD_RTC
5
TOUT
6
CHIP_EN
7
XPD_DCDC
8
GND
R1
12K±1%
29
VDDA 30
RES12K 31
EXT_RSTB 32
UTXDA
URXD
UTXD
U0RXD 25
U0TXD
26
XTAL_OUT
R2 499R
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1. ESP8266EX
1.5. Slave SDIO/SPI
!
Figure 1-11. Schematics of ESP8266EX as a Slave SDIO!
MTDO
SD3/CS SD2
RXD0
MTCK
GPIO16
GPIO0
CHIP_PU
GPIO2
GPIO4
GPIO5
MTDO MTMS
MTMS
MTDI
MTCK MTDI
CMD/MOSI CLK SD0/MISO SD1/INT
TXD0 SD1/INT
SD0/MISO CMD/MOSI SD3/CS SD2
GND
GND
VDD33
GND
GND
GND
GND
GND
GND
GND
GND
VDD33
GND
VDD33
GND
GND VDD33
GND
GND GND
GND
GND
VDD33
VDD33
Optional
C4
1uF(NC)
J1
Jumper
1
2
C2
6.8pF
ANT1
1 2
R1
12K±1%
R13 100R
C1
6.8pF
C6 0.1uF
C8 10pF
R12 100R
R6 10K
C9 2.4pF
R3 10K R7 10K
R14 50R
C7
TBD(NC)
R5 499R
C5
10uF
R10 100R R11
10K
U1
26MHz±10ppm
XIN
1
GND
2XOUT 3
GND 4
R16 10K
R15
10K
R8 100R
U3FLASH
/CS
1
DO 2
/WP 3
GND
4
DI 5
CLK
6
/HOLD
7
VCC 8
U2ESP8266EX
VDDA
1
LNA
2
VDD3P3
3
VDD3P3
4
VDD_RTC
5
TOUT
6
CHIP_EN
7
XPD_DCDC
8
MTMS
9
MTDI
10
VDDPST
11
MTCK
12
MTDO
13
GPIO2
14
GPIO0
15
GPIO4
16
VDDPST 17
SD_DATA_2 18 SD_DATA_3 19
SD_CMD 20
SD_CLK 21
SD_DATA_0 22 SD_DATA_1 23
GPIO5 24
U0RXD 25
U0TXD 26
XTAL_OUT 27
XTAL_IN 28
VDDD 29
VDDA 30
RES12K 31
EXT_RSTB 32
GND 33
C3 1uF
L2
1.6nH
C10
0.1uF
R4 10K R2 10K
R9
10K
L1 4.3nH
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1. ESP8266EX
1.6. PCB Layout Design
The chapter introduces the ESP8266EX PCB layout design by using the ESP8266EX as an
example. The PCB layout design guidelines are applicable to cases when
•the ESP8266EX module functions as a standalone device, and when
•the ESP8266EX functions as a salve device.
"
Figure 1-12. ESP8266EX PCB Layout
1.6.1. General Principles of PCB Layout Design
The PCB has four layers:
•The first layer is the TOP layer for signal lines and components.
•The second layer is the GND layer, where no signal lines are laid to ensure a complete
GND plane.
📖Note:
•Please refer to the design of ESP-WROOM-S2 for further details.
•UART Download Mode: Jumper J1 short circuit.
•SDIO Boot Mode: Jumper J1 open circuit.
•If the external host CPU's SDIO or SPI interface has been pulled up, the optional pull-up resistor can
be omitted.
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1. ESP8266EX
•The third layer is the POWER layer where only power lines can be placed. It is
acceptable to place some signal lines under unavoidable circumstances.
•The forth layer is the BOTTOM layer. Only signal lines can be laid. Placing
components on this layer is not recommended.
Below are the suggestions for a two-layer PCB design.
•The first layer is the TOP layer for signal traces and components.
•The second layer is the BOTTOM layer, where power traces are routed. Placing any
components on this layer is not recommended. Do not route any power or signal
traces under or around the RF and crystal oscillator, and so that there is a complete
GND plane, which is connected to the Ground Pad at the bottom of the chip.
1.6.2. Positioning a ESP32 Module on a Base Board
If users adopt on-board design, they should pay attention to the layout of the module on
the base board. The interference of the base board on the module's antenna performance
should be reduced as much as possible.
It is recommended that the PCB antenna area of the module be placed outside the base
board while the module be put as close as possible to the edge of the base board so that
the feed point of the antenna is closest to the board.
"
Figure 1-13. ESP32 Module Antenna Position on Base Board!
Base Board
1 2 3
4
5
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1. ESP8266EX
If the positions recommended are not suitable, please make sure that the module is not
covered by any metal shell. The antenna area of the module and the area 15 mm outside
the antenna should be kept clean, (namely no copper, routing, components on it) as shown
in Figure 1-14:
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Figure 1-14. Keepout Zone for ESP8266 Module's Antenna on the Base Board
1.6.3. Standalone ESP8266EX Module
1.6.3.1. Power Supply Design
The 3.3V power lines are highlighted in yellow in Figure 1-15. The width of the power lines
should be greater than 15 mil.
Before power traces reach the analog power-supply pins (Pin1、3、4、28、29), a 10 μF
capacitor is required, which can work in conjunction with the 0.1 μF capacitor. A C circuit
and an L circuit should be added to the power supplies of Pin3 and Pin4. As Figure 1-15
shows, C5 (10 μF capacitor) is placed by the 3.3V stamp hole; C7, L3 and C7 are placed
as close as possible to the analog power-supply pin. Note that all decoupling capacitors
should be placed close to the power pin, and ground vias should be added adjacent to the
ground pin for the decoupling capacitors to ensure a short return path.
Power lines should be placed on the third layer. When the power lines reach the pins of the
chipset, vias are needed so that the power lines can go through the layers and connect to
the pins of the chipset on the TOP layer. The diameter of the via holes should exceed the
📖Note:
As is shown in Figure 1-13, the recommended position of ESP32 module on the base board should be:
•Position 3: Highly recommended;
•Position 4: Recommended;
•Position 1, 2, 5: Not recommended.
15 mm
Base Board
15 mm
Clearance
15 mm
Espressif
"/3014
2018.12

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1. ESP8266EX
width of the power lines and the diameter of the drill should be 1.5 times that of the radius
of the vias.
The center ground pad at the bottom of the chip should be connected to ground plane
through at least 9 ground vias.
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Figure 1-15. ESP8266EX PCB Layout
1.6.3.2. Crystal Oscillator Design
The crystal oscillator should be placed as close to the XTAL pins as possible (without the
traces being too long). However, the crystal cannot be placed too close to the chip to
prevent the crystal from interfering with the chip, as Figure 1-15 shows. The recommended
distance is 0.8 mm (see Figure 1-16). However, the crystal cannot be too close to the chip
to prevent the crystal from interfering with the chip. The recommended distance is 0.8mm
(see Figure 1-16). It is good practice to use via stitching around the clock trace for low
ground-plane impedance.
There should be no vias on the input and output traces, which means the traces cannot
cross layers. In addition, the input and output traces should not be routed over one
another, not even on different layers.
Place the input and output bypass capacitors on the near left or right side of the chip. Do
not place them on the traces.
Do not route high-frequency digital signal lines under the crystal oscillator. It is best not to
route any signal line under the crystal oscillator. The larger the copper area on the top layer
is, the better. As the crystal oscillator is a sensitive component, do not place any magnetic
components nearby that may cause interference, for example, power-switching converter
components or unshielded inductors.
Espressif
"/3015
2018.12

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1. ESP8266EX
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Figure 1-16. ESP8266EX Crystal Oscillators
1.6.3.3. RF Design
The characteristic RF impedance is 50Ω. The ground plane should be complete. The RF
trace should be as short as possible with dense ground via stitching around it for isolation.
The width of RF lines should be as short as possible and there should be dense vias
stitched around.
π-type matching circuitry should be reserved on the RF trace and placed close to the RF
Pin2. The components of the π-matching network should be placed in the same direction
(see Figure 1-17).
There should be no vias for the RF trace. The RF trace should be routed at a 135° angle, or
with circular arcs if trace bends are required.
There should be no RF routing around the high-frequency signal lines.
The RF antenna should be set away from high-frequency transmitting devices, such as
crystal oscillators, DDR, and certain high frequency clocks (SDIO_CLK, etc.). Besides, the
USB ports, USB-to-UART signal chips, UART signal lines (including traces, vias, test points,
headers, etc.) must be placed as far away from the antenna as possible. The UART signal
line is packaged and ground shielding is added.
For PCB onboard antenna design please refer to Type-A version by Espressif. If there are
power traces near the antenna, the power traces and antenna must be isolated with GND
copper.
Espressif
"/3016
2018.12