ARM MPS3 Product manual

Arm® MPS3 FPGA Prototyping Board
Technical Reference Manual
Copyright © 2017–2020 Arm Limited or its affiliates. All rights reserved.
100765_0000_04_en

Arm® MPS3 FPGA Prototyping Board
Technical Reference Manual
Copyright © 2017–2020 Arm Limited or its affiliates. All rights reserved.
Release Information
Document History
Issue Date Confidentiality Change
0000-00 01 July 2017 Non-Confidential First issue of TRM
0000-01 16 October 2017 Non-Confidential Second issue of TRM
0000-02 27 April 2018 Non-Confidential Third issue of TRM
0000-03 01 August 2019 Non-Confidential Fourth issue of TRM
0000-04 29 May 2020 Non-Confidential Fifth issue of TRM.
Non-Confidential Proprietary Notice
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this document may be protected by one or more patents or pending patent applications. No part of this document may be
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Your access to the information in this document is conditional upon your acceptance that you will not use or permit others to use
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This document may include technical inaccuracies or typographical errors.
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Copyright © 2017–2020 Arm Limited (or its affiliates). All rights reserved.
Arm Limited. Company 02557590 registered in England.
Arm® MPS3 FPGA Prototyping Board
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110 Fulbourn Road, Cambridge, England CB1 9NJ.
(LES-PRE-20349)
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in
accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to.
Unrestricted Access is an Arm internal classification.
Product Status
The information in this document is Final, that is for a developed product.
Web Address
www.arm.com
Conformance Notices
This section contains conformance notices.
Federal Communications Commission Notice
This device is test equipment and consequently is exempt from part 15 of the FCC Rules under section 15.103 (c).
CE Conformity
The Waste Electrical and Electronic Equipment (WEEE) marking, that is, the crossed out wheelie-bin figure, indicates that this
product must not be disposed of with general waste within the European Union. To prevent possible harm to the environment from
uncontrolled waste disposal, the user is required to recycle the product responsibly to promote reuse of material resources. To
comply with EU law, you must dispose of the product in one of the following ways:
• Return it to the distributer where it was purchased. The distributer is required to arrange free collection when requested.
• Recycle it using local WEEE recycling facilities. These facilities are now very common and might provide free collection.
• If purchased directly from Arm, Arm provides free collection. Please e-mail [email protected] for instructions.
The CE Declaration of Conformity for this product is available on request.
The system should be powered down when not in use.
It is recommended that ESD precautions be taken when handling this product.
The product generates, uses, and can radiate radio frequency energy and may cause harmful interference to radio communications.
There is no guarantee that interference will not occur in a particular installation. If this equipment causes harmful interference to
radio or television reception, which can be determined by turning the equipment off or on, you are encouraged to try to correct the
interference by one or more of the following measures:
• Ensure attached cables do not lie across any sensitive equipment.
• Reorient the receiving antenna.
• Increase the distance between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Note
It is recommended that wherever possible shielded interface cables be used.
Arm® MPS3 FPGA Prototyping Board
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Contents
Arm® MPS3 FPGA Prototyping Board Technical
Reference Manual
Preface
About this book ...................................................... ...................................................... 7
Feedback .................................................................................................................... 10
Chapter 1 Introduction
1.1 Precautions .............................................................................................................. 1-12
1.2 About the MPS3 board ............................................................................................ 1-13
1.3 Location of components on the MPS3 board .......................................................... 1-15
Chapter 2 Hardware description
2.1 Overview of the board hardware ...................................... ...................................... 2-17
2.2 Example Cortex®-M33 IoT Kit subsystem design .................................................... 2-21
2.3 Clocks ...................................................................................................................... 2-23
2.4 Reset, powerup, and configuration .......................................................................... 2-25
2.5 Power ...................................................................................................................... 2-27
2.6 Serial Configuration Controller interface .................................................................. 2-28
2.7 MCC-SMC interface ................................................................................................ 2-30
2.8 USB 2.0 and Ethernet static memory interface ........................... ........................... 2-35
2.9 Video HDLCD interface ............................................. ............................................. 2-36
2.10 Audio codec interface .............................................................................................. 2-37
2.11 QVGA video CLCD display ...................................................................................... 2-38
2.12 On-board user components .......................................... .......................................... 2-39
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2.13 Interrupts ........................................................ ........................................................ 2-40
2.14 FPGA DDR4 memory interface ....................................... ....................................... 2-41
2.15 User non-volatile memory ........................................................................................ 2-42
2.16 Arduino Shield and Pmod interfaces ................................... ................................... 2-43
2.17 FMC-HPC interface ................................................ ................................................ 2-46
2.18 System debug .......................................................................................................... 2-50
2.19 Design settings for correct board operation with a minimal design ............ ............ 2-53
Chapter 3 Configuration
3.1 Overview of the configuration system ...................................................................... 3-55
3.2 Remote USB operation ............................................................................................ 3-57
3.3 Powerup and configuration sequence .................................. .................................. 3-58
3.4 Reset push buttons .................................................................................................. 3-61
3.5 Configuration files .................................................................................................... 3-63
3.6 MCC command-line interface .................................................................................. 3-67
Appendix A Signal descriptions
A.1 Debug connectors .......................................................................................... Appx-A-71
A.2 Arduino Shield connectors ...................................... ...................................... Appx-A-76
A.3 Peripheral Module (Pmod) connectors .......................................................... Appx-A-80
A.4 FMC-HPC connector .......................................... .......................................... Appx-A-82
A.5 FMC configuration connector .................................... .................................... Appx-A-83
A.6 Combined Ethernet and dual USB-A connector ............................................ Appx-A-84
A.7 HDMI Type A female connector .................................. .................................. Appx-A-85
A.8 Audio connectors, stacked stereo jacks ............................ ............................ Appx-A-86
A.9 12V power connector .......................................... .......................................... Appx-A-87
Appendix B Specifications
B.1 Available power for expansion boards ............................. ............................. Appx-B-89
Appendix C Revisions
C.1 Revisions ................................................... ................................................... Appx-C-91
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Preface
This preface introduces the Arm® MPS3 FPGA Prototyping Board Technical Reference Manual.
It contains the following:
•About this book on page 7.
•Feedback on page 10.
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reserved.
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Non-Confidential

About this book
This book describes the Arm® MPS3 FPGA Prototyping Board.
Intended audience
This book is written for experienced hardware and software developers to enable them to perform FPGA
development using the MPS3 board.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
This chapter introduces the MPS3 board.
Chapter 2 Hardware description
This chapter describes the MPS3 board hardware.
Chapter 3 Configuration
This chapter describes the powerup and configuration processes of the MPS3 board.
Appendix A Signal descriptions
This appendix lists the signals at the interface connectors of the MPS3 board.
Appendix B Specifications
This appendix contains electrical specifications of the MPS3 board.
Appendix C Revisions
This appendix describes the technical changes between released issues of this book.
Glossary
The Arm® Glossary is a list of terms used in Arm documentation, together with definitions for those
terms. The Arm Glossary does not contain terms that are industry standard unless the Arm meaning
differs from the generally accepted meaning.
See the Arm® Glossary for more information.
Typographic conventions
italic
Introduces special terminology, denotes cross-references, and citations.
bold
Highlights interface elements, such as menu names. Denotes signal names. Also used for terms
in descriptive lists, where appropriate.
monospace
Denotes text that you can enter at the keyboard, such as commands, file and program names,
and source code.
monospace
Denotes a permitted abbreviation for a command or option. You can enter the underlined text
instead of the full command or option name.
monospace italic
Denotes arguments to monospace text where the argument is to be replaced by a specific value.
monospace bold
Denotes language keywords when used outside example code.
Preface
About this book
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<and>
Encloses replaceable terms for assembler syntax where they appear in code or code fragments.
For example:
MRC p15, 0, <Rd>, <CRn>, <CRm>, <Opcode_2>
SMALL CAPITALS
Used in body text for a few terms that have specific technical meanings, that are defined in the
Arm® Glossary. For example, IMPLEMENTATION DEFINED, IMPLEMENTATION SPECIFIC, UNKNOWN, and
UNPREDICTABLE.
Timing diagrams
The following figure explains the components used in timing diagrams. Variations, when they occur,
have clear labels. You must not assume any timing information that is not explicit in the diagrams.
Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the shaded
area at that time. The actual level is unimportant and does not affect normal operation.
Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus
Figure 1 Key to timing diagram conventions
Signals
The signal conventions are:
Signal level
The level of an asserted signal depends on whether the signal is active-HIGH or active-LOW.
Asserted means:
• HIGH for active-HIGH signals.
• LOW for active-LOW signals.
Lowercase n
At the start or end of a signal name, n denotes an active-LOW signal.
Additional reading
This book contains information that is specific to this product. See the following documents for other
relevant information.
Arm publications
•Arm® Cortex®-M System Design Kit Technical Reference Manual (DDI 0479).
•Application Note AN524 Example SSE ‑ 200 Subsystem for MPS3 (DAI 0524).
•Application Note AN533 Blinky example FPGA image for the MPS3 Prototyping Board
(DAI 0533)
•Arm® CoreLink™ SIE ‑ 200 System IP for Embedded Technical Reference Manual (DDI 0571).
•Arm® CoreLink™ SSE-200 Subsystem Technical Overview (DTO 0051).
•Arm® CoreLink™ SSE-100 Subsystem Technical Reference Manual (DDI 0551).
•Arm® DS-5 Arm DSTREAM User Guide (100955).
•Arm® DS-5 Using the Debug Hardware Configuration Utilities (DUI 0498).
•CoreSight™ Components Technical Reference Manual (DDI 0314).
•CoreSight™ Trace Memory Controller Technical Reference Manual (DDI 0461).
Preface
About this book
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reserved.
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Other publications
• See the Xilinx website https://www.xilinx.com for information about the Xilinx Kintex
Ultrascale XCKU115‑1FLVB1760C FPGA.
Preface
About this book
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reserved.
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Feedback
Feedback on this product
If you have any comments or suggestions about this product, contact your supplier and give:
• The product name.
• The product revision or version.
• An explanation with as much information as you can provide. Include symptoms and diagnostic
procedures if appropriate.
Feedback on content
If you have comments on content then send an e-mail to [email protected]. Give:
• The title Arm MPS3 FPGA Prototyping Board Technical Reference Manual.
• The number 100765_0000_04_en.
• If applicable, the page number(s) to which your comments refer.
• A concise explanation of your comments.
Arm also welcomes general suggestions for additions and improvements.
Note
Arm tests the PDF only in Adobe Acrobat and Acrobat Reader, and cannot guarantee the quality of the
represented document when used with any other PDF reader.
Preface
Feedback
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Chapter 1
Introduction
This chapter introduces the MPS3 board.
It contains the following sections:
•1.1 Precautions on page 1-12.
•1.2 About the MPS3 board on page 1-13.
•1.3 Location of components on the MPS3 board on page 1-15.
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1.1 Precautions
You can take certain precautions to ensure safety and to prevent damage to your MPS3 board.
This section contains the following subsections:
•1.1.1 Ensuring safety on page 1-12.
•1.1.2 Operating temperature on page 1-12.
•1.1.3 Preventing damage on page 1-12.
1.1.1 Ensuring safety
An on‑board connector supplies 12V DC to the MPS3 board.
Warning
Do not use the MPS3 board near equipment that is sensitive to electromagnetic emissions, for example,
medical equipment.
1.1.2 Operating temperature
The MPS3 board has been tested in the temperature range 0°C to 40°C.
1.1.3 Preventing damage
The MPS3 board is intended for use within a laboratory or engineering development environment.
Caution
To avoid damage to the MPS3 board, observe the following precautions:
• Connect the external power supply to the board before starting the powerup process.
• Never subject the board to high electrostatic potentials. Observe ElectroStatic Discharge (ESD)
precautions when handling any board.
• Always wear a grounding strap when handling the board.
• Only hold the board by the edges.
• Avoid touching the component pins or any other metallic element.
• Do not fit an Arduino Shield, Pmod expansion shield, FMC-HPC expansion board, or configuration
microSD card while the MPS3 board is powered.
1 Introduction
1.1 Precautions
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1.2 About the MPS3 board
The MPS3 board is an FPGA Internet of Things (IoT) development platform. The board is designed to
support Arm Cortex‑M class and small to medium Arm Cortex‑A and Cortex‑R class processors, or
dedicated custom designs.
Major features of the MPS3 board
The MPS3 board contains a Xilinx Kintex Ultrascale XCKU115‑1FLVB1760C FPGA, support logic, and
peripheral interfaces that provide access to the FPGA and I/O interfaces.
The feature‑rich set of user peripherals connects directly to the FPGA and provides flexibility for the
user. The peripherals can be included in a custom design as required.
Two Arduino expansion Shield slots enable connection of sensors, motors, and other design‑specific
peripherals. The MPS3 board also provides expansion through four Peripheral Module (Pmod)
expansion ports, and an FPGA Mezzanine Card High Pin Count (FMC‑HPC) expansion port.
An on‑board Motherboard Configuration Controller (MCC) controls the board and configures the FPGA
in a way similar to other Arm development boards including boards in the Arm Versatile™ Express range.
Uses of the MPS3 board
The MPS3 board enables FPGA prototyping of complex designs:
• Software development:
— Linux development on Cortex‑A or Cortex‑R class processors.
— mbedOS, Cortex Microcontroller Software Interface Standard (CMSIS), Real
‑ Time Operating
System (RTOS) development on Cortex‑M class processors.
— Bare metal development.
• Tool development.
Major components and systems of the MPS3 board
The MPS3 board provides:
• One Kintex XCKU115 FPGA.
• Board interfaces:
— Ethernet 10/100.
— AC97 audio.
— HDMI video up to 1080p.
— Dual USB‑A port.
• Expansion connectivity:
— Two Arduino Shield interfaces for custom peripherals.
— FMC‑HPC expansion for up to 160 I/O, 10 multi‑GigaBit Transceivers (GBT), and clocks.
— Four Pmod interfaces.
•Quarter Video Graphics Array (QVGA) CLCD with touchscreen.
• Memory:
— 4GB DDR4 with capacity for up to 8GB.
— 8MB user Quad Serial Peripheral Interface (QSPI) flash for boot.
— Up to 8MB of FPGA Block RAM (BRAM).
— 16GB eMMC.
— microSD card interface.
• Clocks:
— Real ‑ Time Clock (RTC).
— Five programmable clocks.
— One fixed 24MHz clock.
• User board components:
— Ten user LEDs.
— Eight user switches.
— Two user push buttons.
1 Introduction
1.2 About the MPS3 board
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• Reset push buttons and power indicator LEDs.
• Debug support:
— P‑JTAG processor debug.
— F‑JTAG (FPGA) debug.
— Serial Wire Debug (SWD).
— 16‑bit trace.
— 4‑bit trace.
— On‑board CMSIS‑DAP.
— Four serial ports over USB.
1 Introduction
1.2 About the MPS3 board
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1.3 Location of components on the MPS3 board
The following figure shows the physical layout of the MPS3 board.
3V battery Configuration
microSD
card
FMC-HPC
connector
J25 J30
J33 J36
J26 J29
J35 J39
J27
J37
Shield 0
interface
Shield 1
interface
1
1
UL0 UL7
User
LEDs
1 8765432
User
switches
User
push
buttons
PB1 PB2
1
1
1
1
Xilinx Kintex Ultrascale
KU115 FPGA
Hardware
Reset
push button
(PBRST)
On/Off Soft Reset
push button
(PBON)
User
microSD
card
12V
DC IN
Audio
connectors
stacked
stereo
jacks
Combined
Ethernet and
dual-USB
HDMI
Debug
USB 2.0
FMC
Configuration
(Reserved)
Pmod0/1
interface
Pmod2/3
interface
Shield 0
configuration
Shield 1
configuration
38-pin
MICTOR
20-pin
IDC
DDR4
SODIMM
QVGA CLCD display and
touchscreen
20-pin
Cortex
and debug
10-pin IDC
14-pin
F-JTAG
ILA
FPGA
configuration
LED
Hardware
Reset
push button
(PBRST)
On/Off Soft Reset
push button
(PBON)
MCC
active
LED
Debug
USB
active
LED
PWR ON
3V3 OK
12V OK
System
LEDs
User
LEDs
PB1LED PB2LED
Configuration
switches
(Reserved)
J58
J59
Microphone
bias user-links
LR
Shield and Pmod
power and I/O
reference voltage
user links
J24
J28
J34
J38
Figure 1-1 Layout of the MPS3 board
See 2.12 On-board user components on page 2-39 for a description of the use of the Shield and Pmod
power and I/O reference voltage user links.
Note
The configuration switches are reserved. For correct operation, you must ensure that both switches are in
the OFF position, that is, pointing away from the board.
1 Introduction
1.3 Location of components on the MPS3 board
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Chapter 2
Hardware description
This chapter describes the MPS3 board hardware.
It contains the following sections:
•2.1 Overview of the board hardware on page 2-17.
•2.2 Example Cortex® ‑ M33 IoT Kit subsystem design on page 2-21.
•2.3 Clocks on page 2-23.
•2.4 Reset, powerup, and configuration on page 2-25.
•2.5 Power on page 2-27.
•2.6 Serial Configuration Controller interface on page 2-28.
•2.7 MCC-SMC interface on page 2-30.
•2.8 USB 2.0 and Ethernet static memory interface on page 2-35.
•2.9 Video HDLCD interface on page 2-36.
•2.10 Audio codec interface on page 2-37.
•2.11 QVGA video CLCD display on page 2-38.
•2.12 On-board user components on page 2-39.
•2.13 Interrupts on page 2-40.
•2.14 FPGA DDR4 memory interface on page 2-41.
•2.15 User non-volatile memory on page 2-42.
•2.16 Arduino Shield and Pmod interfaces on page 2-43.
•2.17 FMC-HPC interface on page 2-46.
•2.18 System debug on page 2-50.
•2.19 Design settings for correct board operation with a minimal design on page 2-53.
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2.1 Overview of the board hardware
The MPS3 board provides access to the Kintex XCKU115 FPGA and peripherals to enable FPGA
prototyping and software development.
The following figure shows the hardware infrastructure of the MPS3 board.
2 Hardware description
2.1 Overview of the board hardware
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MPS3 FPGA Prototyping Board
Kintex XCKU115 FPGA
USB 2.0
controller
Ethernet
controller
Ethernet
SMC
USB USB
Combined Ethernet and
dual-USB connector
HDMI PHY
I2SI2CHDLCD
HDMI
Stereo audio codec
Mic In Line In Line Out
Audio
Stacked stereo jacks
12345678
User switches
User LEDs
QVGA CLCD and
touchscreen
I2C Parallel
User
push
buttons
GPIO
GPIO
GPIO
User
microSD
eMMC
DDR4
QSPI flash
MCC
Configuration
microSD
SCC/SMBF
Configuration
Clock
generators
and 24MHz
PLLs
I2C
Debug USB
USB
hub
USB-serial
interface
UART
4×UART
CoreSight/Trace connectors
CoreSight
CMSIS-DAP
controller
ADC
AD0[5:0]
Shield 0
Pmod0/1 Pmod2/3
Shield 1
AD1[5:0]
IO0[15:0] IO1[15:0]
GPIO GPIOADC controller
F-JTAG ILA
F-JTAG
Hardware
reset push
buttons
On/Off Soft
reset push
buttons
PBRST PBON
Shield and Pmod
expansion connectors
MPS3 power
supplies
FMC-HPC
Board present/
Powerup board
TLX/User I/O
System
LEDs
Push
button
LEDs
Figure 2-1 Hardware infrastructure of the MPS3 board
The MPS3 board contains the following components:
• One Xilinx Kintex Ultrascale XCKU115‑1FLVB1760C FPGA:
2 Hardware description
2.1 Overview of the board hardware
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— 1451k logic cells.
— Four UARTs (connected to a USB to serial hub for connection to the host computer).
— Support for encrypted FPGA images and Partial Reconfiguration.
• User memory system:
— Up to 8MB internal BRAM.
— microSD card interface.
— 8MB external QSPI flash.
— 4GB, 64‑bit external DDR4 SODIMM.
— 16GB, 8‑bit external eMMC.
•Motherboard Configuration Controller (MCC) that controls the MPS3 board, and supports board
configuration at powerup or reset:
— FPGA configuration.
— Board configuration.
— Supervises user update of the board configuration files in the configuration microSD card.
— Two hardware reset buttons, both labeled PBRST, and two On/Off soft reset buttons, both labeled
PBON.
• Ethernet 10/100 port and Ethernet controller that connects to the Static Memory Controller (SMC)
interface in the FPGA.
• HDMI port and HDMI controller:
— Inputs 24‑bit RGB data from the HDLCD controller in the FPGA.
— Configured over I2C directly from FPGA.
— Supports an I2S audio connection to the FPGA.
— Drives the HDMI connector.
• Audio codec:
— Provides stereo Line In, stereo Line Out, and stereo Microphone Input In to the stacked stereo
jack audio interface.
— Configured over I2C from the I2C controller in the FPGA.
— I2S audio connection to the I2S in the FPGA.
• Shield expansion:
— Two Arduino expansion interfaces for Shields for custom peripherals or off‑the‑shelf sensor
interfaces such as WiFi, Bluetooth, Proximity detectors, or Gyro sensors.
— Each interface connects: 16 × digital 3V3 I/O or 16 × digital 5V I/O, voltage references, and six
analog inputs from each Shield.
•Peripheral Module (Pmod) interface expansion:
— Four Pmod expansion connectors that use the same I/O on an interface that is shared with the
Shield connectors, Type 2A/3/4 support.
— Requires Pmod adapters that provide 8 × analog 3V3 I/O, or 8 × analog 5V I/O.
• FMC‑HPC expansion:
— Connector to enable fitting of an FPGA Mezzanine Card (FMC) High Pin Count (HPC)
expansion card to the MPS3 board.
— A 14‑pin FMC configuration connector and configuration EEPROM to enable configuration of
Arm FMC boards.
• User switches, LEDs, and push buttons that connect directly to GPIO in the FPGA:
— One 8‑way user DIP switch.
— Ten user LEDs.
— Two user push buttons.
• System LEDs:
— Green 12V OK LED.
— Orange 3V3 OK LED.
— Green PWR ON LED.
— Green FPGA configuration LED.
— Green MCC active LED.
— Orange Debug USB active LED.
2 Hardware description
2.1 Overview of the board hardware
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— Green LED. Ethernet speed indicator‑incorporated into combined Ethernet and dual‑USB
connector.
— Yellow LED. Ethernet link and activity indicator‑incorporated into combined Ethernet and
dual‑USB connector.
Related information
1.3 Location of components on the MPS3 board on page 1-15
2 Hardware description
2.1 Overview of the board hardware
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