Fastwel DIC324 User manual

DIC324
PC104 Plus Digital I/O Module
with Galvanic Isolation
User
Manual
IMES.421459.114UM
April 2018
Version 1.3

User Manual DIC324
Product Title: DIC324
Document name: DIC324 User Manual
Manual version: 1.3
Copyright © 2018 Fastwel Co. Ltd. All rights reserved.
Revision Record
Revision number
Brief description of changes
Revision date
1.0
Initial version
February 2017
1.1
Paragraphs 3.1.4, 3.1.6, 3.2.3 were changed; in paragraph
1.1 packaged weight was added.
July 2017
1.3.
Compliance assessment
April 2018
Contact information
Manufactured by: Fastwel Co. Ltd:
Address: 108 Profsoyuznaya st.,
Moscow 117437,
Russian Federation
Tel.: [phone]
Fax: [phone]
Email: [e-mail]
Technical support: _ http://www.fastwel.com/
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Table of contents
Table of contents 3
Trademarks 5
Ownership Rights 5
Notation Conventions 6
Safety Requirements 7
High Voltage Safe Handling Rules 7
Board Handling Regulations 7
General Board Operation Rules 8
MANUFACTURER'S WARRANTIES 9
1 Introduction 10
1.1 Module technical features........................................................................................................................... 10
1.2 Versions...................................................................................................................................................... 11
1.3 Module delivery checklist............................................................................................................................ 12
1.4 External view and location of components 12
1.4.1 Module external view................................................................................................................. 13
1.4.2 Overall and mounting dimensions, location of main components .............................................. 14
2 Functional description 15
2.1 Module block diagram................................................................................................................................. 15
2.2 Location of main components..................................................................................................................... 16
2.3 Module's functional nodes and interfaces................................................................................................... 17
2.3.1 Base FPGA (BASE)................................................................................................................... 17
2.3.2 System ISA bus......................................................................................................................... 17
2.3.3 Digital input ports (Digital_Inputs).............................................................................................. 19
2.3.4 Input channel diagram ............................................................................................................... 20
2.3.5 Resistive assemblies ................................................................................................................. 21
2.3.6 Digital output port (Digital_Outputs)........................................................................................... 21
2.3.7 Solid state relay ......................................................................................................................... 23
2.3.8 Base address switch.................................................................................................................. 24
2.3.9 LEDs.......................................................................................................................................... 24
2.3.10 Module power supply................................................................................................................. 24
3 Module use........................................................................................................................................... 25
3.1 Module preparation for use......................................................................................................................... 25
3.1.1 General requirements................................................................................................................ 25
3.1.2 Electrostatic safety requirements .............................................................................................. 25
3.1.3 External inspection .................................................................................................................... 25
3.1.4 Readiness check ....................................................................................................................... 26
3.1.5 Installation of DIC324................................................................................................................. 26
3.1.6 Module's default configuration ................................................................................................... 26
3.1.7 Connection to the module.......................................................................................................... 27
3.1.8 Module configuration.................................................................................................................. 27
3.2 Main control capabilities ............................................................................................................................. 27
3.2.1 Setting base address ................................................................................................................ 27
3.2.2 Jumpers for the installation of input signal connection type....................................................... 29
3.2.3 Setting the range of input voltages ............................................................................................ 32
3.2.4 Jumpers for the installation of switching load type..................................................................... 32
3.3 Description of registers and D11 user configuration................................................................................... 34
3.3.1 FPGA D11 configuration –Digital_Inputs .................................................................................. 34
3.3.1.1 Integrated parts of the diagram................................................................................. 35
3.3.2 Configuration FPGA D11 - Digital_Outputs................................................................................ 39
3.3.2.1 Integrated parts of the diagram................................................................................. 39
3.3.2.2 Purpose of output ports............................................................................................. 39
3.3.3 Module identification.................................................................................................................. 40
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3.3.4 Reprogramming of user FPGA configuration............................................................................. 41
4 Transportation, unpacking and storage............................................................................................ 43
4.1 Transportation............................................................................................................................................. 43
4.2 Unpacking................................................................................................................................................... 43
4.3 Storage....................................................................................................................................................... 43
ANNEX A DISCLAIMER………………………………………………………………………………………………………………..44
LIST OF TABLES
Table 1-1: Ordering information ……………………………………………………………………….………………........................11
Table 1-2: Delivery checklist……………………………………………………………………………………………………………..12
Table 1-3: Additional accessories……………………………………………………………………………………………………….12
Table 2-1: Identification of ISA bus contacts, row A…………………………………………………………………………………..17
Table 2-2: Identification of ISA bus contacts, row B…………………………………………………………………………………..18
Table 2.3: XP10 connector contacts ……………………………………………………………………………………………………19
Table 2-4: Table of XP11 connector contacts………………………………………………………………………………………….23
Table 3-1: SA1 switch setting……………………………………………………………………………………………………………29
Table 3-2: Type of inputs…………………………………………………………………………………………………………………31
Table 3-3: Trigger threshold per each group of eight input channels……………………………………………………………….32
Table 3-4: Setting the load type connection……………………………………………………………………………………………33
Table 3-5: Control register……………………………………………………………………………………………………………….35
Table 3-6: Event front edge codes for groups of inputs………………………………………………………………………………36
Table 3-7: De-bouncing time codes for groups of inputs……………………………………………………………………………..36
Table 3-8: Control register……………………………………………………………………………………………………………….36
Table 3-9: Register of interrupts…………………………………………………………………………………………………………36
Table 3-10: Register of inputs……………………………………………………………………………………………………………37
Table 3-11: Register of events…………………………………………………………………………………………………………..37
Table 3-12: Control register……………………………………………………………………………………………………………...38
Table 3-13: Register of data……………………………………………………………………………………………………………..38
Table 3-14: Register of outputs………………………………………………………………………………………………………….40
Table 3-15: Port (BA+Eh) through reading……………………………………………………………………………………………..40
Table 3-16: Port (BA+Fh) through reading……………………………………………………………………………………………..40
LIST OF FIGURES
Fig. 1-1: External view of DIC324……………………………………………………………………………………………………….13
Fig. 1-2: Overall dimensions and location of main components of DIC324………………………………………………………...14
Fig. 2-1: Block diagram of DIC324………………………………………………………………………………………………………15
Fig. 2-2: Location of the SA1 base address switch……………………………………………………………………………………16
Fig. 2-3: Numbering of XS4 connector contacts……………………………………………………………………………………….18
Fig. 2-4: Digital input connector………………………………………………………………………………………………………….19
Fig. 2-5: Diagram of DIC324 input channel…………………………………………………………………………………………….20
Fig. 2-6: Connection type jumpers………………………………………………………………………………………………………20
Fig. 2-7: XP12 jumper…………………………………………………………………………………………………………………….21
Fig. 2-8: Digital output connector………………………………………………………………………………………………………..21
Fig. 2-9: Diagram of the connector's ports' outputs……………………………………………………………………………………22
Fig. 2-10: Input channel 1 diagram……………………………………………………………………………………………………...24
Fig. 2-11: SA1 base address setting switch…………………………………………………………………………………………....24
Fig. 3-1: SA1 base address setting switch…………………………………………………………………………………………......27
Fig. 3-2: Connection to the module……………………………………………………………………………………………………..30
Fig. 3-3: Matrix diagram…………………………………………………………………………………………………………………..35
Fig. 3-4: Integrated parts of the block-diagram………………………………………………………………………………………...39
All information in this document is provided for reference only, with no warranty of its suitability for any specific purpose. This information has been thoroughly checked and is believed to be
entirely reliable and consistent with the product that it describes. However, Fastwel accepts no responsibility for inaccuracies, omissions or their consequences, as well as liability arising from
the use or application of any product or example described in this document.
Fastwel Co. Ltd. reserves the right to change, modify, and improve this document or the products described in it, at Fastwel's discretion without further notice. Software described in this
document is provided on an “as is” basis without warranty. Fastwel assumes no liability for consequential or incidental damages originated by the use of this software.
This document contains information, which is property of Fastwel Co. Ltd. It is not allowed to reproduce it or transmit by any means, to translate the document or to convert it to
any electronic form in full or in parts without antecedent written approval of Fastwel Co. Ltd. or one of its officially authorized agents.
Fastwel and Fastwel logo are trademarks owned by Fastwel Co. Ltd., Moscow, Russian Federation. Ethernet is a registered trademark of Xerox Corporation. IEEE is a
registered trademark of the Institute of Electrical and Electronics Engineers Inc. Intel is a trademark of Intel Corporation. Microsoft is a trademark of the Microsoft corporation. In
addition, this document may include names, company logos and trademarks, which are registered trademarks and, therefore, are property of their respective owners. Fastwel
welcomes suggestions, remarks and proposals regarding the form and the content of this Manual.
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Trademarks
"Fastwel" logotype is a trademark belonging to Fastwel Group Co. Ltd., Moscow, Russian
Federation.
Besides, this document may contain names, corporate logotypes and trademarks being registered
trademarks; consequently, property rights to them belong to their respective legitimate owners.
Ownership Rights
This document contains information being the property of Fastwel Group Co. Ltd. It can
neither be copied nor transferred with the utilization of known media nor be stored in data storage
and search systems without the prior written authorization of Fastwel Group Co. Ltd. To our best
knowledge, the data in this document does not contain errors. However, Fastwel Group Co. Ltd
cannot take responsibility for any inaccuracies and their consequences, as well as responsibility
arising as a result of utilization or application of any diagram, product or example cited in this
document. Fastwel Group Co. Ltd reserves the right to alter and update both this document and
the product presented therein at its own discretion without additional notification.
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Notation and
Conventions Warning, high voltage!
This sign and inscription warn you about the dangers associated with
electric discharges (> 60 V) at the time you touch the device or its
parts. Noncompliance with the safety precautions, mentioned or
prescribed by the rules could endanger your life or health, or lead to
product damages. We also recommend you to familiarize with the
below subsection dedicated to the high voltage safe handling rules.
Warning!
ESD Sensitive Device!
This symbol draws your attention to the information related to electro
static sensitivity of your
product and its components. To keep product safety and operability it
is necessary to handle it with care and follow the ESD safety
directions.
Warning! Hot surface!
This sign marks warnings about hot surfaces. The surface of the
heatsink and some components can get very hot during operation.
Take due care when handling, avoid touching hot surfaces!
Warning!
Information marked by this symbol is essential for human and
equipment safety.
Read this information attentively, be watchful.
Note
This symbol and title marks important information to be read attentively
for your own benefit.
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Safety requirements
This product is designed and tested for the purpose of ensuring compliance with the electric
safety requirements. Its design guarantees long-term failsafe operation. Life cycle of the device
can be sufficiently reduced due to improper handling during unpacking and installation. Therefore,
for your own safety and in order to ensure the proper operation of the device, you should observe
the below recommendations.
High Voltage Safe Handling Rules
Warning!
All the works that involve this device should be carried out by the
appropriately qualified personnel.
Warning, high voltage!
Before installing the board into the system make sure that the
mains supply is switched off. This also applies to the installation of
extension boards.
During installation, repairs and maintenance of the device there is a
real danger of exposure to electric shock, therefore you should
always disconnect the power supply feeding cable from the socket
at the time of works. This also applies to the other power supply
feeding cables.
Board Handling Regulations
ESD Sensitive Device!
Electronic boards and their components are sensible to static
electricity. This is why you should give special attention to
handling
with these devices in order to ensure their integrity and working
efficiency.
- Do not leave the board without protective packaging, when it is not operated.
- When applicable, always operate the board at the workplace equipped with protection
against static electricity. If it is impossible, the user should remove a static discharge
before touching the device by hand or using tools. The best way to do it is touch a
metal part of system enclosure.
Observing safety precautions are particularly important during the works associated
with replacement of extension boards, memory modules, jumpers etc. If the device is
equipped with the batteries for supplying power to memory or real-time clock, do not
place the board on such conducting surfaces as antistatic pads or mats. They could
cause short-circuit and lead to damages of the battery or board's conductive circuits.
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General Board Operation Rules
To keep the warranty, the product should not be altered or revised in any way. Any
alterations or improvements not authorized by Fastwel LLC, except for those specified
in this document or obtained from the technical support department of Fastwel LLC as
a set of instructions for their implementation, cancel the warranty.
This device should be installed and connected only to the systems, meeting all the
necessary technical and climatic requirements. This above is also true to the operating
temperature range of a particular version of the board. You should also consider
temperature limitations of the board.
While performing all the required operations for installation and adjustment, please
follow the instructions specified only in this document.
Keep the original package for subsequent storage of the device and transportation in
the warranty event. If it is necessary to transport or store the board, please pack it
the same way as it was packed upon delivery.
Exercise special care when unpacking and handling the device. Act in accordance with
the instructions given in the above section and paragraph 1
Transportation, unpacking and storage.
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MANUFACTURER'S WARRANTIES
Warranty liabilities
The manufacturer hereby guarantees that the device meets the technical specification
requirements.
"Integrated industrial computer in PC104 format" 4013-004-52415667-05TU provided that the
Consumer complies with the conditions of usage, transportation, storage, installation and
assembly, set by the accompanying documents.
The Manufacturer hereby guarantees that the products supplied thereby are free from
defects in workmanship and materials, provided operation and maintenance norms were observed
during the currently established warranty period. The Manufacturer's obligation under this warranty
is to repair or replace free of charge any defective electronic component being a part of a returned
product.
Products that broke down through the Manufacturer's fault during the warranty period will be
repaired free of charge. Otherwise the Consumer will be invoiced as per the current labor
remuneration rates and expendable materials cost.
Liability limitation right
The Manufacturer shall not be liable for the damage inflicted to the Consumer's property
because of the product breakdown in the process of its utilization.
Warranty period
The warranty period for the products made by Fastwel LLC is 36 months since the sale date
(unless otherwise provided by the supply contract).
The warranty period for the custom-made products is 60 months since the sale date (unless
otherwise provided by the supply contract.
Limitation of warranty obligations
The above warranty obligations shall not be applied:
 To the products (including software), which were repaired or were amended by the
employees, that do not represent the manufacturer. Exceptions are the cases where the
customer has made repairs or made amendments to the devices in the strict compliance with
instructions, preliminary agreed and approved by the manufacturer in writing;
 To the products, broken down due to unacceptable polarity reversal (to the opposite sign)
of the power supply, improper operation, transportation, storage, installation, mounting or
accident.
Procedure of device returning for repairs
Sequence of activities when returning the products for repairs:
 Apply to Fastwel company or to any of the Fastwel's official representatives for the Product
Return Authorization;
 Attach a failure inspection report with a product to be returned in the form, accepted by the
Manufacturer, with a description of the failure circumstances and symptoms;
 Carefully package the product in the antistatic bag and carton box, in which the product
had been supplied. Then package the product in a safe container for shipping. Failure to
package in antistatic material will VOID all warranties.
 The customer pays for shipping the product to Fastwel or to an official Fastwel
representative or dealer.
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1 Introduction
Digital I/O Module with galvanic isolation DIC324 is implemented in PC/104+ standard on
the basis of the stack of DIC122 and DIC123 modules. It has 16 channels of isolated digital input
channels and 8 channels of isolated digital output. Electrical parameters of the modules are
identical to those of the DIC122 and DIC123 modules. The modules use the Field-Programmable
Gate Array (FPGA), which makes it possible to change algorithm of processing inputs and outputs
without changing the topology.
All the channels are isolated fro the system and from each other.
The channels use either two-wire or single-wire (with common ground) connection. It is
possible to connect signals of the "potential-free" contact type with the use of an external (up to 52
V) power supply source.
Load connection: two-wire/single-wire
1.1 Module technical features
System bus:
8-bit ISA bus.
Digital input:
16 digital input channels;
Single-wire or two-wire signal connection;
Input voltages ±3.2 V ... ±52 V.
Digital output:
8 digital output channels;
Single-wire or two-wire signal connection;
Switching output voltages/currents: 60V/500mA (with a differential load connection).
LED:
indication of requests (references).
Main features:
Delay of input signals: 25 µs;
Changing frequencies over each channel (up to 30 kHz);
Optical isolation of inputs/outputs between the channels: 500 V;
Optical isolation of inputs/outputs between an input and the "ground": 1000 V;
Generation of hardware interrupts by events at inputs;
Programmable time interval for de-bouncing at inputs (de-bouncing).
Additional features:
Five separable lines of hardware interrupts IRQx (where x = 3, 4, 5, 6, 7).
Possibility for development of its proper configurations (firmware) FPGA
Main control capabilities
Programming interrupts;
Setting the range of input voltages.
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Module power supply:
from an external DC power-supply with the voltage of + 5V ± 5 %.
maximum consumption current value of the module is 160 mA (at switch closures in all the
channels).
Software compatibility:
FDOS, FreeDOS, Linux 2.6, Windows XP (Embedded)
Mean Time Between Failures (MTBF):
no less than 710,000 hours.
Overall dimensions, mm, no more than:
100.0 х 96.0 x 24.0
Operation conditions:
operating temperature range: from -40° С to +85°С
relative humidity –up to 80 % (no moisture
condensation )
Resistance to mechanical effects:
Sinusoidal vibrations for frequencies from 10 to 500 Hz: with acceleration no more than 5 g;
Single shocks with duration 11 ms and
peak acceleration of no more than 100 g;
Multiple shocks with duration 6 ms and peak
acceleration of no more than 50 g.
Weight in kg, no more than:
0.09
Weight of packaged modules, in kg, no more than:
0.176
1.2 Versions
Module's versions and their designations at the time of the order (ordering information) are
given in the table below 1-1.
Table 1-1: ORDERING INFORMATON
Name
Conventional
designation
Ordering
designation
Note
Digital I/O module
with galvanic
isolation
DIC324
DIC324
DIC324-01
-
DIC324-01 \Coated
Conformal coating option.
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1.3 Module delivery checklist
Delivery checklist for all the module versions is given in the Table 1-2
Table 1-2: Delivery checklist
Ordering
designation
-
Description
DIC324-01
IMES.421459.114
DIC324 digital I/O module with galvanic isolation
–
–
-
–
–
Packaging.
–
–
Resistive assembly 470 Ohm, 2 pcs
Table 1-3: Additional accessories
Ordering
designation
Description
ACS00001
Cable type FC-20, socket IDC-20/Socket IDC-20, length 600 mm
ACS00003
Cable type FC-34, socket IDC-34/Socket IDC-34, length 600 mm
TIB96401
Terminal board, 20-pins (TB20)
TIB96601
Terminal board, 34-pins (TB34)
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1.4 External view and location of components
The below figures will help you identify components, their configuration and functions.
1.4.1 Module external view
Fig. 1-1: External view of DIC324
Note
External view of module versions could slightly differ from the one
shown in the Figures.
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1.4.2 Overall and mounting dimensions, location of main components
1 2
Fig. 1-2: Overall dimensions and location of main components of DIC324
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PC104+
(ISA)
ISA
BUFFERS
OPTO
Isolation
OPTO
Isolation
Switches
DO
XP11
DI
XP10
2 Functional description
2.1 Module block diagram
Block diagram of the module is shown in Fig. 2-1
SPI DI 1...16
ISA 8bit ISA 8bit 3.3V
Level
FPGA
(BASE
)
Local
BUS
FPGA
DO 1...8
Base
Address
Switch
Fig. 2-1: Block diagram of DIC324
The module's block diagram contains main functional elements:
– FPGA (BASE) –System FPGA Xilinx XC6SLX4-2CSG225I;
– FPGA1 –User FPGA Xilinx XC6SLX4-2CSG225I;
– PC104+ (ISA) –edge connector of 8-bit ISA bus;
– Digital_Inputs (DI) –digital input connector (XP10);
– Digital_Outputs (DO) –digital output connector (XP11);
– OPTO Isolation –are output buffers with galvanic isolation;
– Switches –are the switches for load commutating.
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2.2 Location of main components
Location of the main components, connectors that correspond to them, as well as
commutator bars of the module is demonstrated in Figure 1-2 (Top view) and Figure 2-2 (Bottom
view).
Designations of connectors, switches and jumpers comply with designations on the
module's board:
−XP10, XP11 - connectors of module's external connections;
−XP21 - additional process connector for FPGA (Base) microchip programming;
−SA1 - switch of the base address setting;
−XP1-XP8 - installation jumpers of the type of output signals connection in digital output
channels;
−XP13-XP20 - installation jumpers of the type of input signals connection in digital input
channels;
−HL1 - LED indicator of requests (references) over input/output;
Base address
switch
FPGA
(BASE)
SA1
1←0
BA5
.
.
BA
0
Fig. 2-2: Location of the SA1 base address switch
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2.3 Module's functional nodes and interfaces
2.3.1 Base FPGA (BASE)
Base FPGA is a control FPGA of the module. It has implemented: Local Bus generation
for communication with the module's node of digital I/O, SPI controller for implementation of in-
circuit programming and configuration of this node, as well as module's base address selector
and interrupt operating line on ISA bus. As FPGA, Xilinx FPGA of the Spartan 6 (XC6SLX4-
2CSG225I) series is used.
2.3.2 System ISA bus
The module is equipped with 8-bit ISA bus
The interface is routed to the XS4 connector. Description of ISA connector contacts (rows A
and B) of the module for the connection to the external system ISA bus is shown in the tables
below.
Table 2-1: Identification of ISA bus contacts, row A
Contact
Signal
State
Contact
Signal
State
A1
/IOCHK
–
A17
SA14
Input
A2
SD7
Input / Output
A18
SA13
Input
A3
SD6
Input / Output
A19
SA12
Input
A4
SD5
Input / Output
A20
SA11
Input
A5
SD4
Input / Output
A21
SA10
Input
A6
SD3
Input / Output
A22
SA9
Input
A7
SD2
Input / Output
A23
SA8
Input
A8
SD1
Input / Output
A24
SA7
Input
A9
SD0
Input / Output
A25
SA6
Input
A10
IOCHRDY
Output
A26
SA5
Input
A11
AEN
Input
A27
SA4
Input
A12
SA19
Input
A28
SA3
Input
A13
SA18
Input
A29
SA2
Input
A14
SA17
Input
A30
SA1
Input
A15
SA16
Input
A31
SA0
Input
A16
SA15
Input
A32
GND
Power supply
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C0
D0
C19
D19

Table 2-2: Identification of ISA bus contacts, row B
Contact
Signal
State
Contact
Signal
State
B1
GND
Power supply
B17
/DACK1
Input
B2
RESET
Input
B18
DRQ1
Output
B3
+5V
Power supply
B19
/REFRESH
Input
B4
IRQ9
Output
B20
BCLK
Input
B5
-5V
Power supply
B21
IRQ7
Output
B6
DRQ2
Output
B22
IRQ6
Output
B7
-12V
Power supply
B23
IRQ5
Output
B8
0WS
Output
B24
IRQ4
Output
B9
+12V
Power supply
B25
IRQ3
Output
B10
GND
Power supply
B26
/DACK2
Input
B11
/SMEMW
Input
B27
TC
Input
B12
/SMEMR
Input
B28
BALE
Input
B13
/IOW
Input
B29
+5V
Power supply
B14
/IOR
Input
B30
OSC
Input
B15
/DACK3
Input
B31
GND
Power supply
B16
DRQ3
Output
B32
GND
Power supply
NOTE: IN TABLE 2-1 AND TABLE 2-2 THE FOLLOWING DESIGNATIONS OF STATES OF
CONNECTOR'S SIGNAL CONTACTS HAVE BEEN ACCEPTED: Input –INPUT, “OUT.” –
OUTPUT, “I / O" – INPUT/OUTPUT (BIDIRECTIONAL), “POWER SUPPLY” –
MODULE'S POWER SUPPLY DURING INSTALLATION TO THE RELEVANT PC/104+ CONNECTORS
B1 B32
A1 A32
а)
a) Top view
b)
Fig. 2-3: Numbering of XS4 connector contacts
b) Module's bottom view with organizer installed into the connector
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Contact
Name
Contact
Name
1
+DI0
18
-DI8
2
-DI0
19
+DI9
3
+DI1
20
-DI9
4
-DI1
21
+DI10
5
+DI2
22
-DI10
6
-DI2
23
+DI11
7
+DI3
24
-DI11
8
-DI3
25
+DI12
9
+DI4
26
-DI12
10
-DI4
27
+DI13
11
+DI5
28
-DI13
12
-DI5
29
+DI14
13
+DI6
30
-DI14
14
-DI6
31
+DI15
15
+DI7
32
-DI15
16
-DI7
33
-Vin (+Vin)*
17
+DI8
34
-Vin
2.3.3 Digital input ports (Digital_Inputs)
Digital input connectors are input buffers with galvanic isolation. Input buffers support
differential input and ensure galvanic isolation up to 500 V per channel and 1000 V between the
channel and "ground" (GND) of the module.
In terms of structure, the modules are represented by IDC XP10 connector.
External view and designation of digital input connectors' (XP10) contacts are shown in
Figure 2-4 and tables below.
1
Fig. 2-4: Digital input connector
Table 2.3: XP10 connector contacts
* - is installed to XP12 by the jumper. “-VIN” : XP12[3-4]; “+VIN”: XP12[1-2]
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User Manual
DIC324
2.3.4 Input channel diagram
The wiring diagram of input channel (number x) is shown in Figure 2-5. Using a limiting
resistor, input signal is transferred to optron. Jumpers XP13-XP20 enable to change the
connection type (two-wire, single-wire, potential-free contact). Output signal from optron is
received at FPGA matrix input.
+3.3V
+DIx
-DIx
+Vin
-Vin
1
(2)
RN
3 5 7
(4) (6) (8)
FPGA
DC-DC
Fig. 2-5: Diagram of DIC324 input channel
For galvanic isolation, the following optrons are used: TCMT-1600 (Vishay). Input channel
implementation, similar to the one of DIC112/DIC122.
Switches (jumpers):
−Selection of input signal connection mode. Jumpers (XP13-XP20) of changing the
signal connection type make it possible to set the type of input signal: differential,
single-wire, potential-free contact
11
ab
Fig. 2-6: Connection type jumpers
a) –differential (set at the time of delivery); b) –single-wire.
−Selection of contact connection 33 connectors XP10: +Vin or –Vin, is set
using the jumper at XP12 connector.
20