Gibson MM516 User manual

MM516
User's Manual 1Revision 1.4 7-8-2011
Hardware Description Manual
JULY 2011
MM516
Bluetooth QD ID : B018234 (End Product Listing)
FCC ID : ZDSMM516
IC : 9583A-MM516
Class 2 BC05-ext Multimedia Module
Wireless Modules
User's Manual
Hardware Description
Revision 1.4

MM516
User's Manual 2Revision 1.4 7-8-2011
Hardware Description Manual
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table of Contents
1. General Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.4 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 7
1.5 Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 Basic Operating Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Physical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 RF Receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.1 Low Noise Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.2 Analog to Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 RF Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.1 IQ Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.2 Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 RF Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Clock Input and Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.5 Baseband and Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.1 Memory Management Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.2 Burst Mode Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.3 Physical Layer Hardware Engine DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.5.4 System RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.5 External Memory Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.6 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5.7 Synchronous Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5.8 UART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6.1 Programmable I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6.2 802.11 Coexistence Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Bluetooth Software Stacks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 BlueCore HCI Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1.1 Key Features of the HCI Stack: Standard Bluetooth Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 Key Features of the HCI Stack: Extra Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3 Additional Software for Other Embedded Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.4 CSR Development Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1 UART Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1.1 UART Configuration While RESET is Active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.2 UART Bypass Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.3 Current Consumption in UART Bypass Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.2 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2.1 USB Data Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2.2 USB Pull-Up Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2.3 USB Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2.4 Self-Powered Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2.5 Bus-Powered Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2.6 Suspend Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2.7 Detach and Wake_Up Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2.8 USB Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

MM516
User's Manual 3Revision 1.4 7-8-2011
Hardware Description Manual
5.2.9 USB v2.0 Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2.10 USB 2.0 Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3 Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3.1 Instruction Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3.2 Writing to the Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3.3 Reading from the Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3.4 Multi-Slave Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 PCM Codec Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4.1 PCM Interface Master/Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4.2 Long Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.4.3 Short Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4.4 Multi-slot Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4.5 GCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4.6 Slots and Sample Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4.7 Additional Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.4.8 PCM Timing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.4.9 PCM_CLK and PCM_SYNC Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.4.10 PCM Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.5 I/O Parallel Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.5.1 PIO Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.6 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.7 TCXO Enable OR Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.8 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.8.1 Pin States on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.8.2 Status after Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.9 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.9.1 Switch-mode Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.9.2 Low-voltage Linear Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.9.3 Low-voltage Audio Linear Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.2 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.3 Radio Characteristics - Basic Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
6.4 Radio Characteristics - Enhanced Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.1 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
8 Important Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
8.1 Antenna Trace and Connector Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
8.2 Antenna Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
8.4 FCC Class B Digital Devices Regulatory Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
8.5 FCC Wireless Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
8.6 FCC Interference Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
8.7 FCC Identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
8.8 European R&TTE Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
8.8 Unauthorized Changes to Equipment Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
8.9 Bluetooth Qualified Design ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
8.10 Industry Canada Certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
8.11 Label Design of the Host Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
8.12 End User Product Manual Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

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List of Figures
Figure 1 Simplified Block Diagram of MM516 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2 Pin Configuration for the MM516 and PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3 BlueCore HCI Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 4 Universal Asynchronous Receiver/Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5 Break Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6 UART Bypass Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7 USB Connections for Self-Powered Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8 USB Connections for Bus-Powered Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 9 USB_DETACH and USB_WAKE_UP Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 10 SPI Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11 SPI Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 12 PCM Configured as a Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 13 PCM Configured as a Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 14 Long Frame Sync (Shown with 8-bit Companded Sample) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 15 Short Frame Sync (Shown with 16-bit Sample) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 16 Multi-slot Operation with Two Slots and 8-bit Companded Samples . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 17 GCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 18 16-bit Slot Length and Sample Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 19 PCM Master Timing Long Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 20 PM Master Timing Short Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 21 PCM Slave Timing Long Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 22 PCM Slave Timing Short Frame Sync . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 23 Example of OR Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 24 Package Dimensions and Pin 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 25 Six Layer Stackup .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 26 Four Layer Stackukp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 27 Long Micro-Strip Trace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 28 Short Micro-Strip Trace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 29 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 31 Equipment Label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
List of Tables
Table 1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2 UART Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 3 Standard Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3 USB Interface Component Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 4 Instruction Cycle for an SPI Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 5 PCM Master Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 6 PCM Slave Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 7 PSKEY_PCM_CONFIG32 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 8 PSKEY_PCM_LOW_JITTER_CONFIG Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 9 Pin States on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 10 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 11 Typical DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 12 Radio Characteristics - Basic Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 13 Antennas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

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1. General Device Overview
1.1 Features
General
The module is a Max.4dBm( Class2 ) module.
Low current consumption : Hold,Sniff,Park,Deep sleep Mode
Interface: USB,UART&PCM(for voice CODEC)
Support for 802.11 Co-Exsitence
16-bit Internal Stereo CODEC 95dB SNR for DAC
Integrated 1.5V and 1.8V Linear Regulators
Integrated Battery Charger
RoHS compliant
Small outline. 22.56 x 15.01 mm
Interfaces
USB v2.0
Standard RS232 UART for communicating with other devices : 1200 baud to 3Mbaud
Serial Peripheral Interface (SPI)
Multi-configurable I2S, PCM or SPDIF Interface
RF
Transmit power typ. 2.0 dBm
Receiver sensitivity typ. -87 to -20 dBm
Integrated channel filters
Supports pi/4 DQPSK (2Mbps) and 8DPSK (3Mbps) modulation
Bluetooth
Bluetooth standard Ver. 2.1 + EDR compliant.
Support for up to seven slaves : SCO links<3>,ACL links,Piconet<7>
HCI or SPP,HSP/HFP,HID,DUN firmware is available

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1.2 Block Diagram
Figure 1 Simplified Block Diagram of MM516

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1.3 Pin Configuration
Figure 2 Pin Configuration for the MM516 and PCB Layout
1.4 Pin Description

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Table 1 Pin Description

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1.5 Firmware
The on-board BlueCore 5 chip made by CSR, is supplied with Bluetooth v2.1 + EDR compliant stack firmware,
which runs on the internal RISC microcontroller.
The BlueCore 5 chip software architecture allows Bluetooth processing and the application program to be shared
in different ways between the internal RISC microcontroller and an external host processor. The upper layers
of the Bluetooth stack (above HCI) can be run either on-chip or on the host processor.
2 Basic Operating Information
2.1 Power Supply
The MM516 is supplied from a single external regulated 3.3V supply voltage (VDD). This supply voltage must always be
present.
The BlueCore 5 chip contains an internal 1.8 V switch mode power supply which is enabled by connecting pin 31
(VREGEN_H) to VDD. The output of the regulator is on pin 34 (LX) and needs to be connected to pin 33 (1V8) with a low
pass filter comprised of a 22uH inductor (Taiyo Yuden LBR2518T220K or equivalent) between the pins and a 10uF, low ESR
ceramic capacitor on pin 33.
.
The 1.8V voltage may not be used for supplying other components in the host system.
2.2 Clocking
The MM516 module contains a24 MHz crystal from which the internal system clock for the BlueCore 5 chip is generated.

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3 Physical Description
3.1 RF Receiver
The receiver features a near-zero IF architecture that allows the channel filters to be integrated onto the die. Sufficient
out-of-band blocking specification at the LNA input allows the radio to be used in close proximity to GSM and WCDMA
cellular phone transmitters without being desensitized. The use of a digital FSK discriminator means that no
discriminator tank is needed and its excellent performance in the presence of noise allows BlueCore 5 chip to
exceed the Bluetooth requirements for co-channel and adjacent channel rejection.
For EDR, an ADC is used to digitize the IF received signal.
3.1.1 Low Noise Amplifier
The LNA can be configured to operate in single-ended or differential mode. Single-ended mode is used for Class 1
Bluetooth operation; differential mode is used for Class 2 operation.
3.1.2 Analog to Digital Converter
The ADC is used to implement fast AGC. The ADC samples the RSSI voltage on a slot-by-slot basis. The front-end
LNA gain is changed according to the measured RSSI value, keeping the first mixer input signal within a limited
range. This improves the dynamic range of the receiver, improving performance in interference limited environments.
3.2 RF Transmitter
3.2.1 IQ Modulator
The transmitter features a direct IQ modulator to minimize the frequency drift during a transmit timeslot, which results
in a controlled modulation index. Digital baseband transmit circuitry provides the required spectral shaping.
3.2.2 Power Amplifier
The internal PA has a maximum output power of 6dBm. This allows BlueCore 5 chip to be used in Class 2 and
Class 3 radios without an external RF PA.
Support for transmit power control allows a simple implementation for Class 1 with an external RF PA.
3.3 RF Synthesizer
The radio synthesizer is fully integrated onto the die with no requirement for an external VCO screening can, varactor
tuning diodes, LC resonators or loop filter. The synthesizer is guaranteed to lock in sufficient time across the
guaranteed temperature range to meet the Bluetooth v2.1 + EDR specification.
3.4 Clock Input and Generation
The reference clock for the system is generated from a crystal input of 24MHz. All internal
reference clocks are generated using a phase locked loop, which is locked to the external reference frequency.

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3.5 Baseband and Logic
3.5.1 Memory Management Unit
The MMU provides a number of dynamically allocated ring buffers that hold the data that is in transit between the
host and the air. The dynamic allocation of memory ensures efficient use of the available RAM and is performed by
a hardware MMU to minimize the overheads on the processor during data/voice transfers.
3.5.2 Burst Mode Controller
During radio transmission the BMC constructs a packet from header information previously loaded into memory mapped
registers by the software and payload data/voice taken from the appropriate ring buffer in the RAM. During
radio reception, the BMC stores the packet header in memory-mapped registers and the payload data in the
appropriate ring buffer in RAM. This architecture minimizes the intervention required by the processor during
transmission and reception.
3.5.3 Physical Layer Hardware Engine DSP
Dedicated logic is used to perform the following:
Forward error correction
Header error control
Cyclic redundancy check
Encryption
Data whitening
Access code correlation
Audio transcoding
The following voice data translations and operations are performed by firmware:
A-law/μ-law/linear voice data (from host)
A-law/μ-law/CVSD (over the air)
Voice interpolation for lost packets
Rate mismatch correction
The hardware supports all optional and mandatory features of Bluetooth v2.1 + EDR including AFH and eSCO.
3.5.4 System RAM
48KB of on-chip RAM is provided to support the RISC MCU and is shared between the ring buffers used to hold
voice/data for each active connection and the general purpose memory required by the Bluetooth stack.
3.5.5 External Memory Driver
The External Memory Driver interface can be used to connect to the external Flash memory and also to the optional
external RAM for memory intensive applications.
3.5.6 Kalimba DSP RAM
Additional on-chip RAM is provided to support the Kalimba DSP:
16K x 24-bit for data memory 1 (DM1)
12K x 24-bit for data memory 2 (DM2)
6K x 32-bit for program memory (PM)
DSP can also execute directly from external Flash, using a 64-instruction on-chip cache.
3.5.7 USB
This is a full-speed USB interface for communicating with other compatible digital devices. BlueCore 5 chip acts
as a USB peripheral, responding to requests from a master host controller such as a PC.

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3.5.8 Synchronous Serial Interface
3.5.9 UART
This is a standard UART interface for communicating with other serial devices.
3.6 Microcontroller
The MCU, interrupt controller and event timer run the Bluetooth software stack and control the radio and host
interfaces. A 16-bit RISC microcontroller is used for low power consumption and efficient use of memory.
3.6.1 Programmable I/O
BlueCore 5 chip has a total of 18 programmable I/O terminals (16 digital and 2 analog). These are controlled by
firmware running on the device.
3.6.2 802.11 Coexistence Interface
Dedicated hardware is provided to implement a variety of 802.11 (Wi-Fi) coexistence schemes. Channel skipping
AFH, priority signalling, channel signalling and host passing of channel instructions are all supported. The features
are configured in firmware. The details of some methods are proprietary. Contact CSR for details.

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4 Bluetooth Software Stacks
The BlueCore 5 chip is supplied with Bluetooth v2.1 + EDR compliant stack firmware, which runs on the internal RISC
microcontroller.
The BlueCore 5 chip software architecture allows Bluetooth processing and the application program to be shared
in different ways between the internal RISC microcontroller and an external host processor (if any). The upper layers
of the Bluetooth stack (above HCI) can be run either on-chip or on the host processor.
4.1 BlueCore HCI Stack
Figure 3 BlueCore HCI Stack
In the implementation shown in Figure 3 the internal processor runs the Bluetooth stack up to the HCI. The Host
processor must provide all upper layers including the application.

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4.1.1 Key Features of the HCI Stack: Standard Bluetooth Functionality
Bluetooth v2.1 + EDR mandatory functionality:
AFH, including classifier
Faster connection - enhanced inquiry scan (immediate FHS response)
LMP improvements
Parameter ranges
Optional Bluetooth v2.1 + EDR functionality supported:
AFH as Master and Automatic Channel Classification
Fast Connect: Interlaced Inquiry and Page Scan plus RSSI during Inquiry
eSCO, eV3 +CRC, eV4, eV5
SCO handle
Synchronization
The firmware was written against the Bluetooth v2.1 + EDR specification.
Bluetooth components:
◦Baseband (including LC)
◦LM
◦HCI
Standard USB v2.0 and UART HCI Transport Layers
All standard radio packet types
Full Bluetooth data rate, enhanced data rates of 2 and 3Mbps
Operation with up to seven active slaves1
Scatternet v2.5 operation
Maximum number of simultaneous active ACL connections: 7
Maximum number of simultaneous active SCO connections: 32
Operation with up to three SCO links, routed to one or more slaves
All standard SCO voice coding, plus transparent SCO
Standard operating modes: Page, Inquiry, Page-Scan and Inquiry-Scan
All standard pairing, authentication, link key and encryption operations
Standard Bluetooth power saving mechanisms: Hold, Sniff and Park modes, including Forced Hold
Dynamic control of peers' transmit power via LMP
Master/Slave switch
Broadcast
Channel quality driven data rate
All standard Bluetooth test modes
A block of radio test or BIST commands allows direct control of the chip's radio. This aids the development
of modules' radio designs, and can be used to support Bluetooth qualification.
VM. The firmware provides the VM environment in which to run application-specific code. Although the is mainly
used with BlueLab and RFCOMM builds (alternative firmware builds providing L2CAP, SDP and
RFCOMM), the VM can be used with this build to perform simple tasks such as flashing LEDs via the chip's
PIO port.
Hardware low power modes: Shallow Sleep and Deep Sleep. The chip drops into modes that significantly
reduce power consumption when the software goes idle.
SCO channels are normally routed via HCI (over BCSP). However, up to three SCO channels can be routed
over the chip's single PCM port (at the same time as routing any remaining SCO channels over HCI).
1
This is the maximum allowed by Bluetooth v2.1 + EDR specification.
2
BlueCore 5 chip supports all combinations of active ACL and SCO channels for both master and
slave operation, as specified by the Bluetooth v2.1 + EDR specification.
The firmware's supported Bluetooth features are detailed in the standard PICS documents, available from www.csr.com.

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4.2 Key Features of the HCI Stack: Extra Functionality
The firmware extends the standard Bluetooth functionality with the following features:
Supports BlueCore Serial Protocol (BCSP), a proprietary, reliable alternative to the standard Bluetooth
UART Host Transport
Supports H4 Deep Sleep (H4DS), a proprietary alternative to the standard Bluetooth UART Host Transport,
supporting Deep Sleep for low-power applications
Provides a set of approximately 50 manufacturer-specific HCI extension commands. This command set,
called BlueCore Command (BCCMD), provides:
Access to BlueCore5-Multimedia External general-purpose PIO port
The negotiated effective encryption key length on established Bluetooth links
Access to the firmware random number generator
Controls to set the default and maximum transmit powers; these can help minimise interference
between overlapping, fixed-location piconets
Dynamic UART configuration
Bluetooth radio transmitter enable/disable. A simple command connects to a dedicated hardware
switch that determines whether the radio can transmit.
The firmware can read the voltage on a pair of BlueCore5-Multimedia External external pins. This is normally
used to build a battery monitor
A block of BCCMD commands provides access to the BlueCore5-Multimedia External Persistent Store (PS)
configuration database . The database sets the BlueCore5-Multimedia External Bluetooth address, Class
of Device, Bluetooth radio (transmit class) configuration, SCO routing, link manager (LM), etc.
A UART break condition can be used in three ways:
Presenting a UART break condition to the chip can force the chip to perform a hardware reboot
Presenting a break condition at boot time can hold the chip in a low power state, preventing normal
initialization while the condition exists
With BCSP, the firmware can be configured to send a break to the host before sending data. (This is
normally used to wake the host from a Deep Sleep state.)
A block of Bluetooth radio test or BIST commands allows direct control of the
BlueCore5-Multimedia External radio. This aids the development of modules' radio designs, and can be
used to support Bluetooth qualification.
Hardware low power modes: Shallow Sleep and Deep Sleep. The chip drops into modes that significantly
reduce power consumption when the software goes idle.
SCO channels are normally routed via HCI (over BCSP). However, up to three SCO channels can be routed
over the PCM interface (at the same time as routing any remaining SCO channels over HCI).

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4.3 Additional Software for Other Embedded Applications
When the upper layers of the Bluetooth protocol stack are run as firmware on BlueCore 5 chip, a UART software
driver is supplied that presents the L2CAP, RFCOMM and SDP APIs to higher Bluetooth stack layers running on
the host. The code is provided as C source or object code.
4.4 CSR Development Systems
CSR’s BlueLab Multimedia and Casira development kits are available to allow the evaluation of the BlueCore 5-
External hardware and software, and as toolkits for developing on-chip and host software.

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5 Interfaces
5.1 UART Interface
This is a standard UART interface for communicating with other serial devices.
BlueCore 5 chip UART interface provides a simple mechanism for communicating with other serial devices using
the RS232 protocol.
Figure 4 Universal Asynchronous Receiver/Transmitter
Four signals are used to implement the UART function, as shown in Figure 4. When BlueCore 5 chip is
connected to another digital device, UART_RX and UART_TX transfer data between the two devices. The remaining
two signals, UART_CTS and UART_RTS, can be used to implement RS232 hardware flow control where both are
active low indicators. All UART connections are implemented using CMOS technology and have signalling levels of
0V and VDD_USB.
UART configuration parameters, such as data rate and packet format, are set using BlueCore 5 chip software.
Note:
In order to communicate with the UART at its maximum data rate using a standard PC, an accelerated serial
port adapter card is required for the PC.

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Table 2 UART Settings
The UART interface is capable of resetting BlueCore 5 chip upon reception of a break signal. A break is identified
by a continuous logic low (0V) on the UART_RX terminal, as shown in Figure 5. If t BRK is longer than the value,
defined by PSKEY_HOST_IO_UART_RESET_TIMEOUT, (0x1a4), a reset will occur. This feature allows a host to initialize
the system to a known state. Also, BlueCore 5 chip
can emit a break character that may be used to wake the host.
Figure 5 Break Signal
Note:
The DFU boot loader must be loaded into the Flash device before the UART or USB interfaces can be used.
This initial flash programming can be done via the SPI.
Table 3 shows a list of commonly used data rates and their associated values for PSKEY_UART_BAUD_RATE (0x204).
There is no requirement to use these standard values. Any data rate within the supported range can be set in the
PS Key according to the formula
Data Rate = PSKEY_UART_BAUDRATE/0.004096

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Table 3 Standard Data Rates
Table of contents