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3-1
CHAPTER3
TECHNICAL DESCRIPTION
The HAL DSP-4100 is a DSP modem that will support a
variety
of
HF radio communication protocols. The
DSP-4100 operates from
12
VDC power. All commands
and data are passed via an RS-232 serial
110
connector on
the DSP-4100 rear panel. This connector also provides
connection to a second serial
110
port which may be used
as a "pass-through" between the terminal device and
another serial
110
device. All
110
connections to the radio
equipment are made via a DE-9S connection on the rear
panel. The only rear panel adjustment is the modulator
output level.
The DSP-4100 uses a dual processor architecture with a
powerful 16 bit microprocessor controller and a fast DSP
for audio processing. Operational software for the two
internal processors is stored in non-volatile Flash ROM
devices. However, for upgrade purposes, this software
may also be revised by uploading new versions via the
serial
110
port. As a result, the DSP-4100 is a powerful
platform for implementing many different waveforms.
A block diagram
of
the DSP-4100 is shown in Figure 3.1.
There are three major sections:
1)
the Microprocessor
section, 2) the DSP and audio section, and 3) the Power
and
110
section. Each
of
these sections is described in
this chapter.
3.1 DSP-4100 Controller
The DSP-4100 uses a 16 bit 68000 based microprocessor
to
control the board operations. This processor controls all
board outputs, downloads application software into the
DSP and its own RAM, and handles all communications
with the PC application program.
HAL030301
3.1.1 Microprocessor Section
The DSP-4100 controller
is
a Motorola
MC68ECOOO
16
bit microprocessor operating with a 10.24 MHz crystal
oscillator clock. Figure 3.2 illustrates the microprocessor
(U25), the Flash ROM (U20, U22) and RAM {U21, U23)
memory. The DSP-4100 does not include Read Only
Memory (EPROM) devices but instead uses a portion
of
the Flash ROM to store boot routines, lookup tables, and
other fixed routines.
The memory devices connected to the microprocessor
may be accessed as 8 bit bytes
or
16 bit words. The micro-
processor can access all external memory as 8 bit bytes on
even and odd addresses or
16
bit words on even addresses
only. Flash ROM U20 and ROM U22, enabled
by
LCS.L,
store the high or even address data bytes, and RAM
U21
and RAM U23, enabled by UCS.L, store the low or odd
address data bytes.
The ftxed "BOOT'' area
of
Flash ROM base address is
OOOOOH
and RAM memory starts at 40000H. All memory
and other board registers are mapped in memory address
space; there are no
110
addresses used. Since none
of
the
board level memory orregisters require wait or idle states,
the address strobe signal, AS.L, drives the access
acknowledge signal, DTACK.L, through two inverters.
The DSP-4100 application software is stored in non-
volatile Flash memory; new ftrmware is uploaded via the
serial port. The BOOT ROM section
of
the Flash memory
stores a boot-strap loading program and commonly used
utility subroutines. The application program executes
directly from the upload portion
of
the Flash ROM. The
DSP code
is
transferred from a separate section from the
Flash ROM during unit iflitialization.
DSP-4100 TECHNICAL MANUAL
