IBM EM78P809N User manual

EM78P809N
8-BIT
Microcontroller
Product
Specification
DOC.VERSION 1.0
ELAN MCCROELECTRONICS CORP.
July 2005

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Copyright © 2005 by ELAN Microelectronics Corporation
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Contents
Product Specification (V1.0) 07.26.2005 •iii
Contents
1General Description ··························································································· 1
2Features ·············································································································· 1
2.1 CPU········································································································································ 1
2.2 Applications ···························································································································· 2
3Pin Assignment ·································································································· 3
4Pin Description··································································································· 3
4Function Description·························································································· 5
4.1 Functional Block Diagram ······································································································ 5
4.2 Operating Registers ··············································································································· 6
4.3 Special Purpose Registers ··································································································· 23
4.4 CPU Operation Mode··········································································································· 27
4.5 AD Converter························································································································ 29
4.6 Time Base Timer and Keytone Generator············································································ 31
4.7 UART (Universal Asynchronous Receiver/Transmitter) ······················································· 33
4.8 SPI (Serial Peripheral Interface) ·························································································· 36
4.9 Timer/Counter 2 ··················································································································· 40
4.10 Timer/Counter 3 ··················································································································· 42
4.11 Timer/Counter 4 ··················································································································· 44
4.12 TCC/WDT & Prescaler ········································································································· 46
4.13 I/O Ports ······························································································································· 47
4.14 RESET and Wake-up ··········································································································· 47
4.15 Interrupt ································································································································ 54
4.16 Oscillator ······························································································································ 55
4.17 Code Option Register··········································································································· 58
4.18 Power-on Considerations····································································································· 59
4.19 Instruction Set ······················································································································ 61

Contents
iv •Product Specification (V1.0) 07.26.2005
5Absolute Maximum Ratings ············································································ 63
5.1 Absolute Maximum Ratings ································································································· 63
5.2 Recommended Operating Conditions·················································································· 63
6Electrical Characteristics················································································· 64
6.1 DC Electrical Characteristics································································································ 64
6.2 AC Electrical Characteristic·································································································· 67
6.3 Timing Diagram ··················································································································· 68
APPENDIX ·············································································································· 69
Package Types:······························································································································ 69
Specification Revision History
Version Revision Description Date
0.9 Preliminary 2004/03/04
1.0 Initial Version 2005/07/26

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •1
(This specification is subject to change without further notice)
1 General Description
The EM78P809N is an 8-bit microprocessor with low-power, high-speed CMOS
technology and high noise immunity. It has a built-in 8K×13-bits Electrical One Time
Programmable Read Only Memory (OTP-ROM). It provides multi-protection bits to
prevent intrusion of user’s OTP memory codes. Seven Option bits are also available to
meet user’s requirements.
With its OTP-ROM feature, the EM78P809N is able to offer a convenient way of
developing and verifying user’s programs. Moreover, user can take advantage of
ELAN Writer to easily program his development code.
2 Features
2.1 CPU
Operating voltage: 2.5V~5.5V
Operating temperature range: -40°C~85°C
Operating frequency range (base on 2 clocks)
zCrystal mode: 1MHz ~ 8MHz at 4.5V, 1MHz ~ 4MHz at 2.5V
zRC mode: 1MHz ~ 4MHz at 2.5V
Low power consumption:
zTypically 0.8 μA, during sleep mode
8K ×13 bits on-chip ROM
Multi-security bits to prevent intrusion of OTP memory codes
One configuration register accommodates user’s requirements
144 ×8 bits on-chip registers (SRAM, general purpose register)
4 bi-directional I/O ports (22 pins)
zHigh sink current output pin: 14 pins
z10 programmable pull high I/O pins
z10 programmable pull low I/O pins
8 level stacks for subroutine nesting
High performance MCU: Two clocks per instruction cycle
15 interrupts (External: 9, Internal: 6)
Programmable free running watchdog timer

EM78P809N
8-Bit Microcontroller
2 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
16 bits Counter/Timer
zTC2: Timer/Counter/Window
8 bits Timer/Counter
zTCC: 8-bit real time clock/counter with overflow interrupt
zTC3: Timer/Counter/Capture
zTC4: Timer/Counter/ PWM (pulse width modulation)/PDO (Programmable
divider output)
Time Base Timer: (1Hz ~16kHz at 8MHz)
Key tone output: (1kHz ~ 8kHz at 8MHz)
Serial transmitter/receiver interface
zSerial Peripheral Interface (SPI): Three-wire synchronous communication
zUniversal asynchronous receiver transmitter interface (UART): Two wire
asynchronous communication
AD converter
z8 channel 10 bits resolution AD converter
Operating mode:
zNormal mode: Oscillation circuit turned on, CPU and Peripheral circuit in
operation
zIdle mode: Oscillation circuit turned on, CPU halt and Peripheral circuit in
operation
zSleep mode: Oscillation circuit turned off, CPU and Peripheral circuit halt
Package types:
z28-pin DIP 600 mil: EM78P809NP
z28-pin SOP 300 mil: EM78P809NM
z28-pin SSOP 209 mil: EM78P809NS
99.9% single instruction cycle commands
2.2 Applications
General purpose

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •3
(This specification is subject to change without further notice)
3 Pin Assignment
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
(ACLK) OSCO
OSCI
TEST
(AD0) P90
(AD1) P91
(AD2) P92
(AD3) P93
(AD4) P94
(AD5) P95
(AD6) P96
(AD7/VREF) P97
(TC3, INT3) P80
(TC4, /PWM, /PDO) P81
VSS P70 (/SCK)
P71(RX,SI)
P72 (TX,SO)
P73 (/SLEEP, /INT5)
P60 (/INT0)
P61 (INT1)
P62 (TC2)
P63 (/TONE)
P64 (/SS)(OEB)
P65 (PGMB)
P66 (DATAIN)
P67 (DINCK)
/RESET (VPP)
VDD
EM78P809N
Fig. 1. Pin Assignment
4 Pin Description
Table 1
Symbol Pin No. Type Function
VDD 28 - * Power supply
OSCI 2 I
* Crystal type: Crystal input terminal
* RC type: RC oscillator input pin
OSCO 1 I/O
* Crystal type: Output terminal for crystal oscillator
* RC type: Instruction clock output
* External clock signal input
/RESET 27 I * Input pin with Schmitt trigger. If this pin remains at logic low, the
controller will also remain in reset condition.
P60~P67 19~26 I/O
* P60~P67 are bi-directional I/O pins
* P60 can be used as external interrupt 0 (/INT0)
* P61 can be used as external interrupt 1 (INT1)
* P62 can be used as 16-bit Timer/Counter 2 (TC2)
* P63 can be used as divider output (/TONE)
* P64 slave mode enable (/SS)
* P60 ~ P63 can be used as pull high or pull low pins
P70~P73 15~18 I/O
* P70~P77 are bi-directional I/O pins
* P70 can be used as SPI serial clock input/output (/SCK)
* P71 can be used as SPI serial data input (SI) or UART data receive
input (RX)
* P72 can be used as SPI serial data output (SO) or UART data
transmit output (TX)
* P73 can be used as SLEEP mode release input (/SLEEP) or external
interrupt input 5 (/INT5)
* P70 ~ P73 can be used as pull high or pull low pins

EM78P809N
8-Bit Microcontroller
4 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
Symbol Pin No. Type Function
P80~P81 12~13 I/O
* P80~P83 are bi-directional I/O pins
* P80 can be used as 8-bit Timer/Counter 3 (TC3) or external Interrupt
Input 3 (INT3)
* P81 can be used as 8-bit Timer/Counter 4 (TC4) or programmable
divider output (PDO)
* P80 ~ P81 can be used as pull high or pull low pins
P90~P97 4~11 I/O
* P90~P97 are bi-directional I/O pins
* P90~P97 can be used as 8 channel 10-bit resolution A/D converter
* P97 can be used as AD reference power supply input (VREF)
VSS 14 - * Ground
NC 3 - * No connection
OTP Programming Pins
VPP 27 I Programming voltage input
ACLK 1 I CLK for OTP memory address increment
DATAIN 25 I/O ROM code series input and series output pin
DINCK 26 I ROM code input clock
PGMB 24 I Program write enable pin. Active low.
OEB 23 I Output enable pin. Active low.

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •5
(This specification is subject to change without further notice)
4 Function Description
4.1 Functional Block Diagram
Oscillator
Timing Control
WDT timer
TCC Prescaler
Control Sleep and
Wake-up I/O Port
DATA and CONTROL BUS
General RAM
R4
R1 (TCC) Interrupt
Control Instruction Register
Instruction
Decoder
ROM Stack
R2
ALU
ACC
R3
R5
OSCI OSCO
PORT6
IOC6 R6
PORT7
IOC7 R7
PORT8
IOC8 R8
PORT9
IOC9 R9
TC 2 (16-bit Timer/Counter)
TC 3 (8-bit Timer/Counter, Capture Mode)
TC 4 (8-bit Timer/Counter, PWM, PDO)
SPI (Serial Peripheral Interface)
UART (Universal Asynchronous
Receiver/Transmitter)
8 channel 10 bit ADC
Keytone
TBT (Time Base Timer) P60 ~ P67 P70 ~ P73 P80 ~ P81 P90 ~ P97
WDT Prescaler
Fig. 2. Functional Block Diagram

EM78P809N
8-Bit Microcontroller
6 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
4.2 Operating Registers
05
06
07
08
09
0A
0B
0C
0D
0E
0F
04
03
02
01
10
:
1F
20
:
3F
R3 (7,6)= (0,1)
Address
REGISTER
BANK 0
00
R0/ IAR
R1/ TCC
R2/ PC
R3/ SR
R4/ RSR
SCR
PORT6
PORT7
PORT8
PORT9
Reserved
TC4CR
TC4D
ISFR0
ISFR1
ISFR2
TC3CR
TC3DA
TC3DB
TC2CR/ ADDL
TC2DH
TC2DL
ADCR
ADIC
ADDH
TBKTC
Reserved
URC1
URC2
URS
URRD
URTD
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SPIC1
SPIC2
SPID
Reserved
Reserved
Reserved
PHC1
PLC1
PHC2
PLC2
Reserved
IOC6
IOC7
IOC8
IOC9
Reserved
Reserved
INTCR
ADOSCR
Reserved
IMR1
IMR2
16 Byte
Common Register
BANK 0
R4 (7,6) = (0,0)
32 Byte
Common Register
BANK 1
R4 (7,6) = (0,1)
32 Byte
Common Register
BANK2
R4 (7,6) = (1,0)
32 Bytes
Common Register
BANK 3
R4 (7,6) = (1,1)
32 Bytes
Common Register
REGISTER
BANK 1 REGISTER BANK 2 REGISTER BANK 3 CONTROL REGISTER
R3 (7,6)= (1,0) R3 (7,6)= (1,1)
Fig. 3. Operating Registers

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •7
(This specification is subject to change without further notice)
R0/IAR −Indirect Addressing Register ( Address: 00h )
R0 is not a physically implemented register. Its major function is to act as an indirect
addressing pointer. Any instruction using R0 as a pointer actually accesses data
pointed by the RAM Select Register (R4).
R1/TCC −Time Clock /Counter ( Address: 01h )
This register is writable and readable just like the other registers. The contents of the
prescaler counter are cleared only when a value is written into the TCC register.
R2/PC −Program Counter & Stack ( Address: 02h )
Depending on the device type, R2 and hardware stack are 10-bit wide. The
structure is depicted in Fig.4.
Generates 8192 ×13 bits on-chip OTP ROM addresses to the relative
programming instruction codes. One program page is 1024 words long.
R2 is set as all "0"s when under RESET condition
"JMP" instruction allows direct loading of the lower 10 program counter bits.
Thus, "JMP" allows the PC to go to any location within a page.
"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is
pushed into the stack. Thus, the subroutine entry address can be located
anywhere within a page.
"RET" ("RETL k", "RETI") instruction loads the program counter with the
contents of the top-level stack.
All instructions are single instruction cycle (fclk/2 or fclk/4) except for the
instruction that would change the contents of R2. Such instruction will need
one more instruction cycle.
For an interrupt trigger, the program ROM will jump to individual interrupt
vector at Page 0. The CPU will store ACC, R3 status and R5 PAGE
automatically, it will restore after instruction RETI.

EM78P809N
8-Bit Microcontroller
8 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
A11 A10 A9 A8 A7 ~ A0
R5
CALL
RET
RETL
RETI
000 : PAGE0 0000~03FF
001 : PAGE1 0400~07FF
010 : PAGE2 0800~0BFF
PC
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
Reset Vector
0000h
On-chip Program Memory
User Memory Space
A12
011 : PAGE3 0C00~0FFF
100 : PAGE4 1000~13FF
101 : PAGE5 1400~17FF
110 : PAGE6 1800~1BFF
111 : PAGE7 1C00~1FFF
Store ACC, R3, R5
WDT Timer Overflow
0003h
External INT0 Pin Interrupt Occurs
0006h
TCC Overflow
External INT1 pin Interrupt Occurs
0009h
UART Transmit Data Buffer Empty
UART Receive Data Buffer Full
000Fh
0015h
0018h
UART Receive Error
001Bh
TC3 Interrupt
0021h
SPI Interrupt
0024h
TC4 Interrupt
0027h
External INT3 Pin Interrupt Occurs
Time Base Timer Interrupt
0012h
0030h
AD Conversion Complete
0033h
External INT5 Pin Interrupt Occurs
0036h
1FFFh
STACK LEVEL 6
STACK LEVEL 7
STACK LEVEL 8
Fig. 4. Program Counter Organization
R3/SR −Status Register ( Address: 03h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
RBS1 RBS0 0 T P Z DC C
Bit 7 ~ Bit 6 (RBS1 ~ RBS0) : R-Register page select
RBS1 RBS0 Register Bank (Address 05H ~ 0FH)
0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
Bit 5 : Not used
Bit 4 (T) : Time-out bit. Set to “1” with the "SLEP" and "WDTC" commands, or
during power up, and reset to “0” with the WDT time-out.

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •9
(This specification is subject to change without further notice)
Bit 3 (P) : Power down bit. Set to “1” during power on or by a "WDTC" command
and reset to “0” by a "SLEP" command.
Bit 2 (Z) : Zero flag. Set to "1" if the result of an arithmetic or logic operation is
zero.
Bit 1 (DC) : Auxiliary carry flag
Bit 0 (C) : Carry flag
R4/RSR −RAM Select Register ( Address: 04h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
GRBS1 RBS0 RSR5 RSR4 RSR3 RSR2 RSR1 RSR0
Bit 7: 6( GRBS1 : GRBS0 ) : determine which general purpose banks are
activated among the 4 banks. Use BANK instruction (e.g. BABK 1) to
change bank.
GRBS1 GRBS0 General Purpose Register Bank (Address 20H ~ 3FH)
0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
Bit 5: 0( RSR5 : RSR0 ) : are used to select the registers (address: 00h~3Fh) in
the indirect addressing mode. If no indirect addressing is used, the RSR
can be used as an 8-bit general-purpose read/write register. See the
data memory configuration in Fig. 3.
Register Bank 0 ( R3 bits (7, 6) = (0, 0) )
SCR −System Control Register, Program ROM Page Select ( Address: 05h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 PS2 PS1 PS0 0 1 SIS REM
Bit 6 (PS2) ~ 4 (PS0) : ROM Page select bits. User can use PAGE instruction (e.g.
PAGE 1) or set PS2~PS0 bits to change the ROM page. When
executing a "JMP", "CALL", or other instructions which cause the
program counter to change (e.g. MOV R2, A), PS2~PS0 are loaded into
the 13th to 11th bits of the program counter and select one of the
available program memory pages. Note that RET (RETL, RETI)
instruction does not change the PS2~PS0 bits. That is, return will
always be to the page from where the subroutine was called, regardless
of the PS2~PS0 bits current setting.

EM78P809N
8-Bit Microcontroller
10 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
PS2 PS1 PS0 Program Memory Page [Address]
0 0 0 Page 0 [0000~03FF]
0 0 1 Page 1 [0400~07FF]
0 1 0 Page 2 [0800~0BFF]
0 1 1 Page 3 [0C00~0FFF]
1 0 0 Page 4 [1000~13FF]
1 0 1 Page 5 [1400~17FF]
1 1 0 Page 6 [1800~1BFF]
1 1 1 Page 7 [1C00~1FFF]
Bit 1 ( SIS ) : SLEEP and IDLE mode select.
SIS = “0” : IDLE mode
SIS = “1” : SLEEP mode
Bit 0 ( REM ) : Release method for sleep mode.
REM = “0” : /SLEEP pin input rising edge release
REM = “1” : /SLEEP pin input “H” level release
PORT6 −Port 6 I/O Data Register ( Address: 06h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
P67 P66 P65 P64 P63 P62 P61 P60
Bit 7 ~ Bit 0 ( P67 ~ P60 ) : 8-bits Port 6 I/O data register
User can use IOC6 register to define each bit whether input or output.
PORT7 —Port 7 I/O Data Register ( Address: 07h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 0 P73 P72 P71 P70
Bit 3 ~ Bit 0 ( P73 ~ P70 ) : Port 73 ~ Port 70 I/O data register
User can use IOC7 register to define each bit whether input or output.
PORT8 −Port 8 I/O Data Register ( Address: 08h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 0 0 0 P81 P80
Bit 1 ~ Bit 0 ( P81 ~ P80 ) :Port 81 ~ Port 80 I/O data register
User can use IOC8 register to define input or output each bit.

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •11
(This specification is subject to change without further notice)
PORT9 −Port 9 I/O Data Register ( Address: 09h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
P97 P96 P95 P94 P93 P92 P91 P90
Bit 7 ~ Bit 0 ( P97 ~ P90 ) : 8-bit Port 97 ~ Port 90 I/O data register
User can use IOC9 register to define each bit whether input or output.
TC4CR —Timer/Counter 4 Control Register ( Address: 0Bh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC4FF1 TC4FF0 TC4S TC4CK2 TC4CK1 TC4CK0 TC4M1 TC4M0
Bit 7 ~ Bit 6 ( TC4FF1 ~ TC4FF0 ) : Timer/Counter4 flip-flop control.
TC4FF1 TC4FF0 Operating Mode
0 0 Clear
0 1 Toggle
1 0 Set
1 1 Reserved
Bit 5 ( TC4S ) : Timer/Counter 4 start control.
TC4S = “0” : Stop and clear counter
TC4S = “1” : Start
Bit 4 ~ Bit 2 ( TC4CK2 ~ TC4CK 0 ) : Timer/Counter 4 Clock Source Select
TC4CK2 TC4CK1 TC4CK0 Clock Source
( Normal, Idle ) Resolution ( Fosc=8M ) Max. Time ( Fosc=8M )
0 0 0 Fc/2^11 250uS 64mS
0 0 1 Fc/2^7 16uS 4mS
0 1 0 Fc/2^5 4uS 1mS
0 1 1 Fc/2^3 1uS 255uS
1 0 0 Fc/2^2 500nS 127.5uS
1 0 1 Fc/2^1 250nS 63.8uS
1 1 0 Fc 125nS 31.9uS
1 1 1 External clock (TC4 pin) -- --
Bit 1 ~ Bit 0 ( TC4M1 ~ TC4M0 ) : Timer/Counter 4 Operating Mode Select
TC4M1 TC4M0 Operating Mode
0 0 Timer/Counter
0 1 Reserved
1 0 Programmable Divider output
1 1 Pulse Width Modulation output

EM78P809N
8-Bit Microcontroller
12 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
TC4D −Timer 4 Data Buffer ( Address: 0Ch )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC4D7 TC4D6 TC4D5 TC4D4 TC4D3 TC4D2 TC4D1 TC4D0
Bit 7 ~ Bit 0 ( TC4D7 ~ TC4D0 ) : Data buffer of 8-bit Timer/Counter 4.
ISFR0 −Interrupt Status Flag Register 0 and INT3 Edge Detect Flag.
( Address : 0Dh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 INT3F INT3R 0 0 WDTIF EXIF0
Bit 5 ( INT3F ) : External interrupt 3 falling edge detect flag.
INT3F = “0” : Falling edge is not detected
INT3F = “1” : Falling edge is detected
Bit 4 ( INT3R ) : External interrupt 3 rising edge detect flag.
INT3R = “0” : Rising edge is not detected
INT3R = “1” : Rising edge is detected
Bit 1 ( WDTIF ) : WDT time-out flag, flag cleared by software.
Bit 0 ( EXIF0 ) : External interrupt flag (INT0). Flag cleared by software. If the
INT0EN is reset to “0”, the flag is cleared.
ISFR1 −Interrupt Status Flag Register 1 ( Address: 0Eh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
EXIF5 TCIF2 ADIF 0 EXIF3 TCIF4 SPIF TCIF3
Bit 7 ( EXIF5 ) : External Interrupt Flag (/INT5), flag cleared by software.
Bit 6 ( TCIF2 ) : 16-bit Timer/Counter 2 Interrupt Flag, flag cleared by software.
Bit 5 ( ADIF ) : AD conversion complete flag, flag cleared by software.
Bit 3 ( EXIF3 ) : External Interrupt Flag (/INT3), flag cleared by software.
Bit 2 ( TCIF4 ) : 8-bit Timer/Counter 4 Interrupt Flag, flag cleared by software.
Bit 1 ( SPIF ) : SPI Mode Interrupt Flag, flag cleared by software.
Bit 0 ( TCIF3 ) : 8-bit Timer/Counter 3 interrupt flag, flag cleared by software.
"1" means interrupt request, "0" means non-interrupt
ISFR1 can be cleared by instruction, but cannot be set by instruction
IMR1 is the interrupt mask register
Note that reading ISFR1 will obtain the result of the ISFR1 "logic AND" and
IMR1.

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •13
(This specification is subject to change without further notice)
ISFR2 −Interrupt Status Flag Register 2 ( Address: 0Fh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 UERRIF RBFF TBEF TBIF EXIF1 0 TCIF0
Bit 6 (UERRIF) : UART Receiving Error Interrupt, cleared by software or UART
disabled.
Bit 5 (RBFF) : UART Receive Mode Data Buffer Full Interrupt Flag. Flag cleared
by software.
Bit 4 (TBEF) : UART Transmit Mode Data Buffer Empty Interrupt Flag. Flag
cleared by software.
Bit 3 (TBIF) : Time Base Timer Interrupt Flag. Flag cleared by software.
Bit 2 (EXIF1) : External Interrupt Flag (INT1). Flag cleared by software.
Bit 0 (TCIF0) : TCC Overflow Interrupt Flag. Set as TCC overflows; flag cleared
by software.
"1" means interrupt request, "0" means non-interrupt
ISFR2 can be cleared by instruction, but cannot be set by instruction
IMR2 is the interrupt mask register
Note that reading ISFR2 will obtain the result of the ISFR2 "logic AND" and
IMR2
Register Bank 1 ( R3 bits ( 7,6) = (0,1) )
TC3CR −Timer/Counter 3 Control Register ( Address: 05h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC3CAP TC3S TC3CK1 TC3CK0 TC3M 0 0 0
Bit 7 ( TC3CAP ) : Software capture control
TC3CAP = “0” : -
TC3CAP = “1” : Software capture
Bit 6 ( TC3S ) : Timer/Counter 3 start control
TC3S = “0” : Stop and counter clear
TC3S = “1” : Start

EM78P809N
8-Bit Microcontroller
14 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
Bit 5 ~ Bit 4 ( TC3CK1 ~ TC3CK0 ) : Timer/Counter3 Clock Source Select
TC3CK1 TC3CK0 Clock source
( Normal, Idle ) Resolution ( Fc=8M ) Max. time ( Fc=8M )
0 0 Fc/212 512μS 131.1mS
0 1 Fc/210 128μS 32.6mS
1 0 Fc/2716μS 4.1mS
1 1 External clock (TC3 pin) - -
Bit 3 ( TC3M ) : Timer/Counter 3 mode select
TC3M = “0” : Timer/Counter3 mode
TC3M = “1” : Capture mode
TC3DA −Timer 3 Data Buffer A ( Address: 06h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC3DA7 TC3DA6 TC3DA5 TC3DA4 TC3DA3 TC3DA2 TC3DA1 TC3DA0
Bit 7 ~ Bit 0 ( TC3DA7 ~ TC3DA0 ) : Data buffer of 8-bit Timer/Counter 3.
Reset does not affect this register.
TC3DB −Timer 3 Data Buffer B ( Address: 07h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC3DB7 TC3DB6 TC3DB5 TC3DB4 TC3DB3 TC3DB2 TC3DB1 TC3DB0
Bit 7 ~ Bit 0 ( TC3DB7 ~ TC3DB0 ) : Data buffer of 8-bit Timer/Counter 3
Reset does not affect this register.
TC2CR/ ADDL —Timer/Counter 2 Control Register, AD Low 2 bits Data
Buffer ( Address: 08h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ADD1 ADD0 0 TC2M TC2S TC2CK2 TC2CK1 TC2CK0
Bit 7 ~ Bit 6 ( ADD1 ~ ADD0 ) :AD low 2-bit data buffer
Bit 4 ( TC2M ) : Timer/Counter 2 mode select
TC2M = “0” : Timer/counter mode
TC2M = “1” : Window mode
Bit 3 ( TC2S ) :Timer/Counter 2 start control
TC2S = “0” : Stop and counter clear
TC2S = “1” : Start

EM78P809N
8-Bit Microcontroller
Product Specification (V1.0) 07.26.2005 •15
(This specification is subject to change without further notice)
Bit 2 ~ Bit 0 ( TC2CK2 ~ TC2CK0 ) : Timer/Counter 2 Clock Source Select
TC2CK2 TC2CK1 TC2CK0 Clock Source
( Normal, Idle ) Resolution ( Fc=8M ) Max. Time ( Fc=8M )
0 0 0 Fc/223 1.05s 19.1h
0 0 1 Fc/213 1.02ms 1.1min
0 1 0 Fc/2832μs 2.1s
0 1 1 Fc/231μs 65.5ms
1 0 0 Fc 125ns 7.9ms
1 0 1 - - -
1 1 0 - - -
1 1 1 External clock (TC2 pin)
TC2DH −Timer 2 Data Buffer High Byte ( Address: 09h )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC2D15 TC2D14 TC2D13 TC2D12 TC2D11 TC2D10 TC2D9 TC2D8
Bit 7 ~ Bit 0 ( TC2D15 ~ TC2D8 ) : 16-bit Timer/Counter 2 data buffer high byte.
TC2DL −Timer 2 Data Buffer Low Byte ( Address: 0Ah )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TC2D7 TC2D6 TC2D5 TC2D4 TC2D3 TC2D2 TC2D1 TC2D0
Bit 7 ~ Bit 0 ( TC2D7 ~ TC2D0 ) : 16-bit Timer/Counter 2 data buffer low byte.
ADCR −AD Control Register ( Address: 0Bh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ADREF ADRUN ADCK1 ADCK0 ADP ADIS2 ADIS1 ADIS0
Bit 7 ( ADREF ) : AD reference voltage input select.
ADREF = “0” : Internal VDD, P97 is used as IO.
ADREF = “1” : External reference pin, P97 is used as reference input pin.
Bit 6 ( ADRUN ) : AD Conversion start
ADRUN = “0” : Reset on completion of the conversion by hardware, this bit
cannot be reset by software.
ADRUN = “1” : Conversion starts

EM78P809N
8-Bit Microcontroller
16 •Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
Bit 5~ Bit 4 ( ADCK1 ~ ADCK0 ) : AD Conversion Time Select
ADCK1 ADCK0 Clock Source
( Normal, Idle ) Max. Operating
Frequency (Fc)
0 0 Fc/4 1MHz
0 1 Fc/16 4MHz
1 0 Fc/32 8MHz
1 1 Reserved -
Bit 3 ( ADP ) : AD power control
ADP = “0” : Power on
ADP = “1” : Power down
Bit 2 ~ Bit 0 ( ADIS2 ~ ADIS0 ) : Analog Input Pin Select
ADIS2 ADIS1 ADIS0 Analog Input Pin
0 0 0 AD0
0 0 1 AD1
0 1 0 AD2
0 1 1 AD3
1 0 0 AD4
1 0 1 AD5
1 1 0 AD6
1 1 1 AD7
ADIC −AD Input Pin Control ( Address: 0Ch )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ADE7 ADE6 ADE5 ADE4 ADE3 ADE2 ADE1 ADE0
Bit 7 ~ Bit 0 ( ADE7 ~ ADE0 ) :AD input pin enable control.
ADEx = “0” : PORT9.x act as I/O pin.
ADEx = “1” : PORT9.x act as analog input pin.
ADDH −AD High 8-bit Data Buffer ( Address: 0Dh )
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ADD9 ADD8 ADD7 ADD6 ADD5 ADD4 ADD3 ADD2
Bit 7 ~ Bit 0 ( ADD9 ~ ADD2 ) : AD high 8-bit data buffer.