IPC Solutionki PC104-386L-2M User manual
IPC Solution
Website: http://www.nagasaki.com.tw
Email: [email protected]
PC104-386L-2MBPC/104386SX
CPUModuleUser’sManual
Aug 2001
Version: 1.4
Part Number: PC104-386L-2M
Copyright
©Copyright 2001by NAGASAKI Corporation. The content ofthis publication may notbe
reproduced in any part or as a whole, transcribed, stored in a retrieval system, translated
into any language, or transcribed in any form or by any means, electronic, mechanical,
magnetic etc. or otherwise without the prior written permission of FabIATech Corporation.
Disclaimer
NAGASAKI makes no representationofwarranties withrespect tothe contentsofthis
publication. Inan effort tocontinuouslyimprove the product and add features,NAGASAKI
reserves the right to revise the publication or change specifications contained in it from
time to time without prior notice of any kind from time to time.
NAGASAKI shall notbe reliable for technical oreditorial errors oromissions,which may occur
in this document.NAGASAKI shall notbe reliable for any indirect,special, incidental or
consequential damages resulting from the furnishing, performance, or use of this document.
Trademarks
Trademarks, brand names and products names mentioned in this publication are used for
identification purpose only and are the properties of their respective owners.
Technical Support
If you have problems or difficulties in using the system board, or setting up the relevant
devices, and software that are not explained in this manual, please contact our service
Returning Your Board For Service & Technical Support
If your board requires servicing, contact the dealer from whom you purchased the product
for service information. You can help assure efficient servicing of your product by following
these guidelines:
! A list of your name, address, telephone, facsimile number, or email address where
you may be reached during the day
! Description of you peripheral attachments
! Description of you software (operating system, version, application software, etc.)
and BIOS configuration
! Description of the symptoms (Extract wording any message)
For updated BIOS, drivers, manuals, or product information, please visit us at
www.nagasaki.com.tw
Static Electricity Precautions
Before removing the board from its anti-static bag, read this section about static electricity
precautions.
Static electricity is a constant danger to the computer systems. The charge that can build up
in your body may be more than sufficient to damage integrated circuits on any PC board. It
is, therefore, important to observe basic precautions whenever you use or handle computer
components. Although areas with humid climates are much less prone to static build-up, it is
always the best to safeguard against accidents, which may result in expensive repairs. The
following measures should generally be sufficient to protect your equipment from static
discharge:
# Touch a grounded metal object to discharge the static electricity in your body (or
ideally, wear a grounded wrist strap).
# When unpacking and handling the board or other system components, place all
materials on an antic static surface.
# Be careful not to touch the components on the board, especially the “golden finger”
connectors on the bottom of every board.
II
Table of contents
CHAPTER 1 OVERVIEW ..............................................................................................................................................................1
1.1 INTRODUCTION...........................................................................................................................................................1
1.2 SERIES COMPARISON TABLE ...........................................................................................................................................1
1.3 FEATURES.......................................................................................................................................................................2
1.4 PACKING LIST..............................................................................................................................................................3
CHAPTER 2 SYSTEM CONTROLLERS.......................................................................................................................................5
2.1 MICROPROCESSOR..........................................................................................................................................................5
2.2 DMA CONTROLLER...................................................................................................................................................5
2.3 KEYBOARD CONTROLLER.................................................................................................................................................6
2.4 INTERRUPT CONTROLLER ..................................................................................................................................................6
I/O Port Address Map.............................................................................................................................................7
Real-Time Clock and Non-Volatile RAM........................................................................................................8
Timer................................................................................................................................................................................8
2.5 SERIAL PORTS...............................................................................................................................................................9
2.6 PARALLEL PORTS.............................................................................................................................................................11
HARDWARE FEATURES..................................................................................................................................................................15
2.7 BOARD OVERVIEW.....................................................................................................................................................15
2.8 INDEX TO JUMPERS & CONNECTORS..........................................................................................................................16
2.9 SYSTEM SETTINGS .........................................................................................................................................................16
Keyboard/Mouse Connector (J5)..................................................................................................................17
PC/104 Connector (CN7 & CN8)....................................................................................................................19
Hard Disk (IDE) Connector (CN6)....................................................................................................................22
Reset Header (J1)...................................................................................................................................................23
Parallel Port Connector (CN1)..........................................................................................................................24
Power Connector (J7)..........................................................................................................................................25
Serial Ports ..................................................................................................................................................................26
LAN Connector (J6: 6-pin 2.5mm JST)...........................................................................................................28
CPU Base Clock Select (JP2).............................................................................................................................29
CHAPTER 3 FLASH DISK..........................................................................................................................................................30
3.1 OVERVIEW..................................................................................................................................................................30
3.2 SWITCH SETTING..............................................................................................................................................................31
SSD Memory Type Select (Switch 1-1 & 1-2)...............................................................................................31
Programming SSD (Floppy) ................................................................................................................................32
Programming SSD (HDD).....................................................................................................................................33
D.O.C. Installation (U12).......................................................................................................................................34
SSD (Flash) Type Supported...............................................................................................................................34
CHAPTER 4 INSTALLATION .....................................................................................................................................................35
4.1 INSTALLATION PROCEDURES..........................................................................................................................................35
4.2 CD ROM......................................................................................................................................................................36
BIOS FLASH Utility.....................................................................................................................................................36
LAN Utility....................................................................................................................................................................36
4.3 WATCHDOG TIMER.................................................................................................................................................37
Watchdog Timer Setting......................................................................................................................................37
Watchdog Enabled/Disabled - INDEX 37H.................................................................................................38
Select Watchdog Report Signal - INDEX 38H.............................................................................................38
Timeout Status& Reset Watchdog - INDEX 3CH.................................................................................................39
Programming Watchdog - Basic Operation..............................................................................................39
4.4 PROGRAMMING RS-485...............................................................................................................................................40
CHAPTER 5 BIOS SETUP..........................................................................................................................................................43
5.1 BIOS SETUP OVERVIEW ..........................................................................................................................................43
5.2 STANDARD CMOS SETUP......................................................................................................................................45
5.3 ADVANCED CMOS SETUP....................................................................................................................................47
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5.4 ADVANCED CHIPSET SETUP.................................................................................................................................51
5.5 PERIPHERAL SETUP...................................................................................................................................................53
5.6 AUTO-DETECT HARD DISKS..................................................................................................................................55
5.7 PASSWORD SETTING...............................................................................................................................................55
Setting Password.....................................................................................................................................................55
Password Checking...............................................................................................................................................55
5.8 LOAD DEFAULT SETTINGS......................................................................................................................................56
Auto Configuration with Optimal Settings..................................................................................................56
Auto Configuration with Fail Safe Settings..................................................................................................57
5.9 BIOS EXIT......................................................................................................................................................................58
Save Settings and Exit...........................................................................................................................................58
Exit Without Saving.................................................................................................................................................59
5.10 BIOS UPDATE..............................................................................................................................................................60
APPENDIX ......................................................................................................................................................................................61
SPECIFICATIONS......................................................................................................................................................................61
PLACEMENT..............................................................................................................................................................................62
DIMENSIONS.............................................................................................................................................................................63
IV
List of Figures
Figure 2-1 Printer Status Buffer..........................................................................................................................12
Figure 2-2 Printer Control Bit Definitions..........................................................................................................13
Figure 3-1 System Components Overview....................................................................................................15
Figure 3-2 J5: 6-Pin JST Keyboard Connector...............................................................................................17
Figure 3-3 CN2: Floppy Connector.................................................................................................................18
Figure 3-4 CN8: 64-Pin PC/104 Connector Bus A & B..................................................................................19
Figure 3-5 CN7: 40-Pin PC/104 Connector Bus C & D .................................................................................20
Figure 3-6 CN6: Hard Disk (IDE) Connector...................................................................................................22
Figure 3-7 J1: Reset Header..............................................................................................................................23
Figure 3-8 CN1: Parallel Port Connectors ......................................................................................................24
Figure 3-9 Power Connectors ..........................................................................................................................25
Figure 3-10 RS-232 Connector .........................................................................................................................26
Figure 3-11 RS-485 Connector .........................................................................................................................27
Figure 3-12 LAN/RJ45 Connector....................................................................................................................28
Figure 3-13 JP2: CPU Base Clock Select ........................................................................................................29
Figure 4-1 DOC/FLASH Setting.........................................................................................................................31
Figure 5-1 Watchdog Block Diagram.............................................................................................................37
Figure 6-1 BIOS Main Menu ..............................................................................................................................44
Figure 6-2 Standard CMOS Setup...................................................................................................................45
Figure 6-3 Advanced CMOS Setup................................................................................................................47
Figure 6-4 Advanced Chipset Setup..............................................................................................................51
Figure 6-5 Peripheral Setup ..............................................................................................................................53
Figure 6-6 Enter New Super User Password ...................................................................................................55
Figure 6-7 Load High Performance Setting...................................................................................................56
Figure 6-8 Load Failsafe Setting.......................................................................................................................57
Figure 6-9 Save Current Settings and Exit......................................................................................................58
Figure 6-10 Quit Without Saving ......................................................................................................................59
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List of Tables
Table 2-1 DMA Channel Controller ..................................................................................................................5
Table 2-2 Interrupt Controller.............................................................................................................................6
Table 2-3 I/O Port Address Map........................................................................................................................7
Table 2-4 Real-Time Clock & Non-Volatile RAM.............................................................................................8
Table 2-5 ACE Accessible Registers..................................................................................................................9
Table 2-6 Serial Port Divisor Latch....................................................................................................................11
Table 2-7 Registers’ Address.............................................................................................................................11
Table 3-1 J1 Pin Assignments............................................................................................................................17
Table 3-2 Floppy Connector Pin Assignments ..............................................................................................18
Table 3-3 CN8: 64-Pin PC/104 Connector Bus A & B...................................................................................19
Table 3-4 CN7: 40-Pin PC/104 Connector Bus C & D ..................................................................................20
Table 3-5 PC/104 ISA Pin Assignments............................................................................................................21
Table 3-6 CN6: Hard Disk (IDE) Connector....................................................................................................22
Table 3-7 Parallel Port Pin Assignments..........................................................................................................24
Table 3-8 RJ-45 Pin Assignments......................................................................................................................28
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CHAPTER 1 OVERVIEW
This chapter provides an overview of your system features and capabilities. The following topics
are covered:
$ Introduction
$ Packing List
$ Features
1.1 INTRODUCTION
The PC104-386L-2M is a mature and well-developed PC/104 size 386SX module. It provides much
greater performance such as support for onboard 2MB DRAM, two RS-232C/485 port, 1
parallel ports and 3 socket for flash disk or 1 socket for DiskOnChip® with up to 288 MB
memory capacity.
The PC104-386L-2M alsocomes witha programmable Watchdog timer and other typical interfaces. It
is excellent for embedded systems, MMI’s, workstations, medical applications or POS/POI
systems. As well, an RS-232C/485 port provides the remote control.
1.2 SERIES COMPARISON TABLE
ModelPC104-386L-4M PC104-386-4M
Processor ALI6117C ALI6117C
Chipset ALI6117C ALI6117C
BIOS AMI AMI
DRAM 2MB(4MB Max.) 2MB(4MB Max.)
Watchdog Timer Yes Yes
Multi I/O Chip One One
SSD Interface FLASH/DOC FLASH/DOC
IDE/FDD Yes Yes
2S/1P(RS232/RS485) Yes Yes
Ethernet 10Mbps One No
Board Size 185mm x 122mm 185mm x 122mm
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1.3 FEATURES
The system provides a number of special features that enhance its reliability, ensure its
availability, and improve its expansion capabilities, as well as its hardware structure.
$ Up to 40 MHz 386SX single board computer.
$ Stack through PC/104 expansion bus.
$ 2 MB EDO RAM on-board & 2 MB space for expansion.
$ 10Base-T NE2000 compatible network. (Without on FB2310A)
$ Parallel port, floppy and IDE Interface.
$ 2 RS-232C/RS-485 serial ports. (RS-485 is optional)
$ PS/2 compatible keyboard interface.
$ E2KEY function for safe CMOS data keeping. (Option)
$ On-board LED indicator and speaker header.
$ Flash BIOS with easy upgrade utility.
$ Software programmable watchdog timer.
$ 3 sockets for 1.5MB flash disk or - 2 sockets for 1MB flash disk and 1DIP socket for up
to 288 MB DiskOnChip.
$ Low power consumption, +5V only, 1.2A maximum.
$ EMI Considered on every output signals.
$ PC/104 form factor, 90.2 mm x 95.9 mm. (3.55” x 3.775”)
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1.4 PACKING LIST
The following accessories are included in the package. Beforeyou begin installing yourPC104-386L-2M
board,take a moment tomake sure that they have been included inside the PC104-386L-2M
package.
$ 1 PC104-386L-2M all-in-one CPU board.
$ 1 44-pin hard disk drive interface cable.
$ 1 20-pin to 34-pin floppy drive interface cable.
$ 1 parallel port interface cable.
$ 2 serial port adapter cables. (10-pin IDC to DB-9)
$ 1 LAN adapter cable. (JST to RJ45) Without FB2310A
$ 1 PS/2 keyboard adapter cable.
$ 1 power adapter cable.
$ 1 CD includes necessary utility drivers, quick setting guide file, and this manual file
$ A hard copy of User’s quick setting guide
NOTE: If any of the listed accessories is missing or damaged, please contact your dealer for
immediate servicing.
3
Overview
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CHAPTER 2 SYSTEM CONTROLLERS
This chapter describes the major structure of the PC104-386L-2M CPU board.The following topics are
covered:
$ Microprocessor
$ DMA Controller
$ Keyboard Controller
$ Interrupt Controller
$ Serial Ports
$ Parallel Ports
2.1 MICROPROCESSOR
The PC104-386L-2M uses theALIM6117 CPU; it is designed toperform systems like Intel’s 386SX system
with deep green features.
The 386SX core is the same as M1386SX of Acer Labs. Inc. and 100% object code
compatible with the Intel 386SX microprocessor. System manufacturers can provide 386
CPU based systems optimized for both cost and size. Instruction pipelining and high bus
bandwidth ensure short average instruction execution time and high system throughput.
Furthermore, it can keep the state internally from charge leakage while external clock to the
core is stopped without storing the data in registers. The power consumption here is almost
zero until the clock stops. The internal structure of this core is 32-bit data and address bus with
very low supply current. Real mode as well as Protected mode are available and can run MS-
DOS /MS-Windows.
2.2 DMA CONTROLLER
The equivalent of two 8237ADMAcontrollers are implemented in the PC104-386L-2M board.Each
controller is a four-channel DMA device that will generate the memory addresses and control
signals necessary to transfer information directly between a peripheral device and memory. This
allows high speeding information transfer with less CPU intervention. The two DMA controllers
are internally cascaded to provide four DMA channels for transfers to 8-bit peripherals (DMA1)
and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides the
cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT
compatibility.
The following is the system information of DMA channels:
DMA Controller 1 DMA Controller 2
Channel 0: Spare Channel 4: Cascade for controller 1
Channel 1: Reserved for IBM SDLC Channel 5: Spare
Channel 2: Diskette adapter Channel 6: Spare
Channel 3: Spare Channel 7: Spare
Table 2-1 DMA Channel Controller
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2.3 KEYBOARD CONTROLLER
The 8042 processor is programmed to support the keyboard serial interface. The keyboard
controller receives serial data from the keyboard, checks its parity, translates scan codes, and
presents it to the system as a byte data in its output buffer. The controller can interrupt the
system when data is placed in its output buffer, or wait for the system to poll its status register
to determine when data is available.
Data can be written to the keyboard by writing data to the output buffer of the keyboard
controller.
Each byte of data is sent to the keyboard controller in series with an odd parity bit
automatically inserted. The keyboard controller is required to acknowledge all data
transmissions. Therefore, another byte of data will not be sent to keyboard controller until
acknowledgment is received for the previous byte sent. The “output buffer full” interruption
may be used for both send-and-receive routines.
2.4 INTERRUPT CONTROLLER
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the
PC104-386L-2M board.They accept requestsfrom peripherals, resolve priorities onpending interrupts in
service, issue interrupt requests to the CPU, and provide vectors which are used as
acceptance indices by the CPU to determine which interrupt service routine to execute.
The following table contains the system information of hardware interrupt priorities:
System Interrupt
IRQ Function Priority
08h IRQ 0 System timer (Timer Channel 0 output) 1
09h IRQ1 Keyboard controller output buffer full interrupt 2
0Ah IRQ 2 Cascade from second programmable interrupt
-
0Bh IRQ 3 COM2 10
0Ch IRQ 4 COM1 11
0Dh IRQ 5 Parallel port 2 12
0Eh IRQ 6 Floppy diskette adapter 13
0Fh IRQ 7 Parallel port 1 14
70h IRQ 8 Real Time Cock 15
71h IRQ 9 COM4 3
72h IRQ 10
LAN adapter 4
73h IRQ 11
COM3 5
74h IRQ 12
Reserved for PS/2 mouse 6
75h IRQ 13
Math coprocessor 7
76h IRQ 14
Hard diskette adapter 8
77h IRQ 15
Reserved for Watchdog 9
Table 2-2 Interrupt Controller
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I/O Port Address Map
Hex Range Device
000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 ALI M6117 chipset address
040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-maskable interrupt (NMI)
080-09F DMA page registers
0A0-0A1 Interrupt controller 2
0C0-0DF DMA controller 2
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Fixed disk 1
1F0-1F8 Fixed disk 0
201 Game port
208-20A EMS register 0
218-21A EMS register 1
278-27F Parallel printer port 2 (LPT 2)
2E8-2EF Serial port 4 (COM 4)
2F8-2FF Serial port 2 (COM 2)
300-31F Prototype card/streaming type adapter
320-33F LAN adapter
378-37F Parallel printer port 1 (LPT 1)
380-38F SDLC, bisynchronous 2
3A0-3AF Bisynchronous 1
3B0-3BF Monochrome display and printer port 3 (LPT 3)
3C0-3CF EGA/VGA adapter
3D0-3DF Color/graphics monitor adapter
3E8-3EF Serial port 3 (COM 3)
3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM 1)
Table 2-3 I/O Port Address Map
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Real-Time Clock and Non-Volatile RAM
ThePC104-386L-2M containsareal-time clock compartment thatmaintainsthedateandtimein
addition to storing configuration information about the computer system. It contains 14 bytes
of clock and control registers and 114 bytes of general purpose RAM. Because of the use of
CMOS technology, it consumes very little power and can be maintained for long periods of
time using an internal Lithium battery. The contents of each byte in the CMOS RAM are listed
below:
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS
Table 2-4 Real-Time Clock & Non-Volatile RAM
Timer
The PC104-386L-2M provides three programmable timers, each witha timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.Application programs can load different
counts into this timer to generate various sound frequencies.
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2.5 SERIAL PORTS
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel
data to a serial format on the transmit side and convert serial data to parallel on the receiver
side. The serial format, in order of transmission and reception, is a start bit, followed by five to
eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or two
stop bits. The ACEs are capable of handling divisors of 1 to 65535, and produce a 16x clock for
driving the internal transmitter logic.
Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the
ACE a completed MODEM control capability, and a processor interrupt system that may be
software tailored to the computing time required to handle the communications link.
The following table is a summary of each ACE accessible register
DLAB Port Address Register
Receiver buffer (read)0 Base + 0 Transmitter holding register (write)
0 Base + 1 Interrupt enable
X Base + 2 Interrupt identification (read only)
X Base + 3 Line control
X Base + 4 MODEM control
X Base + 5 Line status
X Base + 6 MODEM status
X Base + 7 Scratched register
1 Base + 0 Divisor latch (least significant byte)
1 Base + 1 Divisor latch (most significant byte)
Table 2-5 ACE Accessible Registers
$ Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
$ Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
$ Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
$ Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
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$ Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
WLS1 WLS0 Word
Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
$ MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
$ Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
$ MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
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$ Divisor Latch (LS, MS)
LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
Desired Baud Rate Divisor Used to Generate 16x
Clock
300 384
600 192
1200 96
1800 64
2400 48
3600 32
4800 24
9600 12
14400 8
19200 6
28800 4
38400 3
57600 2
115200 1
Table 2-6 Serial Port Divisor Latch
2.6 PARALLEL PORTS
$ Register Address
Port Address Read/Write Register
Base + 0 Write Output data
Base + 0 Read Input data
Base + 1 Read Printer status buffer
Base + 2 Write Printer control
latch
Table 2-7 Registers’ Address
$ Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept
eight bits of parallel data at standard TTL level.
$ Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data
Swapper by reading the Data Swapper address.
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$ Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer
Status Buffer. The bit definitions are described below:
XXX
12345670
-ERROR
SLCT
PE
-ACK
-BUSY
Figure 2-1 Printer Status Buffer
NOTE: X represents not used.
Bit 7: This signal may become active during data entry, when the printer is off-line during
printing, or when the print head is changing position or in an error state. When Bit 7 is
active, the printer is busy and can not accept data.
Bit 6: This bit represents the current state of the printer’s ACK signal. A 0 means the printer
has received the character and is ready to accept another. Normally, this signal will
be active for approximately 5 microseconds before receiving a BUSY message stops.
Bit 5: A 1 means the printer has detected the end of the paper.
Bit 4: A 1 means the printer is selected.
Bit 3: A 0 means the printer has encountered an error condition.
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$ Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the
address of printer control swapper. Bit definitions are as follows:
XX
12345670
STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
Figure 2-2 Printer Control Bit Definitions
NOTE: X represents not used.
Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled
allowing data driven from external sources to be read; when logic 0, they work as a
printer port. This bit is writing only.
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low state to
high state.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microseconds pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data
must be present for a minimum of 0.5 microseconds before and after the strobe pulse.
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